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2D Image Processing Library for Cortex-M Processors
 
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__arm_2d_fill_colour_with_mask_and_mirroring.h
1/*
2 * Copyright (C) 2024 Arm Limited or its affiliates. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19/* ----------------------------------------------------------------------
20 * Project: Arm-2D Library
21 * Title: __arm_2d_fill_colour_with_mask_and_mirroring.h
22 * Description: A private header file for
23 * colour-filling-with-mask-and-mirroring
24 *
25 * $Date: 27. Nov 2025
26 * $Revision: V.1.1.0
27 *
28 * Target Processor: Cortex-M cores
29 * -------------------------------------------------------------------- */
30
31#ifndef __ARM_2D_FILL_COLOUR_WITH_MASK_AND_MIRRORING_H__
32#define __ARM_2D_FILL_COLOUR_WITH_MASK_AND_MIRRORING_H__
33
34/*============================ INCLUDES ======================================*/
35
36#include "arm_2d_types.h"
37
38#ifdef __cplusplus
39extern "C" {
40#endif
41
42#if defined(__clang__)
43# pragma clang diagnostic push
44# pragma clang diagnostic ignored "-Wunknown-warning-option"
45# pragma clang diagnostic ignored "-Wreserved-identifier"
46# pragma clang diagnostic ignored "-Wmissing-declarations"
47# pragma clang diagnostic ignored "-Wpadded"
48# pragma clang diagnostic ignored "-Wc11-extensions"
49#endif
50
51/*============================ MACROS ========================================*/
52/*!
53 * \addtogroup gAlpha 4 Alpha Blending Operations
54 * @{
55 */
56
57/*============================ MACROFIED FUNCTIONS ===========================*/
58
59#define arm_2d_gray8_fill_colour_with_mask_and_x_mirror( \
60 __TARGET_ADDR, /* target tile address*/ \
61 __REGION_ADDR, /* target region address*/\
62 __ALPHA_ADDR, /* alpha tile address */ \
63 __COLOUR) /* colour */ \
64 arm_2dp_gray8_fill_colour_with_mask_and_x_mirror( \
65 NULL, \
66 (__TARGET_ADDR), \
67 (__REGION_ADDR), \
68 (__ALPHA_ADDR), \
69 (__COLOUR))
70
71#define arm_2d_gray8_fill_colour_with_mask_x_mirror_and_opacity( \
72 __TARGET_ADDR, /* target tile address*/ \
73 __REGION_ADDR, /* target region address*/\
74 __ALPHA_ADDR, /* alpha tile address */ \
75 __COLOUR, /* colour */ \
76 __OPACITY) /* opacity */ \
77 arm_2dp_gray8_fill_colour_with_mask_x_mirror_and_opacity( \
78 NULL, \
79 (__TARGET_ADDR), \
80 (__REGION_ADDR), \
81 (__ALPHA_ADDR), \
82 (__COLOUR), \
83 (__OPACITY))
84
85#define arm_2d_gray8_fill_colour_with_mask_and_y_mirror( \
86 __TARGET_ADDR, /* target tile address*/ \
87 __REGION_ADDR, /* target region address*/\
88 __ALPHA_ADDR, /* alpha tile address */ \
89 __COLOUR) /* colour */ \
90 arm_2dp_gray8_fill_colour_with_mask_and_y_mirror( \
91 NULL, \
92 (__TARGET_ADDR), \
93 (__REGION_ADDR), \
94 (__ALPHA_ADDR), \
95 (__COLOUR))
96
97#define arm_2d_gray8_fill_colour_with_mask_y_mirror_and_opacity( \
98 __TARGET_ADDR, /* target tile address*/ \
99 __REGION_ADDR, /* target region address*/\
100 __ALPHA_ADDR, /* alpha tile address */ \
101 __COLOUR, /* colour */ \
102 __OPACITY) /* opacity */ \
103 arm_2dp_gray8_fill_colour_with_mask_y_mirror_and_opacity( \
104 NULL, \
105 (__TARGET_ADDR), \
106 (__REGION_ADDR), \
107 (__ALPHA_ADDR), \
108 (__COLOUR), \
109 (__OPACITY))
110
111#define arm_2d_gray8_fill_colour_with_mask_and_xy_mirror( \
112 __TARGET_ADDR, /* target tile address*/ \
113 __REGION_ADDR, /* target region address*/\
114 __ALPHA_ADDR, /* alpha tile address */ \
115 __COLOUR) /* colour */ \
116 arm_2dp_gray8_fill_colour_with_mask_and_xy_mirror( \
117 NULL, \
118 (__TARGET_ADDR), \
119 (__REGION_ADDR), \
120 (__ALPHA_ADDR), \
121 (__COLOUR))
122
123#define arm_2d_gray8_fill_colour_with_mask_xy_mirror_and_opacity( \
124 __TARGET_ADDR, /* target tile address*/ \
125 __REGION_ADDR, /* target region address*/\
126 __ALPHA_ADDR, /* alpha tile address */ \
127 __COLOUR, /* colour */ \
128 __OPACITY) /* opacity */ \
129 arm_2dp_gray8_fill_colour_with_mask_xy_mirror_and_opacity( \
130 NULL, \
131 (__TARGET_ADDR), \
132 (__REGION_ADDR), \
133 (__ALPHA_ADDR), \
134 (__COLOUR), \
135 (__OPACITY))
136
137#define arm_2d_gray8_fill_colour_with_mask_only( \
138 __TARGET_ADDR, /* target tile address*/ \
139 __REGION_ADDR, /* target region address*/\
140 __ALPHA_ADDR, /* alpha tile address */ \
141 __COLOUR) /* colour */ \
142 arm_2dp_gray8_fill_colour_with_mask_only( \
143 NULL, \
144 (__TARGET_ADDR), \
145 (__REGION_ADDR), \
146 (__ALPHA_ADDR), \
147 (__COLOUR))
148
149#define arm_2d_gray8_fill_colour_with_mask_and_opacity_only( \
150 __TARGET_ADDR, /* target tile address*/ \
151 __REGION_ADDR, /* target region address*/\
152 __ALPHA_ADDR, /* alpha tile address */ \
153 __COLOUR, /* colour */ \
154 __OPACITY) /* opacity */ \
155 arm_2dp_gray8_fill_colour_with_mask_and_opacity_only( \
156 NULL, \
157 (__TARGET_ADDR), \
158 (__REGION_ADDR), \
159 (__ALPHA_ADDR), \
160 (__COLOUR), \
161 (__OPACITY))
162
163#define arm_2d_gray8_fill_colour_with_mask( \
164 __TARGET_ADDR, /* target tile address*/ \
165 __REGION_ADDR, /* target region address*/\
166 __SRC_MSK_ADDR, /* source mask address */ \
167 __COLOUR, /* colour */ \
168 ...) /* mode */ \
169({ \
170 arm_fsm_rt_t tResult = (arm_fsm_rt_t)ARM_2D_ERR_UNKNOWN; \
171 switch ( (ARM_2D_CP_MODE_NO_MIRROR, ##__VA_ARGS__) \
172 & ARM_2D_CP_MODE_XY_MIRROR) { \
173 case ARM_2D_CP_MODE_NO_MIRROR: \
174 tResult = arm_2d_gray8_fill_colour_with_mask_only( \
175 (__TARGET_ADDR), \
176 (__REGION_ADDR), \
177 (__SRC_MSK_ADDR), \
178 (__COLOUR)); \
179 break; \
180 case ARM_2D_CP_MODE_X_MIRROR: \
181 tResult = arm_2d_gray8_fill_colour_with_mask_and_x_mirror( \
182 (__TARGET_ADDR), \
183 (__REGION_ADDR), \
184 (__SRC_MSK_ADDR), \
185 (__COLOUR)); \
186 break; \
187 case ARM_2D_CP_MODE_Y_MIRROR: \
188 tResult = arm_2d_gray8_fill_colour_with_mask_and_y_mirror( \
189 (__TARGET_ADDR), \
190 (__REGION_ADDR), \
191 (__SRC_MSK_ADDR), \
192 (__COLOUR)); \
193 break; \
194 case ARM_2D_CP_MODE_XY_MIRROR: \
195 tResult = arm_2d_gray8_fill_colour_with_mask_and_xy_mirror( \
196 (__TARGET_ADDR), \
197 (__REGION_ADDR), \
198 (__SRC_MSK_ADDR), \
199 (__COLOUR)); \
200 break; \
201 } \
202 tResult; \
203})
204
205#define arm_2d_gray8_fill_colour_with_mask_and_opacity( \
206 __TARGET_ADDR, /* target tile address*/ \
207 __REGION_ADDR, /* target region address*/\
208 __SRC_MSK_ADDR, /* source mask address */ \
209 __COLOUR, /* colour */ \
210 __OPACITY, /* opacity */ \
211 ...) /* mode */ \
212({ \
213 arm_fsm_rt_t tResult = (arm_fsm_rt_t)ARM_2D_ERR_UNKNOWN; \
214 switch ( (ARM_2D_CP_MODE_NO_MIRROR, ##__VA_ARGS__) \
215 & ARM_2D_CP_MODE_XY_MIRROR) { \
216 case ARM_2D_CP_MODE_NO_MIRROR: \
217 tResult = arm_2d_gray8_fill_colour_with_mask_and_opacity_only( \
218 (__TARGET_ADDR), \
219 (__REGION_ADDR), \
220 (__SRC_MSK_ADDR), \
221 (__COLOUR), \
222 (__OPACITY)); \
223 break; \
224 case ARM_2D_CP_MODE_X_MIRROR: \
225 tResult = \
226 arm_2d_gray8_fill_colour_with_mask_x_mirror_and_opacity( \
227 (__TARGET_ADDR), \
228 (__REGION_ADDR), \
229 (__SRC_MSK_ADDR), \
230 (__COLOUR), \
231 (__OPACITY)); \
232 break; \
233 case ARM_2D_CP_MODE_Y_MIRROR: \
234 tResult = \
235 arm_2d_gray8_fill_colour_with_mask_y_mirror_and_opacity( \
236 (__TARGET_ADDR), \
237 (__REGION_ADDR), \
238 (__SRC_MSK_ADDR), \
239 (__COLOUR), \
240 (__OPACITY)); \
241 break; \
242 case ARM_2D_CP_MODE_XY_MIRROR: \
243 tResult = \
244 arm_2d_gray8_fill_colour_with_mask_xy_mirror_and_opacity( \
245 (__TARGET_ADDR), \
246 (__REGION_ADDR), \
247 (__SRC_MSK_ADDR), \
248 (__COLOUR), \
249 (__OPACITY)); \
250 break; \
251 } \
252 tResult; \
253})
254
255#define arm_2d_rgb565_fill_colour_with_mask_and_x_mirror( \
256 __TARGET_ADDR, /* target tile address*/ \
257 __REGION_ADDR, /* target region address*/\
258 __ALPHA_ADDR, /* alpha tile address */ \
259 __COLOUR) /* colour */ \
260 arm_2dp_rgb565_fill_colour_with_mask_and_x_mirror( \
261 NULL, \
262 (__TARGET_ADDR), \
263 (__REGION_ADDR), \
264 (__ALPHA_ADDR), \
265 (__COLOUR))
266
267#define arm_2d_rgb565_fill_colour_with_mask_x_mirror_and_opacity( \
268 __TARGET_ADDR, /* target tile address*/ \
269 __REGION_ADDR, /* target region address*/\
270 __ALPHA_ADDR, /* alpha tile address */ \
271 __COLOUR, /* colour */ \
272 __OPACITY) /* opacity */ \
273 arm_2dp_rgb565_fill_colour_with_mask_x_mirror_and_opacity( \
274 NULL, \
275 (__TARGET_ADDR), \
276 (__REGION_ADDR), \
277 (__ALPHA_ADDR), \
278 (__COLOUR), \
279 (__OPACITY))
280
281#define arm_2d_rgb565_fill_colour_with_mask_and_y_mirror( \
282 __TARGET_ADDR, /* target tile address*/ \
283 __REGION_ADDR, /* target region address*/\
284 __ALPHA_ADDR, /* alpha tile address */ \
285 __COLOUR) /* colour */ \
286 arm_2dp_rgb565_fill_colour_with_mask_and_y_mirror( \
287 NULL, \
288 (__TARGET_ADDR), \
289 (__REGION_ADDR), \
290 (__ALPHA_ADDR), \
291 (__COLOUR))
292
293#define arm_2d_rgb565_fill_colour_with_mask_y_mirror_and_opacity( \
294 __TARGET_ADDR, /* target tile address*/ \
295 __REGION_ADDR, /* target region address*/\
296 __ALPHA_ADDR, /* alpha tile address */ \
297 __COLOUR, /* colour */ \
298 __OPACITY) /* opacity */ \
299 arm_2dp_rgb565_fill_colour_with_mask_y_mirror_and_opacity( \
300 NULL, \
301 (__TARGET_ADDR), \
302 (__REGION_ADDR), \
303 (__ALPHA_ADDR), \
304 (__COLOUR), \
305 (__OPACITY))
306
307#define arm_2d_rgb565_fill_colour_with_mask_and_xy_mirror( \
308 __TARGET_ADDR, /* target tile address*/ \
309 __REGION_ADDR, /* target region address*/\
310 __ALPHA_ADDR, /* alpha tile address */ \
311 __COLOUR) /* colour */ \
312 arm_2dp_rgb565_fill_colour_with_mask_and_xy_mirror( \
313 NULL, \
314 (__TARGET_ADDR), \
315 (__REGION_ADDR), \
316 (__ALPHA_ADDR), \
317 (__COLOUR))
318
319#define arm_2d_rgb565_fill_colour_with_mask_xy_mirror_and_opacity( \
320 __TARGET_ADDR, /* target tile address*/ \
321 __REGION_ADDR, /* target region address*/\
322 __ALPHA_ADDR, /* alpha tile address */ \
323 __COLOUR, /* colour */ \
324 __OPACITY) /* opacity */ \
325 arm_2dp_rgb565_fill_colour_with_mask_xy_mirror_and_opacity( \
326 NULL, \
327 (__TARGET_ADDR), \
328 (__REGION_ADDR), \
329 (__ALPHA_ADDR), \
330 (__COLOUR), \
331 (__OPACITY))
332
333#define arm_2d_rgb565_fill_colour_with_mask_only( \
334 __TARGET_ADDR, /* target tile address*/ \
335 __REGION_ADDR, /* target region address*/\
336 __ALPHA_ADDR, /* alpha tile address */ \
337 __COLOUR) /* colour */ \
338 arm_2dp_rgb565_fill_colour_with_mask_only( \
339 NULL, \
340 (__TARGET_ADDR), \
341 (__REGION_ADDR), \
342 (__ALPHA_ADDR), \
343 (__COLOUR))
344
345#define arm_2d_rgb565_fill_colour_with_mask_and_opacity_only( \
346 __TARGET_ADDR, /* target tile address*/ \
347 __REGION_ADDR, /* target region address*/\
348 __ALPHA_ADDR, /* alpha tile address */ \
349 __COLOUR, /* colour */ \
350 __OPACITY) /* opacity */ \
351 arm_2dp_rgb565_fill_colour_with_mask_and_opacity_only( \
352 NULL, \
353 (__TARGET_ADDR), \
354 (__REGION_ADDR), \
355 (__ALPHA_ADDR), \
356 (__COLOUR), \
357 (__OPACITY))
358
359#define arm_2d_rgb565_fill_colour_with_mask( \
360 __TARGET_ADDR, /* target tile address*/ \
361 __REGION_ADDR, /* target region address*/\
362 __SRC_MSK_ADDR, /* source mask address */ \
363 __COLOUR, /* colour */ \
364 ...) /* mode */ \
365({ \
366 arm_fsm_rt_t tResult = (arm_fsm_rt_t)ARM_2D_ERR_UNKNOWN; \
367 switch ( (ARM_2D_CP_MODE_NO_MIRROR, ##__VA_ARGS__) \
368 & ARM_2D_CP_MODE_XY_MIRROR) { \
369 case ARM_2D_CP_MODE_NO_MIRROR: \
370 tResult = arm_2d_rgb565_fill_colour_with_mask_only( \
371 (__TARGET_ADDR), \
372 (__REGION_ADDR), \
373 (__SRC_MSK_ADDR), \
374 (__COLOUR)); \
375 break; \
376 case ARM_2D_CP_MODE_X_MIRROR: \
377 tResult = arm_2d_rgb565_fill_colour_with_mask_and_x_mirror( \
378 (__TARGET_ADDR), \
379 (__REGION_ADDR), \
380 (__SRC_MSK_ADDR), \
381 (__COLOUR)); \
382 break; \
383 case ARM_2D_CP_MODE_Y_MIRROR: \
384 tResult = arm_2d_rgb565_fill_colour_with_mask_and_y_mirror( \
385 (__TARGET_ADDR), \
386 (__REGION_ADDR), \
387 (__SRC_MSK_ADDR), \
388 (__COLOUR)); \
389 break; \
390 case ARM_2D_CP_MODE_XY_MIRROR: \
391 tResult = arm_2d_rgb565_fill_colour_with_mask_and_xy_mirror( \
392 (__TARGET_ADDR), \
393 (__REGION_ADDR), \
394 (__SRC_MSK_ADDR), \
395 (__COLOUR)); \
396 break; \
397 } \
398 tResult; \
399})
400
401#define arm_2d_rgb565_fill_colour_with_mask_and_opacity( \
402 __TARGET_ADDR, /* target tile address*/ \
403 __REGION_ADDR, /* target region address*/\
404 __SRC_MSK_ADDR, /* source mask address */ \
405 __COLOUR, /* colour */ \
406 __OPACITY, /* opacity */ \
407 ...) /* mode */ \
408({ \
409 arm_fsm_rt_t tResult = (arm_fsm_rt_t)ARM_2D_ERR_UNKNOWN; \
410 switch ( (ARM_2D_CP_MODE_NO_MIRROR, ##__VA_ARGS__) \
411 & ARM_2D_CP_MODE_XY_MIRROR) { \
412 case ARM_2D_CP_MODE_NO_MIRROR: \
413 tResult = arm_2d_rgb565_fill_colour_with_mask_and_opacity_only( \
414 (__TARGET_ADDR), \
415 (__REGION_ADDR), \
416 (__SRC_MSK_ADDR), \
417 (__COLOUR), \
418 (__OPACITY)); \
419 break; \
420 case ARM_2D_CP_MODE_X_MIRROR: \
421 tResult = \
422 arm_2d_rgb565_fill_colour_with_mask_x_mirror_and_opacity( \
423 (__TARGET_ADDR), \
424 (__REGION_ADDR), \
425 (__SRC_MSK_ADDR), \
426 (__COLOUR), \
427 (__OPACITY)); \
428 break; \
429 case ARM_2D_CP_MODE_Y_MIRROR: \
430 tResult = \
431 arm_2d_rgb565_fill_colour_with_mask_y_mirror_and_opacity( \
432 (__TARGET_ADDR), \
433 (__REGION_ADDR), \
434 (__SRC_MSK_ADDR), \
435 (__COLOUR), \
436 (__OPACITY)); \
437 break; \
438 case ARM_2D_CP_MODE_XY_MIRROR: \
439 tResult = \
440 arm_2d_rgb565_fill_colour_with_mask_xy_mirror_and_opacity( \
441 (__TARGET_ADDR), \
442 (__REGION_ADDR), \
443 (__SRC_MSK_ADDR), \
444 (__COLOUR), \
445 (__OPACITY)); \
446 break; \
447 } \
448 tResult; \
449})
450
451#define arm_2d_cccn888_fill_colour_with_mask_and_x_mirror( \
452 __TARGET_ADDR, /* target tile address*/ \
453 __REGION_ADDR, /* target region address*/\
454 __ALPHA_ADDR, /* alpha tile address */ \
455 __COLOUR) /* colour */ \
456 arm_2dp_cccn888_fill_colour_with_mask_and_x_mirror( \
457 NULL, \
458 (__TARGET_ADDR), \
459 (__REGION_ADDR), \
460 (__ALPHA_ADDR), \
461 (__COLOUR))
462
463#define arm_2d_cccn888_fill_colour_with_mask_x_mirror_and_opacity( \
464 __TARGET_ADDR, /* target tile address*/ \
465 __REGION_ADDR, /* target region address*/\
466 __ALPHA_ADDR, /* alpha tile address */ \
467 __COLOUR, /* colour */ \
468 __OPACITY) /* opacity */ \
469 arm_2dp_cccn888_fill_colour_with_mask_x_mirror_and_opacity( \
470 NULL, \
471 (__TARGET_ADDR), \
472 (__REGION_ADDR), \
473 (__ALPHA_ADDR), \
474 (__COLOUR), \
475 (__OPACITY))
476
477#define arm_2d_cccn888_fill_colour_with_mask_and_y_mirror( \
478 __TARGET_ADDR, /* target tile address*/ \
479 __REGION_ADDR, /* target region address*/\
480 __ALPHA_ADDR, /* alpha tile address */ \
481 __COLOUR) /* colour */ \
482 arm_2dp_cccn888_fill_colour_with_mask_and_y_mirror( \
483 NULL, \
484 (__TARGET_ADDR), \
485 (__REGION_ADDR), \
486 (__ALPHA_ADDR), \
487 (__COLOUR))
488
489#define arm_2d_cccn888_fill_colour_with_mask_y_mirror_and_opacity( \
490 __TARGET_ADDR, /* target tile address*/ \
491 __REGION_ADDR, /* target region address*/\
492 __ALPHA_ADDR, /* alpha tile address */ \
493 __COLOUR, /* colour */ \
494 __OPACITY) /* opacity */ \
495 arm_2dp_cccn888_fill_colour_with_mask_y_mirror_and_opacity( \
496 NULL, \
497 (__TARGET_ADDR), \
498 (__REGION_ADDR), \
499 (__ALPHA_ADDR), \
500 (__COLOUR), \
501 (__OPACITY))
502
503#define arm_2d_cccn888_fill_colour_with_mask_and_xy_mirror( \
504 __TARGET_ADDR, /* target tile address*/ \
505 __REGION_ADDR, /* target region address*/\
506 __ALPHA_ADDR, /* alpha tile address */ \
507 __COLOUR) /* colour */ \
508 arm_2dp_cccn888_fill_colour_with_mask_and_xy_mirror( \
509 NULL, \
510 (__TARGET_ADDR), \
511 (__REGION_ADDR), \
512 (__ALPHA_ADDR), \
513 (__COLOUR))
514
515#define arm_2d_cccn888_fill_colour_with_mask_xy_mirror_and_opacity( \
516 __TARGET_ADDR, /* target tile address*/ \
517 __REGION_ADDR, /* target region address*/\
518 __ALPHA_ADDR, /* alpha tile address */ \
519 __COLOUR, /* colour */ \
520 __OPACITY) /* opacity */ \
521 arm_2dp_cccn888_fill_colour_with_mask_xy_mirror_and_opacity( \
522 NULL, \
523 (__TARGET_ADDR), \
524 (__REGION_ADDR), \
525 (__ALPHA_ADDR), \
526 (__COLOUR), \
527 (__OPACITY))
528
529#define arm_2d_cccn888_fill_colour_with_mask_only( \
530 __TARGET_ADDR, /* target tile address*/ \
531 __REGION_ADDR, /* target region address*/\
532 __ALPHA_ADDR, /* alpha tile address */ \
533 __COLOUR) /* colour */ \
534 arm_2dp_cccn888_fill_colour_with_mask_only( \
535 NULL, \
536 (__TARGET_ADDR), \
537 (__REGION_ADDR), \
538 (__ALPHA_ADDR), \
539 (__COLOUR))
540
541#define arm_2d_cccn888_fill_colour_with_mask_and_opacity_only( \
542 __TARGET_ADDR, /* target tile address*/ \
543 __REGION_ADDR, /* target region address*/\
544 __ALPHA_ADDR, /* alpha tile address */ \
545 __COLOUR, /* colour */ \
546 __OPACITY) /* opacity */ \
547 arm_2dp_cccn888_fill_colour_with_mask_and_opacity_only( \
548 NULL, \
549 (__TARGET_ADDR), \
550 (__REGION_ADDR), \
551 (__ALPHA_ADDR), \
552 (__COLOUR), \
553 (__OPACITY))
554
555#define arm_2d_cccn888_fill_colour_with_mask( \
556 __TARGET_ADDR, /* target tile address*/ \
557 __REGION_ADDR, /* target region address*/\
558 __SRC_MSK_ADDR, /* source mask address */ \
559 __COLOUR, /* colour */ \
560 ...) /* mode */ \
561({ \
562 arm_fsm_rt_t tResult = (arm_fsm_rt_t)ARM_2D_ERR_UNKNOWN; \
563 switch ( (ARM_2D_CP_MODE_NO_MIRROR, ##__VA_ARGS__) \
564 & ARM_2D_CP_MODE_XY_MIRROR) { \
565 case ARM_2D_CP_MODE_NO_MIRROR: \
566 tResult = arm_2d_cccn888_fill_colour_with_mask_only( \
567 (__TARGET_ADDR), \
568 (__REGION_ADDR), \
569 (__SRC_MSK_ADDR), \
570 (__COLOUR)); \
571 break; \
572 case ARM_2D_CP_MODE_X_MIRROR: \
573 tResult = arm_2d_cccn888_fill_colour_with_mask_and_x_mirror( \
574 (__TARGET_ADDR), \
575 (__REGION_ADDR), \
576 (__SRC_MSK_ADDR), \
577 (__COLOUR)); \
578 break; \
579 case ARM_2D_CP_MODE_Y_MIRROR: \
580 tResult = arm_2d_cccn888_fill_colour_with_mask_and_y_mirror( \
581 (__TARGET_ADDR), \
582 (__REGION_ADDR), \
583 (__SRC_MSK_ADDR), \
584 (__COLOUR)); \
585 break; \
586 case ARM_2D_CP_MODE_XY_MIRROR: \
587 tResult = arm_2d_cccn888_fill_colour_with_mask_and_xy_mirror( \
588 (__TARGET_ADDR), \
589 (__REGION_ADDR), \
590 (__SRC_MSK_ADDR), \
591 (__COLOUR)); \
592 break; \
593 } \
594 tResult; \
595})
596
597#define arm_2d_cccn888_fill_colour_with_mask_and_opacity( \
598 __TARGET_ADDR, /* target tile address*/ \
599 __REGION_ADDR, /* target region address*/\
600 __SRC_MSK_ADDR, /* source mask address */ \
601 __COLOUR, /* colour */ \
602 __OPACITY, /* opacity */ \
603 ...) /* mode */ \
604({ \
605 arm_fsm_rt_t tResult = (arm_fsm_rt_t)ARM_2D_ERR_UNKNOWN; \
606 switch ( (ARM_2D_CP_MODE_NO_MIRROR, ##__VA_ARGS__) \
607 & ARM_2D_CP_MODE_XY_MIRROR) { \
608 case ARM_2D_CP_MODE_NO_MIRROR: \
609 tResult = arm_2d_cccn888_fill_colour_with_mask_and_opacity_only( \
610 (__TARGET_ADDR), \
611 (__REGION_ADDR), \
612 (__SRC_MSK_ADDR), \
613 (__COLOUR), \
614 (__OPACITY)); \
615 break; \
616 case ARM_2D_CP_MODE_X_MIRROR: \
617 tResult = \
618 arm_2d_cccn888_fill_colour_with_mask_x_mirror_and_opacity( \
619 (__TARGET_ADDR), \
620 (__REGION_ADDR), \
621 (__SRC_MSK_ADDR), \
622 (__COLOUR), \
623 (__OPACITY)); \
624 break; \
625 case ARM_2D_CP_MODE_Y_MIRROR: \
626 tResult = \
627 arm_2d_cccn888_fill_colour_with_mask_y_mirror_and_opacity( \
628 (__TARGET_ADDR), \
629 (__REGION_ADDR), \
630 (__SRC_MSK_ADDR), \
631 (__COLOUR), \
632 (__OPACITY)); \
633 break; \
634 case ARM_2D_CP_MODE_XY_MIRROR: \
635 tResult = \
636 arm_2d_cccn888_fill_colour_with_mask_xy_mirror_and_opacity( \
637 (__TARGET_ADDR), \
638 (__REGION_ADDR), \
639 (__SRC_MSK_ADDR), \
640 (__COLOUR), \
641 (__OPACITY)); \
642 break; \
643 } \
644 tResult; \
645})
646
647/*============================ TYPES =========================================*/
648/*============================ GLOBAL VARIABLES ==============================*/
649/*============================ PROTOTYPES ====================================*/
650extern
651ARM_NONNULL(2,4)
652arm_fsm_rt_t arm_2dp_gray8_fill_colour_with_mask_and_x_mirror(
653 arm_2d_op_fill_cl_msk_t *ptOP,
654 const arm_2d_tile_t *ptTarget,
655 const arm_2d_region_t *ptRegion,
656 const arm_2d_tile_t *ptAlpha,
657 arm_2d_color_gray8_t tColour);
658
659extern
660ARM_NONNULL(2,4)
661arm_fsm_rt_t arm_2dp_gray8_fill_colour_with_mask_x_mirror_and_opacity(
662 arm_2d_op_fill_cl_msk_opc_t *ptOP,
663 const arm_2d_tile_t *ptTarget,
664 const arm_2d_region_t *ptRegion,
665 const arm_2d_tile_t *ptAlpha,
666 arm_2d_color_gray8_t tColour,
667 uint8_t chOpacity);
668extern
669ARM_NONNULL(2,4)
670arm_fsm_rt_t arm_2dp_gray8_fill_colour_with_mask_and_y_mirror(
671 arm_2d_op_fill_cl_msk_t *ptOP,
672 const arm_2d_tile_t *ptTarget,
673 const arm_2d_region_t *ptRegion,
674 const arm_2d_tile_t *ptAlpha,
675 arm_2d_color_gray8_t tColour);
676
677extern
678ARM_NONNULL(2,4)
679arm_fsm_rt_t arm_2dp_gray8_fill_colour_with_mask_y_mirror_and_opacity(
680 arm_2d_op_fill_cl_msk_opc_t *ptOP,
681 const arm_2d_tile_t *ptTarget,
682 const arm_2d_region_t *ptRegion,
683 const arm_2d_tile_t *ptAlpha,
684 arm_2d_color_gray8_t tColour,
685 uint8_t chOpacity);
686extern
687ARM_NONNULL(2,4)
688arm_fsm_rt_t arm_2dp_gray8_fill_colour_with_mask_and_xy_mirror(
689 arm_2d_op_fill_cl_msk_t *ptOP,
690 const arm_2d_tile_t *ptTarget,
691 const arm_2d_region_t *ptRegion,
692 const arm_2d_tile_t *ptAlpha,
693 arm_2d_color_gray8_t tColour);
694
695extern
696ARM_NONNULL(2,4)
697arm_fsm_rt_t arm_2dp_gray8_fill_colour_with_mask_xy_mirror_and_opacity(
698 arm_2d_op_fill_cl_msk_opc_t *ptOP,
699 const arm_2d_tile_t *ptTarget,
700 const arm_2d_region_t *ptRegion,
701 const arm_2d_tile_t *ptAlpha,
702 arm_2d_color_gray8_t tColour,
703 uint8_t chOpacity);
704extern
705ARM_NONNULL(2,4)
706arm_fsm_rt_t arm_2dp_rgb565_fill_colour_with_mask_and_x_mirror(
707 arm_2d_op_fill_cl_msk_t *ptOP,
708 const arm_2d_tile_t *ptTarget,
709 const arm_2d_region_t *ptRegion,
710 const arm_2d_tile_t *ptAlpha,
711 arm_2d_color_rgb565_t tColour);
712
713extern
714ARM_NONNULL(2,4)
715arm_fsm_rt_t arm_2dp_rgb565_fill_colour_with_mask_x_mirror_and_opacity(
716 arm_2d_op_fill_cl_msk_opc_t *ptOP,
717 const arm_2d_tile_t *ptTarget,
718 const arm_2d_region_t *ptRegion,
719 const arm_2d_tile_t *ptAlpha,
720 arm_2d_color_rgb565_t tColour,
721 uint8_t chOpacity);
722extern
723ARM_NONNULL(2,4)
724arm_fsm_rt_t arm_2dp_rgb565_fill_colour_with_mask_and_y_mirror(
725 arm_2d_op_fill_cl_msk_t *ptOP,
726 const arm_2d_tile_t *ptTarget,
727 const arm_2d_region_t *ptRegion,
728 const arm_2d_tile_t *ptAlpha,
729 arm_2d_color_rgb565_t tColour);
730
731extern
732ARM_NONNULL(2,4)
733arm_fsm_rt_t arm_2dp_rgb565_fill_colour_with_mask_y_mirror_and_opacity(
734 arm_2d_op_fill_cl_msk_opc_t *ptOP,
735 const arm_2d_tile_t *ptTarget,
736 const arm_2d_region_t *ptRegion,
737 const arm_2d_tile_t *ptAlpha,
738 arm_2d_color_rgb565_t tColour,
739 uint8_t chOpacity);
740extern
741ARM_NONNULL(2,4)
742arm_fsm_rt_t arm_2dp_rgb565_fill_colour_with_mask_and_xy_mirror(
743 arm_2d_op_fill_cl_msk_t *ptOP,
744 const arm_2d_tile_t *ptTarget,
745 const arm_2d_region_t *ptRegion,
746 const arm_2d_tile_t *ptAlpha,
747 arm_2d_color_rgb565_t tColour);
748
749extern
750ARM_NONNULL(2,4)
751arm_fsm_rt_t arm_2dp_rgb565_fill_colour_with_mask_xy_mirror_and_opacity(
752 arm_2d_op_fill_cl_msk_opc_t *ptOP,
753 const arm_2d_tile_t *ptTarget,
754 const arm_2d_region_t *ptRegion,
755 const arm_2d_tile_t *ptAlpha,
756 arm_2d_color_rgb565_t tColour,
757 uint8_t chOpacity);
758extern
759ARM_NONNULL(2,4)
760arm_fsm_rt_t arm_2dp_cccn888_fill_colour_with_mask_and_x_mirror(
761 arm_2d_op_fill_cl_msk_t *ptOP,
762 const arm_2d_tile_t *ptTarget,
763 const arm_2d_region_t *ptRegion,
764 const arm_2d_tile_t *ptAlpha,
765 arm_2d_color_cccn888_t tColour);
766
767extern
768ARM_NONNULL(2,4)
769arm_fsm_rt_t arm_2dp_cccn888_fill_colour_with_mask_x_mirror_and_opacity(
770 arm_2d_op_fill_cl_msk_opc_t *ptOP,
771 const arm_2d_tile_t *ptTarget,
772 const arm_2d_region_t *ptRegion,
773 const arm_2d_tile_t *ptAlpha,
774 arm_2d_color_cccn888_t tColour,
775 uint8_t chOpacity);
776extern
777ARM_NONNULL(2,4)
778arm_fsm_rt_t arm_2dp_cccn888_fill_colour_with_mask_and_y_mirror(
779 arm_2d_op_fill_cl_msk_t *ptOP,
780 const arm_2d_tile_t *ptTarget,
781 const arm_2d_region_t *ptRegion,
782 const arm_2d_tile_t *ptAlpha,
783 arm_2d_color_cccn888_t tColour);
784
785extern
786ARM_NONNULL(2,4)
787arm_fsm_rt_t arm_2dp_cccn888_fill_colour_with_mask_y_mirror_and_opacity(
788 arm_2d_op_fill_cl_msk_opc_t *ptOP,
789 const arm_2d_tile_t *ptTarget,
790 const arm_2d_region_t *ptRegion,
791 const arm_2d_tile_t *ptAlpha,
792 arm_2d_color_cccn888_t tColour,
793 uint8_t chOpacity);
794extern
795ARM_NONNULL(2,4)
796arm_fsm_rt_t arm_2dp_cccn888_fill_colour_with_mask_and_xy_mirror(
797 arm_2d_op_fill_cl_msk_t *ptOP,
798 const arm_2d_tile_t *ptTarget,
799 const arm_2d_region_t *ptRegion,
800 const arm_2d_tile_t *ptAlpha,
801 arm_2d_color_cccn888_t tColour);
802
803extern
804ARM_NONNULL(2,4)
805arm_fsm_rt_t arm_2dp_cccn888_fill_colour_with_mask_xy_mirror_and_opacity(
806 arm_2d_op_fill_cl_msk_opc_t *ptOP,
807 const arm_2d_tile_t *ptTarget,
808 const arm_2d_region_t *ptRegion,
809 const arm_2d_tile_t *ptAlpha,
810 arm_2d_color_cccn888_t tColour,
811 uint8_t chOpacity);
812
813/*! @} */
814
815#if defined(__clang__)
816#pragma clang diagnostic pop
817#endif
818
819#ifdef __cplusplus
820}
821#endif
822
823#endif