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CMSIS-Core (Cortex-M)
Version 5.7.0
CMSIS-Core support for Cortex-M processor-based devices
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CMSIS-Core (Cortex-M)
Version 5.7.0
CMSIS-Core support for Cortex-M processor-based devices
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Arm provides CMSIS-Core (Cortex-M) files for the supported Arm Processors and for various compiler vendors. These files can be used when standard Arm processors should be used in a project. The table below lists the folder and device names of the Arm processors.
| Folder | Processor | Description |
|---|---|---|
| ".\Device\ARM\ARMCM0" | Cortex-M0 | Contains Include and Source template files configured for the Cortex-M0 processor. The device name is ARMCM0 and the name of the Device Header File <device.h> is <ARMCM0.h>. |
| ".\Device\ARM\ARMCM0plus" | Cortex-M0+ | Contains Include and Source template files configured for the Cortex-M0+ processor. The device name is ARMCM0plus and the name of the Device Header File <device.h> is <ARMCM0plus.h>. |
| ".\Device\ARM\ARMCM3" | Cortex-M3 | Contains Include and Source template files configured for the Cortex-M3 processor. The device name is ARMCM3 and the name of the Device Header File <device.h> is <ARMCM3.h>. |
| ".\Device\ARM\ARMCM4" | Cortex-M4 | Contains Include and Source template files configured for the Cortex-M4 processor. The device name is ARMCM4 and the name of the Device Header File <device.h> is <ARMCM4.h>. |
| ".\Device\ARM\ARMCM7" | Cortex-M7 | Contains Include and Source template files configured for the Cortex-M7 processor. The device name is ARMCM7 and the name of the Device Header File <device.h> is <ARMCM7.h>. |
| ".\Device\ARM\ARMCM23" | Cortex-M23 | Contains Include and Source template files configured for the Cortex-M23 processor. The device name is ARMCM23 and the name of the Device Header File <device.h> is <ARMCM23.h>. This device is available with and without TrustZone. |
| ".\Device\ARM\ARMCM33" | Cortex-M33 | Contains Include and Source template files configured for the Cortex-M33 processor. The device name is ARMCM33 and the name of the Device Header File <device.h> is <ARMCM33.h>. This device is available with and without TrustZone. |
| ".\Device\ARM\ARMCM35P" | Cortex-M35P | Contains Include and Source template files configured for the Cortex-M35P processor. The device name is ARMCM35P and the name of the Device Header File <device.h> is <ARMCM35P.h>. This device is available with and without TrustZone. |
| ".\Device\ARM\ARMCM55" | Cortex-M55 | Contains Include and Source template files configured for the Cortex-M55 processor. The device name is ARMCM55 and the name of the Device Header File <device.h> is <ARMCM55.h>. This device is only available with TrustZone. |
| ".\Device\ARM\ARMCM85" | Cortex-M85 | Contains Include and Source template files configured for the Cortex-M85 processor. The device name is ARMCM85 and the name of the Device Header File <device.h> is <ARMCM85.h>. This device is only available with TrustZone. |
| ".\Device\ARM\ARMSC000" | SecurCore SC000 | Contains Include and Source template files configured for the SecurCore SC000 processor. The device name is ARMSC000 and the name of the Device Header File <device.h> is <ARMSC000.h>. |
| ".\Device\ARM\ARMSC300" | SecurCore SC300 | Contains Include and Source template files configured for the SecurCore SC300 processor. The device name is ARMSC300 and the name of the Device Header File <device.h> is <ARMSC300.h>. |
The CMSIS Processor and Core Peripheral files allow also to create generic libraries. The CMSIS-DSP Libraries are an example for such a generic library.
To build a generic Library set the define __CMSIS_GENERIC and include the relevant core_<cpu>.h CMSIS CPU & Core Access header file for the processor. The define __CMSIS_GENERIC disables device-dependent features such as the SysTick timer and the Interrupt System. Refer to Configuration of the Processor and Core Peripherals for a list of the available core_<cpu>.h header files.
Example:
The following code section shows the usage of the core_<cpu>.h header files to build a generic library for Cortex-M0, Cortex-M3, Cortex-M4, or Cortex-M7. To select the processor, the source code uses the define CORTEX_M7, CORTEX_M4, CORTEX_M3, CORTEX_M0, or CORTEX_M0PLUS. One of these defines needs to be provided on the compiler command line. By using this header file, the source code can access the functions for Core Register Access, Intrinsic Functions for CPU Instructions, Intrinsic Functions for SIMD Instructions, and Debug Access.
