CMSIS-Core (Cortex-A)  
CMSIS-Core support for Cortex-A processor-based devices
 
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Bit position and mask macros. More...

Macros

#define ACTLR_DDI_Pos   28U
 ACTLR: DDI Position.
 
#define ACTLR_DDI_Msk   (1UL << ACTLR_DDI_Pos)
 ACTLR: DDI Mask.
 
#define ACTLR_DBDI_Pos   28U
 ACTLR: DBDI Position.
 
#define ACTLR_DBDI_Msk   (1UL << ACTLR_DBDI_Pos)
 ACTLR: DBDI Mask.
 
#define ACTLR_BTDIS_Pos   18U
 ACTLR: BTDIS Position.
 
#define ACTLR_BTDIS_Msk   (1UL << ACTLR_BTDIS_Pos)
 ACTLR: BTDIS Mask.
 
#define ACTLR_RSDIS_Pos   17U
 ACTLR: RSDIS Position.
 
#define ACTLR_RSDIS_Msk   (1UL << ACTLR_RSDIS_Pos)
 ACTLR: RSDIS Mask.
 
#define ACTLR_BP_Pos   15U
 ACTLR: BP Position.
 
#define ACTLR_BP_Msk   (3UL << ACTLR_BP_Pos)
 ACTLR: BP Mask.
 
#define ACTLR_DDVM_Pos   15U
 ACTLR: DDVM Position.
 
#define ACTLR_DDVM_Msk   (1UL << ACTLR_DDVM_Pos)
 ACTLR: DDVM Mask.
 
#define ACTLR_L1PCTL_Pos   13U
 ACTLR: L1PCTL Position.
 
#define ACTLR_L1PCTL_Msk   (3UL << ACTLR_L1PCTL_Pos)
 ACTLR: L1PCTL Mask.
 
#define ACTLR_RADIS_Pos   12U
 ACTLR: RADIS Position.
 
#define ACTLR_RADIS_Msk   (1UL << ACTLR_RADIS_Pos)
 ACTLR: RADIS Mask.
 
#define ACTLR_L1RADIS_Pos   12U
 ACTLR: L1RADIS Position.
 
#define ACTLR_L1RADIS_Msk   (1UL << ACTLR_L1RADIS_Pos)
 ACTLR: L1RADIS Mask.
 
#define ACTLR_DWBST_Pos   11U
 ACTLR: DWBST Position.
 
#define ACTLR_DWBST_Msk   (1UL << ACTLR_DWBST_Pos)
 ACTLR: DWBST Mask.
 
#define ACTLR_L2RADIS_Pos   11U
 ACTLR: L2RADIS Position.
 
#define ACTLR_L2RADIS_Msk   (1UL << ACTLR_L2RADIS_Pos)
 ACTLR: L2RADIS Mask.
 
#define ACTLR_DODMBS_Pos   10U
 ACTLR: DODMBS Position.
 
#define ACTLR_DODMBS_Msk   (1UL << ACTLR_DODMBS_Pos)
 ACTLR: DODMBS Mask.
 
#define ACTLR_PARITY_Pos   9U
 ACTLR: PARITY Position.
 
#define ACTLR_PARITY_Msk   (1UL << ACTLR_PARITY_Pos)
 ACTLR: PARITY Mask.
 
#define ACTLR_AOW_Pos   8U
 ACTLR: AOW Position.
 
#define ACTLR_AOW_Msk   (1UL << ACTLR_AOW_Pos)
 ACTLR: AOW Mask.
 
#define ACTLR_EXCL_Pos   7U
 ACTLR: EXCL Position.
 
#define ACTLR_EXCL_Msk   (1UL << ACTLR_EXCL_Pos)
 ACTLR: EXCL Mask.
 
#define ACTLR_SMP_Pos   6U
 ACTLR: SMP Position.
 
#define ACTLR_SMP_Msk   (1UL << ACTLR_SMP_Pos)
 ACTLR: SMP Mask.
 
#define ACTLR_WFLZM_Pos   3U
 ACTLR: WFLZM Position.
 
#define ACTLR_WFLZM_Msk   (1UL << ACTLR_WFLZM_Pos)
 ACTLR: WFLZM Mask.
 
#define ACTLR_L1PE_Pos   2U
 ACTLR: L1PE Position.
 
#define ACTLR_L1PE_Msk   (1UL << ACTLR_L1PE_Pos)
 ACTLR: L1PE Mask.
 
#define ACTLR_FW_Pos   0U
 ACTLR: FW Position.
 
#define ACTLR_FW_Msk   (1UL << ACTLR_FW_Pos)
 ACTLR: FW Mask.
 

Description

Bit position and mask macros.

Macro Definition Documentation

◆ ACTLR_AOW_Msk

#define ACTLR_AOW_Msk   (1UL << ACTLR_AOW_Pos)

ACTLR: AOW Mask.

◆ ACTLR_AOW_Pos

#define ACTLR_AOW_Pos   8U

ACTLR: AOW Position.

◆ ACTLR_BP_Msk

#define ACTLR_BP_Msk   (3UL << ACTLR_BP_Pos)

ACTLR: BP Mask.

◆ ACTLR_BP_Pos

#define ACTLR_BP_Pos   15U

ACTLR: BP Position.

◆ ACTLR_BTDIS_Msk

#define ACTLR_BTDIS_Msk   (1UL << ACTLR_BTDIS_Pos)

ACTLR: BTDIS Mask.

◆ ACTLR_BTDIS_Pos

#define ACTLR_BTDIS_Pos   18U

ACTLR: BTDIS Position.

◆ ACTLR_DBDI_Msk

#define ACTLR_DBDI_Msk   (1UL << ACTLR_DBDI_Pos)

ACTLR: DBDI Mask.

◆ ACTLR_DBDI_Pos

#define ACTLR_DBDI_Pos   28U

ACTLR: DBDI Position.

◆ ACTLR_DDI_Msk

#define ACTLR_DDI_Msk   (1UL << ACTLR_DDI_Pos)

ACTLR: DDI Mask.

◆ ACTLR_DDI_Pos

#define ACTLR_DDI_Pos   28U

ACTLR: DDI Position.

◆ ACTLR_DDVM_Msk

#define ACTLR_DDVM_Msk   (1UL << ACTLR_DDVM_Pos)

ACTLR: DDVM Mask.

◆ ACTLR_DDVM_Pos

#define ACTLR_DDVM_Pos   15U

ACTLR: DDVM Position.

◆ ACTLR_DODMBS_Msk

#define ACTLR_DODMBS_Msk   (1UL << ACTLR_DODMBS_Pos)

ACTLR: DODMBS Mask.

◆ ACTLR_DODMBS_Pos

#define ACTLR_DODMBS_Pos   10U

ACTLR: DODMBS Position.

◆ ACTLR_DWBST_Msk

#define ACTLR_DWBST_Msk   (1UL << ACTLR_DWBST_Pos)

ACTLR: DWBST Mask.

◆ ACTLR_DWBST_Pos

#define ACTLR_DWBST_Pos   11U

ACTLR: DWBST Position.

◆ ACTLR_EXCL_Msk

#define ACTLR_EXCL_Msk   (1UL << ACTLR_EXCL_Pos)

ACTLR: EXCL Mask.

◆ ACTLR_EXCL_Pos

#define ACTLR_EXCL_Pos   7U

ACTLR: EXCL Position.

◆ ACTLR_FW_Msk

#define ACTLR_FW_Msk   (1UL << ACTLR_FW_Pos)

ACTLR: FW Mask.

◆ ACTLR_FW_Pos

#define ACTLR_FW_Pos   0U

ACTLR: FW Position.

◆ ACTLR_L1PCTL_Msk

#define ACTLR_L1PCTL_Msk   (3UL << ACTLR_L1PCTL_Pos)

ACTLR: L1PCTL Mask.

◆ ACTLR_L1PCTL_Pos

#define ACTLR_L1PCTL_Pos   13U

ACTLR: L1PCTL Position.

◆ ACTLR_L1PE_Msk

#define ACTLR_L1PE_Msk   (1UL << ACTLR_L1PE_Pos)

ACTLR: L1PE Mask.

◆ ACTLR_L1PE_Pos

#define ACTLR_L1PE_Pos   2U

ACTLR: L1PE Position.

◆ ACTLR_L1RADIS_Msk

#define ACTLR_L1RADIS_Msk   (1UL << ACTLR_L1RADIS_Pos)

ACTLR: L1RADIS Mask.

◆ ACTLR_L1RADIS_Pos

#define ACTLR_L1RADIS_Pos   12U

ACTLR: L1RADIS Position.

◆ ACTLR_L2RADIS_Msk

#define ACTLR_L2RADIS_Msk   (1UL << ACTLR_L2RADIS_Pos)

ACTLR: L2RADIS Mask.

◆ ACTLR_L2RADIS_Pos

#define ACTLR_L2RADIS_Pos   11U

ACTLR: L2RADIS Position.

◆ ACTLR_PARITY_Msk

#define ACTLR_PARITY_Msk   (1UL << ACTLR_PARITY_Pos)

ACTLR: PARITY Mask.

◆ ACTLR_PARITY_Pos

#define ACTLR_PARITY_Pos   9U

ACTLR: PARITY Position.

◆ ACTLR_RADIS_Msk

#define ACTLR_RADIS_Msk   (1UL << ACTLR_RADIS_Pos)

ACTLR: RADIS Mask.

◆ ACTLR_RADIS_Pos

#define ACTLR_RADIS_Pos   12U

ACTLR: RADIS Position.

◆ ACTLR_RSDIS_Msk

#define ACTLR_RSDIS_Msk   (1UL << ACTLR_RSDIS_Pos)

ACTLR: RSDIS Mask.

◆ ACTLR_RSDIS_Pos

#define ACTLR_RSDIS_Pos   17U

ACTLR: RSDIS Position.

◆ ACTLR_SMP_Msk

#define ACTLR_SMP_Msk   (1UL << ACTLR_SMP_Pos)

ACTLR: SMP Mask.

◆ ACTLR_SMP_Pos

#define ACTLR_SMP_Pos   6U

ACTLR: SMP Position.

◆ ACTLR_WFLZM_Msk

#define ACTLR_WFLZM_Msk   (1UL << ACTLR_WFLZM_Pos)

ACTLR: WFLZM Mask.

◆ ACTLR_WFLZM_Pos

#define ACTLR_WFLZM_Pos   3U

ACTLR: WFLZM Position.