Bit position and mask macros. More...

Macros
#define	SCTLR_TE_Pos 30U
	SCTLR: TE Position.

#define	SCTLR_TE_Msk (1UL << SCTLR_TE_Pos)
	SCTLR: TE Mask.

#define	SCTLR_AFE_Pos 29U
	SCTLR: AFE Position.

#define	SCTLR_AFE_Msk (1UL << SCTLR_AFE_Pos)
	SCTLR: AFE Mask.

#define	SCTLR_TRE_Pos 28U
	SCTLR: TRE Position.

#define	SCTLR_TRE_Msk (1UL << SCTLR_TRE_Pos)
	SCTLR: TRE Mask.

#define	SCTLR_NMFI_Pos 27U
	SCTLR: NMFI Position.

#define	SCTLR_NMFI_Msk (1UL << SCTLR_NMFI_Pos)
	SCTLR: NMFI Mask.

#define	SCTLR_EE_Pos 25U
	SCTLR: EE Position.

#define	SCTLR_EE_Msk (1UL << SCTLR_EE_Pos)
	SCTLR: EE Mask.

#define	SCTLR_VE_Pos 24U
	SCTLR: VE Position.

#define	SCTLR_VE_Msk (1UL << SCTLR_VE_Pos)
	SCTLR: VE Mask.

#define	SCTLR_U_Pos 22U
	SCTLR: U Position.

#define	SCTLR_U_Msk (1UL << SCTLR_U_Pos)
	SCTLR: U Mask.

#define	SCTLR_FI_Pos 21U
	SCTLR: FI Position.

#define	SCTLR_FI_Msk (1UL << SCTLR_FI_Pos)
	SCTLR: FI Mask.

#define	SCTLR_UWXN_Pos 20U
	SCTLR: UWXN Position.

#define	SCTLR_UWXN_Msk (1UL << SCTLR_UWXN_Pos)
	SCTLR: UWXN Mask.

#define	SCTLR_WXN_Pos 19U
	SCTLR: WXN Position.

#define	SCTLR_WXN_Msk (1UL << SCTLR_WXN_Pos)
	SCTLR: WXN Mask.

#define	SCTLR_HA_Pos 17U
	SCTLR: HA Position.

#define	SCTLR_HA_Msk (1UL << SCTLR_HA_Pos)
	SCTLR: HA Mask.

#define	SCTLR_RR_Pos 14U
	SCTLR: RR Position.

#define	SCTLR_RR_Msk (1UL << SCTLR_RR_Pos)
	SCTLR: RR Mask.

#define	SCTLR_V_Pos 13U
	SCTLR: V Position.

#define	SCTLR_V_Msk (1UL << SCTLR_V_Pos)
	SCTLR: V Mask.

#define	SCTLR_I_Pos 12U
	SCTLR: I Position.

#define	SCTLR_I_Msk (1UL << SCTLR_I_Pos)
	SCTLR: I Mask.

#define	SCTLR_Z_Pos 11U
	SCTLR: Z Position.

#define	SCTLR_Z_Msk (1UL << SCTLR_Z_Pos)
	SCTLR: Z Mask.

#define	SCTLR_SW_Pos 10U
	SCTLR: SW Position.

#define	SCTLR_SW_Msk (1UL << SCTLR_SW_Pos)
	SCTLR: SW Mask.

#define	SCTLR_B_Pos 7U
	SCTLR: B Position.

#define	SCTLR_B_Msk (1UL << SCTLR_B_Pos)
	SCTLR: B Mask.

#define	SCTLR_CP15BEN_Pos 5U
	SCTLR: CP15BEN Position.

#define	SCTLR_CP15BEN_Msk (1UL << SCTLR_CP15BEN_Pos)
	SCTLR: CP15BEN Mask.

#define	SCTLR_C_Pos 2U
	SCTLR: C Position.

#define	SCTLR_C_Msk (1UL << SCTLR_C_Pos)
	SCTLR: C Mask.

#define	SCTLR_A_Pos 1U
	SCTLR: A Position.

#define	SCTLR_A_Msk (1UL << SCTLR_A_Pos)
	SCTLR: A Mask.

#define	SCTLR_M_Pos 0U
	SCTLR: M Position.

#define	SCTLR_M_Msk (1UL << SCTLR_M_Pos)
	SCTLR: M Mask.

Description

Bit position and mask macros.

Macro Definition Documentation

◆ SCTLR_A_Msk

#define SCTLR_A_Msk (1UL << SCTLR_A_Pos)

SCTLR: A Mask.

◆ SCTLR_A_Pos

#define SCTLR_A_Pos 1U

SCTLR: A Position.

◆ SCTLR_AFE_Msk

#define SCTLR_AFE_Msk (1UL << SCTLR_AFE_Pos)

SCTLR: AFE Mask.

◆ SCTLR_AFE_Pos

#define SCTLR_AFE_Pos 29U

SCTLR: AFE Position.

◆ SCTLR_B_Msk

#define SCTLR_B_Msk (1UL << SCTLR_B_Pos)

SCTLR: B Mask.

◆ SCTLR_B_Pos

#define SCTLR_B_Pos 7U

SCTLR: B Position.

◆ SCTLR_C_Msk

#define SCTLR_C_Msk (1UL << SCTLR_C_Pos)

SCTLR: C Mask.

◆ SCTLR_C_Pos

#define SCTLR_C_Pos 2U

SCTLR: C Position.

◆ SCTLR_CP15BEN_Msk

#define SCTLR_CP15BEN_Msk (1UL << SCTLR_CP15BEN_Pos)

SCTLR: CP15BEN Mask.

◆ SCTLR_CP15BEN_Pos

#define SCTLR_CP15BEN_Pos 5U

SCTLR: CP15BEN Position.

◆ SCTLR_EE_Msk

#define SCTLR_EE_Msk (1UL << SCTLR_EE_Pos)

SCTLR: EE Mask.

◆ SCTLR_EE_Pos

#define SCTLR_EE_Pos 25U

SCTLR: EE Position.

◆ SCTLR_FI_Msk

#define SCTLR_FI_Msk (1UL << SCTLR_FI_Pos)

SCTLR: FI Mask.

◆ SCTLR_FI_Pos

#define SCTLR_FI_Pos 21U

SCTLR: FI Position.

◆ SCTLR_HA_Msk

#define SCTLR_HA_Msk (1UL << SCTLR_HA_Pos)

SCTLR: HA Mask.

◆ SCTLR_HA_Pos

#define SCTLR_HA_Pos 17U

SCTLR: HA Position.

◆ SCTLR_I_Msk

#define SCTLR_I_Msk (1UL << SCTLR_I_Pos)

SCTLR: I Mask.

◆ SCTLR_I_Pos

#define SCTLR_I_Pos 12U

SCTLR: I Position.

◆ SCTLR_M_Msk

#define SCTLR_M_Msk (1UL << SCTLR_M_Pos)

SCTLR: M Mask.

◆ SCTLR_M_Pos

#define SCTLR_M_Pos 0U

SCTLR: M Position.

◆ SCTLR_NMFI_Msk

#define SCTLR_NMFI_Msk (1UL << SCTLR_NMFI_Pos)

SCTLR: NMFI Mask.

◆ SCTLR_NMFI_Pos

#define SCTLR_NMFI_Pos 27U

SCTLR: NMFI Position.

◆ SCTLR_RR_Msk

#define SCTLR_RR_Msk (1UL << SCTLR_RR_Pos)

SCTLR: RR Mask.

◆ SCTLR_RR_Pos

#define SCTLR_RR_Pos 14U

SCTLR: RR Position.

◆ SCTLR_SW_Msk

#define SCTLR_SW_Msk (1UL << SCTLR_SW_Pos)

SCTLR: SW Mask.

◆ SCTLR_SW_Pos

#define SCTLR_SW_Pos 10U

SCTLR: SW Position.

◆ SCTLR_TE_Msk

#define SCTLR_TE_Msk (1UL << SCTLR_TE_Pos)

SCTLR: TE Mask.

◆ SCTLR_TE_Pos

#define SCTLR_TE_Pos 30U

SCTLR: TE Position.

◆ SCTLR_TRE_Msk

#define SCTLR_TRE_Msk (1UL << SCTLR_TRE_Pos)

SCTLR: TRE Mask.

◆ SCTLR_TRE_Pos

#define SCTLR_TRE_Pos 28U

SCTLR: TRE Position.

◆ SCTLR_U_Msk

#define SCTLR_U_Msk (1UL << SCTLR_U_Pos)

SCTLR: U Mask.

◆ SCTLR_U_Pos

#define SCTLR_U_Pos 22U

SCTLR: U Position.

◆ SCTLR_UWXN_Msk

#define SCTLR_UWXN_Msk (1UL << SCTLR_UWXN_Pos)

SCTLR: UWXN Mask.

◆ SCTLR_UWXN_Pos

#define SCTLR_UWXN_Pos 20U

SCTLR: UWXN Position.

◆ SCTLR_V_Msk

#define SCTLR_V_Msk (1UL << SCTLR_V_Pos)

SCTLR: V Mask.

◆ SCTLR_V_Pos

#define SCTLR_V_Pos 13U

SCTLR: V Position.

◆ SCTLR_VE_Msk

#define SCTLR_VE_Msk (1UL << SCTLR_VE_Pos)

SCTLR: VE Mask.

◆ SCTLR_VE_Pos

#define SCTLR_VE_Pos 24U

SCTLR: VE Position.

◆ SCTLR_WXN_Msk

#define SCTLR_WXN_Msk (1UL << SCTLR_WXN_Pos)

SCTLR: WXN Mask.

◆ SCTLR_WXN_Pos

#define SCTLR_WXN_Pos 19U

SCTLR: WXN Position.

◆ SCTLR_Z_Msk

#define SCTLR_Z_Msk (1UL << SCTLR_Z_Pos)

SCTLR: Z Mask.

◆ SCTLR_Z_Pos

#define SCTLR_Z_Pos 11U

SCTLR: Z Position.

Macros