Compute Library
 22.11
CpuDepthwiseConv2dNativeKernel.cpp
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25 
29 #include "src/core/CPP/Validate.h"
36 
37 namespace arm_compute
38 {
39 namespace cpu
40 {
41 namespace kernels
42 {
43 namespace
44 {
45 static const std::vector<CpuDepthwiseConv2dNativeKernel::DepthwiseConv2dNativeKernel> available_kernels =
46 {
47  {
48  "neon_qu8_deptwiseconv2dnative",
49  [](const DepthwiseConv2dNativeDataTypeISASelectorData & data)
50  {
51  return (data.weights_dt == DataType::QASYMM8);
52  },
54  },
55  {
56  "neon_qs8_deptwiseconv2dnative",
57  [](const DepthwiseConv2dNativeDataTypeISASelectorData & data)
58  {
59  return (data.weights_dt == DataType::QASYMM8_SIGNED);
60  },
62  },
63  {
64  "neon_fp16_deptwiseconv2dnative",
65  [](const DepthwiseConv2dNativeDataTypeISASelectorData & data)
66  {
67  return (data.weights_dt == DataType::F16 && data.isa.fp16);
68  },
70  },
71  {
72  "neon_fp32_deptwiseconv2dnative",
73  [](const DepthwiseConv2dNativeDataTypeISASelectorData & data)
74  {
75  return (data.weights_dt == DataType::F32);
76  },
78  },
79  {
80  "neon_qp8_qu8_deptwiseconv2dnative",
81  [](const DepthwiseConv2dNativeDataTypeISASelectorData & data)
82  {
83  return (data.weights_dt == DataType::QSYMM8_PER_CHANNEL && data.source_dt == DataType::QASYMM8);
84  },
86  },
87  {
88  "neon_qp8_qs8_deptwiseconv2dnative",
89  [](const DepthwiseConv2dNativeDataTypeISASelectorData & data)
90  {
91  return (data.weights_dt == DataType::QSYMM8_PER_CHANNEL && data.source_dt != DataType::QASYMM8);
92  },
94  },
95 };
96 
97 Status validate_arguments(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, const ConvolutionInfo &info)
98 {
99  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, weights, dst);
101  ARM_COMPUTE_RETURN_ERROR_ON(src->data_layout() == DataLayout::UNKNOWN);
103  ARM_COMPUTE_RETURN_ERROR_ON(info.depth_multiplier == 0);
104  ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(1) + (weights->dimension(1) - 1) * (info.dilation.x() - 1) > src->dimension(1) + info.pad_stride_info.pad_left() + info.pad_stride_info.pad_right());
105  ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(2) + (weights->dimension(2) - 1) * (info.dilation.y() - 1) > src->dimension(2) + info.pad_stride_info.pad_top() + info.pad_stride_info.pad_bottom());
106  ARM_COMPUTE_RETURN_ERROR_ON((src->dimension(0) * info.depth_multiplier) != weights->dimension(0));
107  ARM_COMPUTE_RETURN_ERROR_ON((info.dilation.x() < 1) || (info.dilation.y() < 1));
108  ARM_COMPUTE_RETURN_ERROR_ON((info.pad_stride_info.stride().first < 1) || (info.pad_stride_info.stride().second < 1));
109 
110  if(is_data_type_quantized_per_channel(weights->data_type()))
111  {
113  ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(0) != weights->quantization_info().scale().size());
114  }
115  else
116  {
118  }
119 
120  if(biases != nullptr)
121  {
122  ARM_COMPUTE_RETURN_ERROR_ON(biases->num_dimensions() > 1);
123  ARM_COMPUTE_RETURN_ERROR_ON(biases->dimension(0) != weights->dimension(0));
124 
125  if(is_data_type_quantized_asymmetric(src->data_type()))
126  {
128  }
129  else
130  {
132  }
133  }
134 
135  if(dst->total_size() != 0)
136  {
137  const TensorShape output_shape = misc::shape_calculator::compute_depthwise_convolution_shape(*src, *weights, info);
140  }
141 
142  return Status{};
143 }
144 } // namespace
145 
146 void CpuDepthwiseConv2dNativeKernel::configure(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, ITensorInfo *dst, const ConvolutionInfo &info)
147 {
148  ARM_COMPUTE_ERROR_ON_NULLPTR(src, weights, dst);
149  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(src, weights, (biases != nullptr) ? biases : nullptr, dst, info));
150 
151  _has_biases = (biases != nullptr);
152  _conv_info = info;
153 
156  ARM_COMPUTE_ERROR_ON(uk == nullptr || uk->ukernel == nullptr);
157  _func = uk->ukernel;
158 
160  auto_init_if_empty(*dst, src->clone()->set_is_resizable(true).reset_padding().set_tensor_shape(output_shape).set_quantization_info(dst->quantization_info()));
161 
162  Window win = calculate_max_window(*dst, Steps());
163  ICpuKernel::configure(win);
164 }
165 
166 Status CpuDepthwiseConv2dNativeKernel::validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, const ConvolutionInfo &info)
167 {
168  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(src, weights, biases, dst, info));
169  return Status{};
170 }
171 
173 {
174  ARM_COMPUTE_UNUSED(info);
177  ARM_COMPUTE_ERROR_ON(_func == nullptr);
178 
179  const auto src = tensors.get_const_tensor(TensorType::ACL_SRC_0);
180  const auto weights = tensors.get_const_tensor(TensorType::ACL_SRC_1);
181  const auto biases = tensors.get_const_tensor(TensorType::ACL_SRC_2);
182  auto dst = tensors.get_tensor(TensorType::ACL_DST);
183  _func(src, weights, biases, dst, window, _has_biases, _conv_info);
184 }
185 
187 {
188  return "CpuDepthwiseConv2dNativeKernel";
189 }
190 
191 const std::vector<CpuDepthwiseConv2dNativeKernel::DepthwiseConv2dNativeKernel> &CpuDepthwiseConv2dNativeKernel::get_available_kernels()
192 {
193  return available_kernels;
194 }
195 } // namespace kernels
196 } // namespace cpu
197 } // namespace arm_compute
Window calculate_max_window(const ValidRegion &valid_region, const Steps &steps, bool skip_border, BorderSize border_size)
void neon_qp8_qu8_deptwiseconv2dnative(const ITensor *src, const ITensor *weights, const ITensor *bias, ITensor *dst, const Window &window, bool has_biases, const ConvolutionInfo &info)
Definition: qasymm8.cpp:35
Traits defined on Arm® Neon™ vectors.
const Window & window() const
The maximum window the kernel can be executed on.
Definition: IKernel.cpp:28
Shape of a tensor.
Definition: TensorShape.h:39
TensorShape compute_depthwise_convolution_shape(const ITensorInfo &input, const ITensorInfo &weights, const ConvolutionInfo &info)
Calculate the depthwise convolution output shape of a tensor.
static const auto * get_implementation(const SelectorType &selector, KernelSelectionType selection_type=KernelSelectionType::Supported)
Micro-kernel selector.
Definition: ICpuKernel.h:53
#define ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(tensor)
Definition: Validate.h:115
#define REGISTER_FP16_NEON(func_name)
Definition: Registrars.h:48
#define REGISTER_FP32_NEON(func_name)
Definition: Registrars.h:74
#define ARM_COMPUTE_RETURN_ON_ERROR(status)
Checks if a status contains an error and returns it.
Definition: Error.h:204
void neon_qp8_qs8_deptwiseconv2dnative(const ITensor *src, const ITensor *weights, const ITensor *bias, ITensor *dst, const Window &window, bool has_biases, const ConvolutionInfo &info)
void neon_qu8_deptwiseconv2dnative(const ITensor *src, const ITensor *weights, const ITensor *bias, ITensor *dst, const Window &window, bool has_biases, const ConvolutionInfo &info)
Definition: qasymm8.cpp:29
virtual DataType data_type() const =0
Data type used for each element of the tensor.
1 channel, 1 F32 per channel
#define ARM_COMPUTE_ERROR_ON(cond)
If the condition is true then an error message is printed and an exception thrown.
Definition: Error.h:466
#define REGISTER_QASYMM8_SIGNED_NEON(func_name)
Definition: Registrars.h:96
Store the tensor&#39;s metadata.
Definition: ITensorInfo.h:40
#define ARM_COMPUTE_ERROR_THROW_ON(status)
Definition: Error.h:455
Status class.
Definition: Error.h:52
Status validate_arguments(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *dst, const PadStrideInfo &conv_info)
#define ARM_COMPUTE_RETURN_ERROR_ON(cond)
If the condition is true, an error is returned.
Definition: Error.h:296
#define ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(...)
Definition: Validate.h:284
SimpleTensor< float > src
Definition: DFT.cpp:155
Copyright (c) 2017-2022 Arm Limited.
1 channel, 1 F16 per channel
#define ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(...)
Definition: Validate.h:159
1 channel, 1 S32 per channel
void neon_fp16_deptwiseconv2dnative(const ITensor *src, const ITensor *weights, const ITensor *bias, ITensor *dst, const Window &window, bool has_biases, const ConvolutionInfo &info)
const ITensor * get_const_tensor(int id) const
Get constant tensor of a given id.
Definition: ITensorPack.cpp:54
#define ARM_COMPUTE_UNUSED(...)
To avoid unused variables warnings.
Definition: Error.h:152
#define REGISTER_QASYMM8_NEON(func_name)
Definition: Registrars.h:117
bool is_data_type_quantized_per_channel(DataType dt)
Check if a given data type is of per channel type.
Definition: Utils.h:1107
quantized, asymmetric fixed-point 8-bit number unsigned
Class to describe a number of elements in each dimension.
Definition: Steps.h:40
bool auto_init_if_empty(ITensorInfo &info, const TensorShape &shape, int num_channels, DataType data_type, QuantizationInfo quantization_info=QuantizationInfo())
Auto initialize the tensor info (shape, number of channels and data type) if the current assignment i...
virtual std::unique_ptr< T > clone() const =0
Provide a clone of the current object of class T.
virtual QuantizationInfo quantization_info() const =0
Get the quantization settings (scale and offset) of the tensor.
#define ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(k)
Definition: Validate.h:915
bool is_data_type_quantized_asymmetric(DataType dt)
Check if a given data type is of asymmetric quantized type.
Definition: Utils.h:1052
void configure(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, ITensorInfo *dst, const ConvolutionInfo &info)
Initialize the function&#39;s source, destination and parameters.
quantized, symmetric per channel fixed-point 8-bit number
void run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info) override
Execute the kernel on the passed window.
ScaleKernelInfo info(interpolation_policy, default_border_mode, PixelValue(), sampling_policy, false)
ITensor * get_tensor(int id)
Get tensor of a given id from the pac.
Definition: ITensorPack.cpp:64
Information about executing thread and CPU.
Definition: CPPTypes.h:179
void neon_qs8_deptwiseconv2dnative(const ITensor *src, const ITensor *weights, const ITensor *bias, ITensor *dst, const Window &window, bool has_biases, const ConvolutionInfo &info)
#define ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(...)
Definition: Validate.h:541
#define ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(t, c,...)
Definition: Validate.h:788
Tensor packing service.
Definition: ITensorPack.h:39
#define ARM_COMPUTE_ERROR_ON_NULLPTR(...)
Definition: Validate.h:157
static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, const ConvolutionInfo &info)
Static function to check if given info will lead to a valid configuration.
quantized, asymmetric fixed-point 8-bit number signed
static const std::vector< DepthwiseConv2dNativeKernel > & get_available_kernels()
void neon_fp32_deptwiseconv2dnative(const ITensor *src, const ITensor *weights, const ITensor *bias, ITensor *dst, const Window &window, bool has_biases, const ConvolutionInfo &info)
Definition: fp32.cpp:29
static CPUInfo & get()
Access the KernelLibrary singleton.
Definition: CPPTypes.cpp:40
Describe a multidimensional execution window.
Definition: Window.h:39
#define ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(f, s)
Definition: Validate.h:201
cpuinfo::CpuIsaInfo get_isa() const
Gets the current cpu&#39;s ISA information.
Definition: CPPTypes.cpp:124