Compute Library
 21.11
CpuDirectConv2d.cpp
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25 
27 #include "arm_compute/core/Utils.h"
30 #include "src/common/utils/Log.h"
31 
32 namespace arm_compute
33 {
34 namespace cpu
35 {
37 
38 CpuDirectConv2d::CpuDirectConv2d(std::shared_ptr<IMemoryManager> memory_manager)
39  : _memory_group(std::move(memory_manager)), _output_stage_kernel(), _conv_kernel(), _input_border_handler(), _activationlayer_function(), _accumulator(), _has_bias(false),
40  _is_activationlayer_enabled(false), _dim_split(Window::DimZ), _is_padding_required()
41 {
42 }
43 
45 {
47  ARM_COMPUTE_LOG_PARAMS(src, weights, bias, dst, conv_info, act_info);
48 
49  _output_stage_kernel = std::make_unique<kernels::CpuDirectConv2dOutputStageKernel>();
50  _conv_kernel = std::make_unique<kernels::CpuDirectConv2dKernel>();
51  _input_border_handler = std::make_unique<NEFillBorderKernel>();
52 
53  // Free accumulator
54  if(_accumulator.buffer() != nullptr)
55  {
56  _accumulator.allocator()->free();
57  }
58 
59  _dim_split = src->data_layout() == DataLayout::NCHW ? Window::DimZ : Window::DimY;
60 
61  // Check if bias should be added in the convolution result
62  _has_bias = (bias != nullptr);
63 
64  _conv_kernel->configure(src, weights, dst, conv_info);
65  if(_has_bias)
66  {
67  _output_stage_kernel->configure(dst, bias);
68  }
69  _is_padding_required = !_conv_kernel->border_size().empty();
70 
71  if(_is_padding_required)
72  {
73  // Add zero padding XY
74  _input_border_handler->configure(src, _conv_kernel->border_size(), BorderMode::CONSTANT, PixelValue(static_cast<float>(0.f)));
75  }
76 
77  //Configure Activation Layer
78  _is_activationlayer_enabled = act_info.enabled();
79  if(_is_activationlayer_enabled)
80  {
81  _activationlayer_function = std::make_unique<CpuActivation>();
82  _activationlayer_function->configure(dst, dst, act_info);
83  }
84 }
85 
87  const ActivationLayerInfo &act_info)
88 {
89  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, weights, dst);
90 
91  // output might not be initialized since it can be an intermediate tensor of another layer
92  DataType data_type = src->data_type();
93  TensorInfo accumulator(dst->clone()->set_is_resizable(true).reset_padding().set_data_type(data_type));
94 
95  // Validate Convolution kernel
96  ARM_COMPUTE_RETURN_ON_ERROR(kernels::CpuDirectConv2dKernel::validate(src, weights, &accumulator, conv_info));
97 
98  if(bias != nullptr)
99  {
101  ARM_COMPUTE_RETURN_ERROR_ON_MSG(bias->dimension(0) != weights->dimension(3),
102  "Biases size and number of input feature maps should match");
103  ARM_COMPUTE_RETURN_ERROR_ON_MSG(bias->num_dimensions() > 1, "Biases should be one dimensional");
104  }
105 
106  // Validate bias kernel
108 
109  if(act_info.enabled())
110  {
111  ARM_COMPUTE_RETURN_ON_ERROR(CpuActivation::validate(dst, nullptr, act_info));
112  }
113 
114  return Status{};
115 }
116 
118 {
119  MemoryGroupResourceScope scope_mg(_memory_group);
120 
121  auto src = tensors.get_tensor(TensorType::ACL_SRC_0);
122  auto bias = tensors.get_const_tensor(TensorType::ACL_SRC_2);
123  auto dst = tensors.get_tensor(TensorType::ACL_DST);
124 
125  if(_is_padding_required)
126  {
129  NEScheduler::get().schedule_op(_input_border_handler.get(), Window::DimZ, _input_border_handler->window(), pack);
130  }
131  NEScheduler::get().schedule_op(_conv_kernel.get(), _dim_split, _conv_kernel->window(), tensors);
132  if(_has_bias)
133  {
136  pack.add_tensor(TensorType::ACL_SRC_1, bias);
138  NEScheduler::get().schedule_op(_output_stage_kernel.get(), Window::DimY, _output_stage_kernel->window(), pack);
139  }
140 
141  if(_is_activationlayer_enabled)
142  {
146  _activationlayer_function->run(pack);
147  }
148 }
149 } // namespace cpu
150 } // namespace arm_compute
CpuDirectConv2d(std::shared_ptr< IMemoryManager > memory_manager=nullptr)
virtual size_t num_dimensions() const =0
The number of dimensions of the tensor (rank)
Class describing the value of a pixel for any image format.
Definition: PixelValue.h:34
static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *bias, const ITensorInfo *dst, const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info=ActivationLayerInfo())
Static function to check if given info will lead to a valid configuration.
bool enabled() const
Check if initialised.
Definition: Types.h:1559
virtual size_t dimension(size_t index) const =0
Return the size of the requested dimension.
#define ARM_COMPUTE_RETURN_ON_ERROR(status)
Checks if a status contains an error and returns it.
Definition: Error.h:204
virtual DataType data_type() const =0
Data type used for each element of the tensor.
virtual void schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)=0
Runs the kernel in the same thread as the caller synchronously.
void configure(ITensorInfo *src, ITensorInfo *weights, const ITensorInfo *bias, ITensorInfo *dst, const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info=ActivationLayerInfo())
Set the input, weights, biases and output tensors.
#define ARM_COMPUTE_ERROR_ON(cond)
If the condition is true then an error message is printed and an exception thrown.
Definition: Error.h:466
Store the tensor&#39;s metadata.
Definition: ITensorInfo.h:40
Status class.
Definition: Error.h:52
Activation Layer Information class.
Definition: Types.h:1509
static Status validate(const ITensorInfo *src, const ITensorInfo *bias=nullptr, const ITensorInfo *dst=nullptr, const DirectConvolutionLayerOutputStageKernelInfo &info=DirectConvolutionLayerOutputStageKernelInfo())
Static function to check if given info will lead to a valid configuration.
SimpleTensor< float > src
Definition: DFT.cpp:155
Copyright (c) 2017-2021 Arm Limited.
TensorAllocator * allocator()
Return a pointer to the tensor&#39;s allocator.
Definition: Tensor.cpp:48
#define ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(...)
Definition: Validate.h:159
const DataType data_type
Definition: Im2Col.cpp:150
const ITensor * get_const_tensor(int id) const
Get constant tensor of a given id.
Definition: ITensorPack.cpp:54
virtual std::unique_ptr< T > clone() const =0
Provide a clone of the current object of class T.
Padding and stride information class.
Definition: Types.h:656
void free() override
Free allocated CPU memory.
Num samples, channels, height, width.
static constexpr size_t DimY
Alias for dimension 1 also known as Y dimension.
Definition: Window.h:45
ITensor * get_tensor(int id)
Get tensor of a given id from the pac.
Definition: ITensorPack.cpp:64
Memory group resources scope handling class.
Definition: IMemoryGroup.h:82
static Status validate(const ITensorInfo *input, const ITensorInfo *output, const ActivationLayerInfo &act_info)
Static function to check if given info will lead to a valid configuration.
static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *dst, const PadStrideInfo &conv_info)
Static function to check if given info will lead to a valid configuration.
static constexpr size_t DimZ
Alias for dimension 2 also known as Z dimension.
Definition: Window.h:47
#define ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(...)
Definition: Validate.h:541
uint8_t * buffer() const override
Interface to be implemented by the child class to return a pointer to CPU memory. ...
Definition: Tensor.cpp:43
#define ARM_COMPUTE_RETURN_ERROR_ON_MSG(cond, msg)
If the condition is true, an error is returned.
Definition: Error.h:244
Tensor packing service.
Definition: ITensorPack.h:39
#define ARM_COMPUTE_LOG_PARAMS(...)
Store the tensor&#39;s metadata.
Definition: TensorInfo.h:43
DataType
Available data types.
Definition: Types.h:79
void run(ITensorPack &tensors) override
Run the kernels contained in the function.
Describe a multidimensional execution window.
Definition: Window.h:39
void add_tensor(int id, ITensor *tensor)
Add tensor to the pack.
Definition: ITensorPack.cpp:39
virtual DataLayout data_layout() const =0
Get the data layout of the tensor.
static IScheduler & get()
Access the scheduler singleton.
Definition: Scheduler.cpp:94