24.02.1
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53 static const std::vector<CpuDirectConv3dKernel::DirectConv3dKernel> available_kernels = {
54 #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
55 {
"neon_fp16_directconv3d",
56 [](
const DataTypeISASelectorData &data) {
return data.dt ==
DataType::F16 && data.isa.fp16; },
59 {
"neon_fp32_directconv3d", [](
const DataTypeISASelectorData &data) {
return data.dt ==
DataType::F32; },
61 {
"neon_qasymm8_directconv3d", [](
const DataTypeISASelectorData &data) {
return data.dt ==
DataType::QASYMM8; },
63 {
"neon_qasymm8_signed_directconv3d",
68 const ITensorInfo *src1,
69 const ITensorInfo *src2,
70 const ITensorInfo *
dst,
83 CpuDirectConv3dKernel::get_implementation(DataTypeISASelectorData{src0->data_type(),
CPUInfo::get().get_isa()});
105 "Biases size and number of dst feature maps should match");
110 if (
dst->total_size() != 0)
140 _run_method = uk->ukernel;
141 _name = std::string(
"CpuDirectConv3dKernel").append(
"/").append(uk->name);
183 _run_method(src0, src1, src2,
dst, _conv_info, window);
188 return _name.c_str();
191 const std::vector<CpuDirectConv3dKernel::DirectConv3dKernel> &CpuDirectConv3dKernel::get_available_kernels()
193 return available_kernels;
Class to describe a number of elements in each dimension.
im2col_func configure(src_target.info(), dst_target.info(), spatial_kernel, conv_info, has_bias)
virtual const TensorShape & tensor_shape() const =0
Size for each dimension of the tensor.
DataLayout
[DataLayout enum definition]
Window calculate_max_window(const ValidRegion &valid_region, const Steps &steps, bool skip_border, BorderSize border_size)
@ QASYMM8
quantized, asymmetric fixed-point 8-bit number unsigned
Status validate_arguments(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *dst, const PadStrideInfo &conv_info)
#define ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(k)
#define REGISTER_QASYMM8_SIGNED_NEON(func_name)
static CPUInfo & get()
Access the KernelLibrary singleton.
ITensor * get_tensor(int id)
Get tensor of a given id from the pac.
#define REGISTER_FP16_NEON(func_name)
#define REGISTER_QASYMM8_NEON(func_name)
Includes all wrapper headers at once.
#define ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(...)
#define ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(t, c,...)
constexpr auto data_layout
#define ARM_COMPUTE_RETURN_ON_ERROR(status)
Checks if a status contains an error and returns it.
#define REGISTER_FP32_NEON(func_name)
#define ARM_COMPUTE_ERROR_ON_NULLPTR(...)
#define ARM_COMPUTE_ERROR_ON(cond)
If the condition is true then an error message is printed and an exception thrown.
const ITensor * get_const_tensor(int id) const
Get constant tensor of a given id.
#define ARM_COMPUTE_ERROR_THROW_ON(status)
#define ARM_COMPUTE_RETURN_ERROR_ON(cond)
If the condition is true, an error is returned.
#define ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(tensor)
bool auto_init_if_empty(ITensorInfo &info, const TensorShape &shape, int num_channels, DataType data_type, QuantizationInfo quantization_info=QuantizationInfo())
Auto initialize the tensor info (shape, number of channels and data type) if the current assignment i...
@ QASYMM8_SIGNED
quantized, asymmetric fixed-point 8-bit number signed
#define ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(f, s)
virtual DataType data_type() const =0
Data type used for each element of the tensor.
#define ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_LAYOUT(...)
#define ARM_COMPUTE_UNUSED(...)
To avoid unused variables warnings.
Information about executing thread and CPU.
size_t get_data_layout_dimension_index(const DataLayout &data_layout, const DataLayoutDimension &data_layout_dimension)
Get the index of the given dimension.
TensorShape compute_conv3d_shape(const TensorShape &src, const TensorShape &weights, const Conv3dInfo &conv3d_info)
Calculate the output shape of 3d Convolution.
Describe a multidimensional execution window.
#define ARM_COMPUTE_RETURN_ERROR_ON_MSG(cond, msg)
If the condition is true, an error is returned.
Copyright (c) 2017-2024 Arm Limited.
#define ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(...)
@ F16
16-bit floating-point number
Descriptor used by the 3d Convolution function.
@ S32
signed 32-bit number
#define ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(...)
Status validate(const ITensorInfo *scores_in, const ITensorInfo *boxes_in, const ITensorInfo *batch_splits_in, const ITensorInfo *scores_out, const ITensorInfo *boxes_out, const ITensorInfo *classes, const ITensorInfo *batch_splits_out, const ITensorInfo *keeps, const ITensorInfo *keeps_size, const BoxNMSLimitInfo info)
bool is_data_type_quantized(DataType dt)
Check if a given data type is of quantized type.
Store the tensor's metadata.
@ F32
32-bit floating-point number
ScaleKernelInfo info(interpolation_policy, default_border_mode, PixelValue(), sampling_policy, false)
DataType
Available data types.
@ NDHWC
Num samples, depth, height, width, channels.