31 #define ARM_COMPUTE_CPU_FEATURE_HWCAP_HALF (1 << 1)
32 #define ARM_COMPUTE_CPU_FEATURE_HWCAP_NEON (1 << 12)
35 #define ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMD (1 << 1)
36 #define ARM_COMPUTE_CPU_FEATURE_HWCAP_FPHP (1 << 9)
37 #define ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMDHP (1 << 10)
38 #define ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMDDP (1 << 20)
39 #define ARM_COMPUTE_CPU_FEATURE_HWCAP_SVE (1 << 22)
40 #define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVE2 (1 << 1)
41 #define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVEI8MM (1 << 9)
42 #define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVEF32MM (1 << 10)
43 #define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVEBF16 (1 << 12)
44 #define ARM_COMPUTE_CPU_FEATURE_HWCAP2_I8MM (1 << 13)
45 #define ARM_COMPUTE_CPU_FEATURE_HWCAP2_BF16 (1 << 14)
46 #define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SME (1 << 23)
54 inline bool is_feature_supported(uint64_t features, uint64_t feature_mask)
56 return (features & feature_mask);
60 void decode_hwcaps(CpuIsaInfo &
isa,
const uint32_t hwcaps,
const uint32_t hwcaps2)
66 #elif defined(__aarch64__)
67 void decode_hwcaps(CpuIsaInfo &
isa,
const uint32_t hwcaps,
const uint32_t hwcaps2)
90 void decode_hwcaps(CpuIsaInfo &
isa,
const uint32_t hwcaps,
const uint32_t hwcaps2)
96 void decode_regs(CpuIsaInfo &
isa,
101 const uint64_t svefr0)
103 auto is_supported = [](uint64_t feature_reg, uint8_t feature_pos) ->
bool
104 {
return ((feature_reg >> feature_pos) & 0xf); };
110 isa.sme2 = (((pfr1 >> 24) & 0xf) > 1);
129 void allowlisted_model_features(CpuIsaInfo &
isa,
CpuModel model)
131 if (
isa.dot ==
false)
135 if (
isa.fp16 ==
false)
146 decode_hwcaps(
isa, hwcaps, hwcaps2);
149 allowlisted_model_features(
isa, model);
159 decode_regs(
isa, isar0, isar1, pfr0, pfr1, svefr0);
162 allowlisted_model_features(
isa, model);