24.04
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24 #ifndef SRC_RUNTIME_HEURISTICS_DWC_NATIVE_ICLDWCNATIVEKERNELCONFIG
25 #define SRC_RUNTIME_HEURISTICS_DWC_NATIVE_ICLDWCNATIVEKERNELCONFIG
71 return _configs.at(
DT_F32);
73 return _configs.at(
DT_F16);
84 std::array<T, 3> _configs;
113 unsigned int depth_multiplier) = 0;
@ QSYMM8_PER_CHANNEL
quantized, symmetric per channel fixed-point 8-bit number
SimpleTensor< float > src
IClDWCNativeKernelConfig(GPUTarget arch)
Constructor.
static constexpr size_t DT_F16
Alias for F16 index.
@ QASYMM8
quantized, asymmetric fixed-point 8-bit number unsigned
Class for specifying the size of an image or rectangle.
ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(IClDWCNativeKernelConfig)
virtual DWCComputeKernelInfo configure(const ITensorInfo *src, const ITensorInfo *wei, const PadStrideInfo &conv_info, const Size2D &dilation, unsigned int depth_multiplier)=0
This method returns the DWCComputeKernelInfo for the given inputs.
virtual ~IClDWCNativeKernelConfig()=default
Virtual destructor.
Basic container for the OpenCL depthwise convolution configuration functions.
@ QASYMM8_SIGNED
quantized, asymmetric fixed-point 8-bit number signed
Basic interface for the depthwise convolution kernel configuration.
static constexpr size_t DT_F32
Alias for F32 index.
GPUTarget
Available GPU Targets.
Copyright (c) 2017-2024 Arm Limited.
@ F16
16-bit floating-point number
Compute descriptor used by the depthwise convolution native kernel.
T get_function(DataType data_type)
Method to return the depthwise convolution configuration function based on data type.
Store the tensor's metadata.
@ F32
32-bit floating-point number
static constexpr size_t DT_INT8
Alias for Int8 index.
DataType
Available data types.
ClDWCNativeConfigArray(T func_f32, T func_f16, T func_int8)
Constructor.