24.04
a55r1.cpp
Go to the documentation of this file.
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/*
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* Copyright (c) 2017-2018 Arm Limited.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifdef __aarch64__
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#include <arm_neon.h>
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#include "../../asmlib.hpp"
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namespace
arm_gemm
{
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void
a64_gemm_s8_8x12_a55r1(
const
int8_t *Apanel,
const
int8_t *Bpanel, int32_t *Cpanel,
const
int
ablocks,
const
int
bblocks,
const
int
K
) {
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const
int8_t *a_ptr = Apanel;
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int32_t *c_ptr = Cpanel;
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// We divide K by 4 because the sdot instruction processes 4 elements at a time.
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const
int
W =
K
/4;
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// Fix up for odd lengths - set a flag if K is odd, but make
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// sure we round up the iteration count.
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const
int
oddk = (W & 1);
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const
int
k_iters = ((W+1)/2) - 1;
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for
(
int
yb=0; yb<ablocks; yb++) {
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const
int8_t *a_ptr0 = a_ptr;
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const
int8_t *b_ptr = Bpanel;
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for
(
int
xb=0; xb<bblocks; xb++) {
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a_ptr = a_ptr0;
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int
k = k_iters;
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register
int32x4_t a0
asm
(
"v0"
);
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register
int32x4_t a1
asm
(
"v1"
);
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register
int32x4_t b0
asm
(
"v2"
);
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register
int32x4_t b1
asm
(
"v3"
);
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register
int32x4_t b2
asm
(
"v4"
);
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register
int32x4_t a0a
asm
(
"v5"
);
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register
int32x4_t a1a
asm
(
"v6"
);
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__asm __volatile (
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// Initialize result registers, load initial operands, prime prefetches.
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"movi v8.4s, #0x0\n"
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"ldr %q[a0], [%[a_ptr]]\n"
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"movi v9.4s, #0x0\n"
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"ldr %q[b0], [%[b_ptr]]\n"
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"movi v10.4s, #0x0\n"
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"ldr %q[a1], [%[a_ptr], #16]\n"
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"movi v11.4s, #0x0\n"
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"ldr %q[b1], [%[b_ptr], #16]\n"
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"movi v12.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[b_ptr], #64]"
)
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"movi v13.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[a_ptr], #64]"
)
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"movi v14.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[b_ptr], #128]"
)
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"movi v15.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[a_ptr], #128]"
)
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"movi v16.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[b_ptr], #192]"
)
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"movi v17.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[b_ptr], #256]"
)
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"movi v18.4s, #0x0\n"
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"movi v19.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[a_ptr], #192]"
)
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"movi v20.4s, #0x0\n"
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"movi v21.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[b_ptr], #320]"
)
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"movi v22.4s, #0x0\n"
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"movi v23.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[a_ptr], #256]"
)
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"movi v24.4s, #0x0\n"
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"movi v25.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[b_ptr], #384]"
)
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"movi v26.4s, #0x0\n"
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"movi v27.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[b_ptr], #448]"
)
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"movi v28.4s, #0x0\n"
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"movi v29.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[a_ptr], #384]"
)
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"movi v30.4s, #0x0\n"
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"movi v31.4s, #0x0\n"
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ASM_PREFETCH
(
"[%[b_ptr], #512]"
)
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// The loop is offset by these two instructions which must
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// always be executed.
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".word 0x4f80e048 // sdot v8.4s , %[b0].16b, %[a0].4b[0]\n"
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"ldr %d[b2], [%[b_ptr], #32]\n"
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// Skip loop if we are doing zero iterations of it.
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"cbz %w[k], 4f\n"
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"1:\n"
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".word 0x4fa0e049 // sdot v9.4s , %[b0].16b, %[a0].4b[1]\n"
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"ldr x20, [%[b_ptr], #40]\n"
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".word 0x4f80e84a // sdot v10.4s, %[b0].16b, %[a0].4b[2]\n"
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"subs %w[k], %w[k], #1\n"
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".word 0x4fa0e84b // sdot v11.4s, %[b0].16b, %[a0].4b[3]\n"
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"ldr %d[a0a], [%[a_ptr], #32]\n"
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".word 0x4f81e04c // sdot v12.4s, %[b0].16b, %[a1].4b[0]\n"
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"ins %[b2].d[1], x20\n"
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".word 0x4fa1e04d // sdot v13.4s, %[b0].16b, %[a1].4b[1]\n"
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"ldr x20, [%[a_ptr], #40]\n"
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".word 0x4f81e84e // sdot v14.4s, %[b0].16b, %[a1].4b[2]\n"
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".word 0x4fa1e84f // sdot v15.4s, %[b0].16b, %[a1].4b[3]\n"
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"ldr %d[a1a], [%[a_ptr], #48]\n"
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".word 0x4f80e070 // sdot v16.4s, %[b1].16b, %[a0].4b[0]\n"
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"ins %[a0a].d[1], x20\n"
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".word 0x4fa0e071 // sdot v17.4s, %[b1].16b, %[a0].4b[1]\n"
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"ldr x20, [%[a_ptr], #56]\n"
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".word 0x4f80e872 // sdot v18.4s, %[b1].16b, %[a0].4b[2]\n"
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".word 0x4fa0e873 // sdot v19.4s, %[b1].16b, %[a0].4b[3]\n"
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"ldr %d[b0], [%[b_ptr], #48]\n"
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".word 0x4f81e074 // sdot v20.4s, %[b1].16b, %[a1].4b[0]\n"
137
"ins %[a1a].d[1], x20\n"
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".word 0x4fa1e075 // sdot v21.4s, %[b1].16b, %[a1].4b[1]\n"
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"ldr x20, [%[b_ptr], #56]\n"
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".word 0x4f81e876 // sdot v22.4s, %[b1].16b, %[a1].4b[2]\n"
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".word 0x4fa1e877 // sdot v23.4s, %[b1].16b, %[a1].4b[3]\n"
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"ldr %d[b1], [%[b_ptr], #64]\n"
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".word 0x4f80e098 // sdot v24.4s, %[b2].16b, %[a0].4b[0]\n"
145
"ins %[b0].d[1], x20\n"
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".word 0x4fa0e099 // sdot v25.4s, %[b2].16b, %[a0].4b[1]\n"
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"ldr x20, [%[b_ptr], #72]\n"
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".word 0x4f80e89a // sdot v26.4s, %[b2].16b, %[a0].4b[2]\n"
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".word 0x4fa0e89b // sdot v27.4s, %[b2].16b, %[a0].4b[3]\n"
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ASM_PREFETCH
(
"[%[a_ptr], #448]"
)
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".word 0x4f81e09c // sdot v28.4s, %[b2].16b, %[a1].4b[0]\n"
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".word 0x4fa1e09d // sdot v29.4s, %[b2].16b, %[a1].4b[1]\n"
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ASM_PREFETCH
(
"[%[b_ptr], #576]"
)
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".word 0x4f81e89e // sdot v30.4s, %[b2].16b, %[a1].4b[2]\n"
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".word 0x4fa1e89f // sdot v31.4s, %[b2].16b, %[a1].4b[3]\n"
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// Unroll 1
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"ldr %d[b2], [%[b_ptr], #80]\n"
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".word 0x4f85e048 // sdot v8.4s , %[b0].16b, %[a0a].4b[0]\n"
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"ins %[b1].d[1], x20\n"
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".word 0x4fa5e049 // sdot v9.4s , %[b0].16b, %[a0a].4b[1]\n"
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"ldr x20, [%[b_ptr], #88]\n"
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".word 0x4f85e84a // sdot v10.4s, %[b0].16b, %[a0a].4b[2]\n"
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".word 0x4fa5e84b // sdot v11.4s, %[b0].16b, %[a0a].4b[3]\n"
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"ldr %d[a0], [%[a_ptr], #64]\n"
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".word 0x4f86e04c // sdot v12.4s, %[b0].16b, %[a1a].4b[0]\n"
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"ins %[b2].d[1], x20\n"
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".word 0x4fa6e04d // sdot v13.4s, %[b0].16b, %[a1a].4b[1]\n"
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"ldr x20, [%[a_ptr], #72]\n"
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".word 0x4f86e84e // sdot v14.4s, %[b0].16b, %[a1a].4b[2]\n"
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".word 0x4fa6e84f // sdot v15.4s, %[b0].16b, %[a1a].4b[3]\n"
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"ldr %d[a1], [%[a_ptr], #80]\n"
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".word 0x4f85e070 // sdot v16.4s, %[b1].16b, %[a0a].4b[0]\n"
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"ins %[a0].d[1], x20\n"
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".word 0x4fa5e071 // sdot v17.4s, %[b1].16b, %[a0a].4b[1]\n"
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"ldr x20, [%[a_ptr], #88]\n"
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".word 0x4f85e872 // sdot v18.4s, %[b1].16b, %[a0a].4b[2]\n"
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".word 0x4fa5e873 // sdot v19.4s, %[b1].16b, %[a0a].4b[3]\n"
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"ldr %d[b0], [%[b_ptr], #96]\n"
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".word 0x4f86e074 // sdot v20.4s, %[b1].16b, %[a1a].4b[0]\n"
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"ins %[a1].d[1], x20\n"
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".word 0x4fa6e075 // sdot v21.4s, %[b1].16b, %[a1a].4b[1]\n"
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"ldr x20, [%[b_ptr], #104]\n"
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".word 0x4f86e876 // sdot v22.4s, %[b1].16b, %[a1a].4b[2]\n"
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".word 0x4fa6e877 // sdot v23.4s, %[b1].16b, %[a1a].4b[3]\n"
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"ldr %d[b1], [%[b_ptr], #112]\n"
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".word 0x4f85e098 // sdot v24.4s, %[b2].16b, %[a0a].4b[0]\n"
194
"ins %[b0].d[1], x20\n"
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".word 0x4fa5e099 // sdot v25.4s, %[b2].16b, %[a0a].4b[1]\n"
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"ldr x20, [%[b_ptr], #120]\n"
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".word 0x4f85e89a // sdot v26.4s, %[b2].16b, %[a0a].4b[2]\n"
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".word 0x4fa5e89b // sdot v27.4s, %[b2].16b, %[a0a].4b[3]\n"
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"add %[a_ptr], %[a_ptr], #64\n"
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".word 0x4f86e09c // sdot v28.4s, %[b2].16b, %[a1a].4b[0]\n"
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ASM_PREFETCH
(
"[%[b_ptr], #640]"
)
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".word 0x4fa6e09d // sdot v29.4s, %[b2].16b, %[a1a].4b[1]\n"
204
"add %[b_ptr], %[b_ptr], #96\n"
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".word 0x4f86e89e // sdot v30.4s, %[b2].16b, %[a1a].4b[2]\n"
206
"ins %[b1].d[1], x20\n"
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".word 0x4fa6e89f // sdot v31.4s, %[b2].16b, %[a1a].4b[3]\n"
208
"ldr %d[b2], [%[b_ptr], #32]\n"
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".word 0x4f80e048 // sdot v8.4s , %[b0].16b, %[a0].4b[0]\n"
211
"b.ne 1b\n"
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// Branch here if K=1 or 2. Do the right thing for odd/even at the end.
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"4:\n"
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// Start final iteration - branch off to "odd" code before we load a0a.
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".word 0x4fa0e049 // sdot v9.4s , %[b0].16b, %[a0].4b[1]\n"
218
"ldr x20, [%[b_ptr], #40]\n"
219
".word 0x4f80e84a // sdot v10.4s, %[b0].16b, %[a0].4b[2]\n"
220
"cbnz %w[oddk], 2f\n"
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222
// Even K continuation
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".word 0x4fa0e84b // sdot v11.4s, %[b0].16b, %[a0].4b[3]\n"
224
"ldr %d[a0a], [%[a_ptr], #32]\n"
225
226
".word 0x4f81e04c // sdot v12.4s, %[b0].16b, %[a1].4b[0]\n"
227
"ins %[b2].d[1], x20\n"
228
".word 0x4fa1e04d // sdot v13.4s, %[b0].16b, %[a1].4b[1]\n"
229
"ldr x20, [%[a_ptr], #40]\n"
230
".word 0x4f81e84e // sdot v14.4s, %[b0].16b, %[a1].4b[2]\n"
231
ASM_PREFETCHW
(
"[%[c_ptr]]"
)
232
".word 0x4fa1e84f // sdot v15.4s, %[b0].16b, %[a1].4b[3]\n"
233
"ldr %d[a1a], [%[a_ptr], #48]\n"
234
235
".word 0x4f80e070 // sdot v16.4s, %[b1].16b, %[a0].4b[0]\n"
236
"ins %[a0a].d[1], x20\n"
237
".word 0x4fa0e071 // sdot v17.4s, %[b1].16b, %[a0].4b[1]\n"
238
"ldr x20, [%[a_ptr], #56]\n"
239
".word 0x4f80e872 // sdot v18.4s, %[b1].16b, %[a0].4b[2]\n"
240
".word 0x4fa0e873 // sdot v19.4s, %[b1].16b, %[a0].4b[3]\n"
241
"ldr %d[b0], [%[b_ptr], #48]\n"
242
243
".word 0x4f81e074 // sdot v20.4s, %[b1].16b, %[a1].4b[0]\n"
244
"ins %[a1a].d[1], x20\n"
245
".word 0x4fa1e075 // sdot v21.4s, %[b1].16b, %[a1].4b[1]\n"
246
"ldr x20, [%[b_ptr], #56]\n"
247
".word 0x4f81e876 // sdot v22.4s, %[b1].16b, %[a1].4b[2]\n"
248
ASM_PREFETCHW
(
"[%[c_ptr], #64]"
)
249
".word 0x4fa1e877 // sdot v23.4s, %[b1].16b, %[a1].4b[3]\n"
250
251
".word 0x4f80e098 // sdot v24.4s, %[b2].16b, %[a0].4b[0]\n"
252
".word 0x4fa0e099 // sdot v25.4s, %[b2].16b, %[a0].4b[1]\n"
253
ASM_PREFETCHW
(
"[%[c_ptr], #128]"
)
254
".word 0x4f80e89a // sdot v26.4s, %[b2].16b, %[a0].4b[2]\n"
255
".word 0x4fa0e89b // sdot v27.4s, %[b2].16b, %[a0].4b[3]\n"
256
"ldr %d[b1], [%[b_ptr], #64]\n"
257
258
".word 0x4f81e09c // sdot v28.4s, %[b2].16b, %[a1].4b[0]\n"
259
"ins %[b0].d[1], x20\n"
260
".word 0x4fa1e09d // sdot v29.4s, %[b2].16b, %[a1].4b[1]\n"
261
"ldr x20, [%[b_ptr], #72]\n"
262
".word 0x4f81e89e // sdot v30.4s, %[b2].16b, %[a1].4b[2]\n"
263
ASM_PREFETCHW
(
"[%[c_ptr], #192]"
)
264
".word 0x4fa1e89f // sdot v31.4s, %[b2].16b, %[a1].4b[3]\n"
265
"ldr %d[b2], [%[b_ptr], #80]\n"
266
267
".word 0x4f85e048 // sdot v8.4s , %[b0].16b, %[a0a].4b[0]\n"
268
"ins %[b1].d[1], x20\n"
269
".word 0x4fa5e049 // sdot v9.4s , %[b0].16b, %[a0a].4b[1]\n"
270
"ldr x20, [%[b_ptr], #88]\n"
271
".word 0x4f85e84a // sdot v10.4s, %[b0].16b, %[a0a].4b[2]\n"
272
"ins %[b2].d[1], x20\n"
273
274
".word 0x4fa5e84b // sdot v11.4s, %[b0].16b, %[a0a].4b[3]\n"
275
ASM_PREFETCHW
(
"[%[c_ptr], #256]"
)
276
".word 0x4f86e04c // sdot v12.4s, %[b0].16b, %[a1a].4b[0]\n"
277
".word 0x4fa6e04d // sdot v13.4s, %[b0].16b, %[a1a].4b[1]\n"
278
".word 0x4f86e84e // sdot v14.4s, %[b0].16b, %[a1a].4b[2]\n"
279
ASM_PREFETCHW
(
"[%[c_ptr], #320]"
)
280
".word 0x4fa6e84f // sdot v15.4s, %[b0].16b, %[a1a].4b[3]\n"
281
".word 0x4f85e070 // sdot v16.4s, %[b1].16b, %[a0a].4b[0]\n"
282
ASM_PREFETCHWL2(
"[%[c_ptr], #384]"
)
283
".word 0x4fa5e071 // sdot v17.4s, %[b1].16b, %[a0a].4b[1]\n"
284
".word 0x4f85e872 // sdot v18.4s, %[b1].16b, %[a0a].4b[2]\n"
285
ASM_PREFETCHWL2(
"[%[c_ptr], #448]"
)
286
".word 0x4fa5e873 // sdot v19.4s, %[b1].16b, %[a0a].4b[3]\n"
287
".word 0x4f86e074 // sdot v20.4s, %[b1].16b, %[a1a].4b[0]\n"
288
".word 0x4fa6e075 // sdot v21.4s, %[b1].16b, %[a1a].4b[1]\n"
289
ASM_PREFETCHWL2(
"[%[c_ptr], #512]"
)
290
".word 0x4f86e876 // sdot v22.4s, %[b1].16b, %[a1a].4b[2]\n"
291
".word 0x4fa6e877 // sdot v23.4s, %[b1].16b, %[a1a].4b[3]\n"
292
ASM_PREFETCHWL2(
"[%[c_ptr], #576]"
)
293
".word 0x4f85e098 // sdot v24.4s, %[b2].16b, %[a0a].4b[0]\n"
294
".word 0x4fa5e099 // sdot v25.4s, %[b2].16b, %[a0a].4b[1]\n"
295
".word 0x4f85e89a // sdot v26.4s, %[b2].16b, %[a0a].4b[2]\n"
296
ASM_PREFETCHWL2(
"[%[c_ptr], #640]"
)
297
".word 0x4fa5e89b // sdot v27.4s, %[b2].16b, %[a0a].4b[3]\n"
298
".word 0x4f86e09c // sdot v28.4s, %[b2].16b, %[a1a].4b[0]\n"
299
ASM_PREFETCHWL2(
"[%[c_ptr], #704]"
)
300
".word 0x4fa6e09d // sdot v29.4s, %[b2].16b, %[a1a].4b[1]\n"
301
"add %[a_ptr], %[a_ptr], #64\n"
302
".word 0x4f86e89e // sdot v30.4s, %[b2].16b, %[a1a].4b[2]\n"
303
"add %[b_ptr], %[b_ptr], #96\n"
304
".word 0x4fa6e89f // sdot v31.4s, %[b2].16b, %[a1a].4b[3]\n"
305
"b 3f\n"
306
307
// Odd K continuation
308
"2:\n"
309
".word 0x4fa0e84b // sdot v11.4s, %[b0].16b, %[a0].4b[3]\n"
310
ASM_PREFETCHW
(
"[%[c_ptr]]"
)
311
".word 0x4f81e04c // sdot v12.4s, %[b0].16b, %[a1].4b[0]\n"
312
"ins %[b2].d[1], x20\n"
313
".word 0x4fa1e04d // sdot v13.4s, %[b0].16b, %[a1].4b[1]\n"
314
ASM_PREFETCHW
(
"[%[c_ptr], #64]"
)
315
".word 0x4f81e84e // sdot v14.4s, %[b0].16b, %[a1].4b[2]\n"
316
"add %[a_ptr], %[a_ptr], #32\n"
317
".word 0x4fa1e84f // sdot v15.4s, %[b0].16b, %[a1].4b[3]\n"
318
ASM_PREFETCHW
(
"[%[c_ptr], #128]"
)
319
".word 0x4f80e070 // sdot v16.4s, %[b1].16b, %[a0].4b[0]\n"
320
"add %[b_ptr], %[b_ptr], #48\n"
321
".word 0x4fa0e071 // sdot v17.4s, %[b1].16b, %[a0].4b[1]\n"
322
ASM_PREFETCHW
(
"[%[c_ptr], #192]"
)
323
".word 0x4f80e872 // sdot v18.4s, %[b1].16b, %[a0].4b[2]\n"
324
".word 0x4fa0e873 // sdot v19.4s, %[b1].16b, %[a0].4b[3]\n"
325
ASM_PREFETCHW
(
"[%[c_ptr], #256]"
)
326
".word 0x4f81e074 // sdot v20.4s, %[b1].16b, %[a1].4b[0]\n"
327
".word 0x4fa1e075 // sdot v21.4s, %[b1].16b, %[a1].4b[1]\n"
328
ASM_PREFETCHW
(
"[%[c_ptr], #320]"
)
329
".word 0x4f81e876 // sdot v22.4s, %[b1].16b, %[a1].4b[2]\n"
330
".word 0x4fa1e877 // sdot v23.4s, %[b1].16b, %[a1].4b[3]\n"
331
ASM_PREFETCHWL2(
"[%[c_ptr], #384]"
)
332
".word 0x4f80e098 // sdot v24.4s, %[b2].16b, %[a0].4b[0]\n"
333
".word 0x4fa0e099 // sdot v25.4s, %[b2].16b, %[a0].4b[1]\n"
334
ASM_PREFETCHWL2(
"[%[c_ptr], #448]"
)
335
".word 0x4f80e89a // sdot v26.4s, %[b2].16b, %[a0].4b[2]\n"
336
".word 0x4fa0e89b // sdot v27.4s, %[b2].16b, %[a0].4b[3]\n"
337
ASM_PREFETCHWL2(
"[%[c_ptr], #512]"
)
338
".word 0x4f81e09c // sdot v28.4s, %[b2].16b, %[a1].4b[0]\n"
339
ASM_PREFETCHWL2(
"[%[c_ptr], #576]"
)
340
".word 0x4fa1e09d // sdot v29.4s, %[b2].16b, %[a1].4b[1]\n"
341
ASM_PREFETCHWL2(
"[%[c_ptr], #640]"
)
342
".word 0x4f81e89e // sdot v30.4s, %[b2].16b, %[a1].4b[2]\n"
343
ASM_PREFETCHWL2(
"[%[c_ptr], #704]"
)
344
".word 0x4fa1e89f // sdot v31.4s, %[b2].16b, %[a1].4b[3]\n"
345
346
// Common tail
347
"3:\n"
348
"str q8, [%[c_ptr]]\n"
349
"str q16, [%[c_ptr], #16]\n"
350
"str q24, [%[c_ptr], #32]\n"
351
"str q9, [%[c_ptr], #48]\n"
352
"str q17, [%[c_ptr], #64]\n"
353
"str q25, [%[c_ptr], #80]\n"
354
"str q10, [%[c_ptr], #96]\n"
355
"str q18, [%[c_ptr], #112]\n"
356
"str q26, [%[c_ptr], #128]\n"
357
"str q11, [%[c_ptr], #144]\n"
358
"str q19, [%[c_ptr], #160]\n"
359
"str q27, [%[c_ptr], #176]\n"
360
"str q12, [%[c_ptr], #192]\n"
361
"str q20, [%[c_ptr], #208]\n"
362
"str q28, [%[c_ptr], #224]\n"
363
"str q13, [%[c_ptr], #240]\n"
364
"str q21, [%[c_ptr], #256]\n"
365
"str q29, [%[c_ptr], #272]\n"
366
"str q14, [%[c_ptr], #288]\n"
367
"str q22, [%[c_ptr], #304]\n"
368
"str q30, [%[c_ptr], #320]\n"
369
"str q15, [%[c_ptr], #336]\n"
370
"str q23, [%[c_ptr], #352]\n"
371
"str q31, [%[c_ptr], #368]\n"
372
"add %[c_ptr], %[c_ptr], #384\n"
373
374
:
375
[a_ptr]
"+r"
(a_ptr), [b_ptr]
"+r"
(b_ptr), [c_ptr]
"+r"
(c_ptr),
376
[a0]
"+w"
(a0), [a1]
"+w"
(a1), [a0a]
"+w"
(a0a), [a1a]
"+w"
(a1a),
377
[b0]
"+w"
(b0), [b1]
"+w"
(b1), [b2]
"+w"
(b2), [k]
"+r"
(k)
378
: [oddk]
"r"
(oddk)
379
:
"x20"
,
"x21"
,
"v8"
,
"v9"
,
"v10"
,
"v11"
,
"v12"
,
"v13"
,
"v14"
,
"v15"
,
"v16"
,
"v17"
,
"v18"
,
380
"v19"
,
"v20"
,
"v21"
,
"v22"
,
"v23"
,
"v24"
,
"v25"
,
"v26"
,
"v27"
,
"v28"
,
"v29"
,
"v30"
,
"v31"
,
"cc"
,
"memory"
381
);
382
383
}
384
}
385
}
386
387
}
// namespace arm_gemm
388
389
#endif
ASM_PREFETCH
#define ASM_PREFETCH(address)
Definition:
asmlib.hpp:45
arm_gemm
Definition:
barrier.hpp:30
K
unsigned int K
Definition:
CpuGemmAssemblyDispatch.cpp:106
ASM_PREFETCHW
#define ASM_PREFETCHW(address)
Definition:
asmlib.hpp:46
src
core
NEON
kernels
arm_gemm
kernels
a64_gemm_s8_8x12
a55r1.cpp
Generated on Mon Apr 29 2024 10:53:55 for Compute Library by
1.8.17