24.04
a64_interleave8_block1_u8_u16_summing.hpp
Go to the documentation of this file.
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/*
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* Copyright (c) 2019-2021, 2023 Arm Limited.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifdef __aarch64__
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template
<>
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void
interleave_block<8, 1, VLType::None, true>(
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uint16_t * &out_ptr,
const
uint8_t *
const
* in,
size_t
width,
size_t
height,
30
size_t
row_offset,
bool
first
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)
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{
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__asm__ __volatile__(
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"ldr x28, [%x[in], #0x0]\n"
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"ldr x27, [%x[in], #0x8]\n"
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"cmp %x[height], #0x8\n"
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"mov x20, #0x0\n"
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"ldr x26, [%x[in], #0x10]\n"
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"ldr x25, [%x[in], #0x18]\n"
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"movi v2.8h, #0x0\n"
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"movi v1.4s, #0x0\n"
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"ldr x24, [%x[in], #0x20]\n"
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"ldr x23, [%x[in], #0x28]\n"
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"movi v0.4s, #0x0\n"
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"add x28, x28, %x[row_offset]\n"
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"ldr x22, [%x[in], #0x30]\n"
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"ldr x21, [%x[in], #0x38]\n"
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"add x27, x27, %x[row_offset]\n"
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"add x26, x26, %x[row_offset]\n"
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"add x25, x25, %x[row_offset]\n"
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"add x24, x24, %x[row_offset]\n"
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"add x23, x23, %x[row_offset]\n"
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"add x22, x22, %x[row_offset]\n"
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"add x21, x21, %x[row_offset]\n"
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"beq 1f\n"
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"cmp %x[height], #0x2\n"
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"csel x27, x27, x28, GE\n"
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"csel x26, x26, x28, GT\n"
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"cmp %x[height], #0x4\n"
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"csel x25, x25, x28, GE\n"
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"csel x24, x24, x28, GT\n"
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"cmp %x[height], #0x6\n"
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"mov x21, x28\n"
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"csel x23, x23, x28, GE\n"
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"csel x22, x22, x28, GT\n"
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"1:"
// no_pointer_adj
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"prfm pldl1keep, [x28, #0x0]\n"
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"prfm pldl1keep, [x27, #0x0]\n"
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"prfm pldl1keep, [x26, #0x0]\n"
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"prfm pldl1keep, [x25, #0x0]\n"
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"prfm pldl1keep, [x24, #0x0]\n"
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"prfm pldl1keep, [x23, #0x0]\n"
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"prfm pldl1keep, [x22, #0x0]\n"
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"prfm pldl1keep, [x21, #0x0]\n"
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"prfm pldl1keep, [x28, #0x40]\n"
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"prfm pldl1keep, [x27, #0x40]\n"
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"prfm pldl1keep, [x26, #0x40]\n"
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"prfm pldl1keep, [x25, #0x40]\n"
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"prfm pldl1keep, [x24, #0x40]\n"
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"prfm pldl1keep, [x23, #0x40]\n"
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"prfm pldl1keep, [x22, #0x40]\n"
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"prfm pldl1keep, [x21, #0x40]\n"
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"cbnz %w[first], 2f\n"
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"sub %x[out_ptr], %x[out_ptr], #0x20\n"
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"ld1 { v1.4s }, [%x[out_ptr]]\n"
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"ldr q0, [%x[out_ptr], #0x10]\n"
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"2:"
// first_pass
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"cmp %x[width], #0x8\n"
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"blt 5f\n"
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"3:"
// Main loop head
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"cmp x20, #0xe\n"
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"ble 4f\n"
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"uaddw v1.4s, v1.4s, v2.4h\n"
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"uaddw2 v0.4s, v0.4s, v2.8h\n"
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"mov x20, #0x0\n"
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"movi v2.8h, #0x0\n"
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"4:"
// no_accumulate_16
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"ldr d31, [x28], #0x8\n"
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"ldr d30, [x27], #0x8\n"
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"ushll v31.8h, v31.8b, #0x0\n"
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"ushll v30.8h, v30.8b, #0x0\n"
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"ldr d29, [x26], #0x8\n"
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"ldr d28, [x25], #0x8\n"
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"ushll v29.8h, v29.8b, #0x0\n"
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"ushll v28.8h, v28.8b, #0x0\n"
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"ldr d27, [x24], #0x8\n"
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"ldr d26, [x23], #0x8\n"
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"ushll v27.8h, v27.8b, #0x0\n"
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"ushll v26.8h, v26.8b, #0x0\n"
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"ldr d25, [x22], #0x8\n"
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"ldr d24, [x21], #0x8\n"
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"ushll v25.8h, v25.8b, #0x0\n"
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"ushll v24.8h, v24.8b, #0x0\n"
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"zip1 v23.8h, v31.8h, v27.8h\n"
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"zip1 v22.8h, v29.8h, v25.8h\n"
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"subs %x[width], %x[width], #0x8\n"
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"cmp %x[width], #0x8\n"
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"zip1 v21.8h, v30.8h, v26.8h\n"
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"zip1 v20.8h, v28.8h, v24.8h\n"
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"prfm pldl1keep, [x28, #0x70]\n"
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"prfm pldl1keep, [x27, #0x70]\n"
122
"zip1 v18.8h, v23.8h, v22.8h\n"
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"zip1 v17.8h, v21.8h, v20.8h\n"
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"prfm pldl1keep, [x26, #0x70]\n"
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"prfm pldl1keep, [x25, #0x70]\n"
126
"zip1 v16.8h, v18.8h, v17.8h\n"
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"add v2.8h, v2.8h, v16.8h\n"
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"prfm pldl1keep, [x24, #0x70]\n"
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"prfm pldl1keep, [x23, #0x70]\n"
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"zip2 v19.8h, v18.8h, v17.8h\n"
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"zip2 v18.8h, v23.8h, v22.8h\n"
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"prfm pldl1keep, [x22, #0x70]\n"
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"prfm pldl1keep, [x21, #0x70]\n"
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"zip2 v17.8h, v21.8h, v20.8h\n"
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"add v2.8h, v2.8h, v19.8h\n"
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"str q16, [%x[out_ptr], #0x0]\n"
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"add x20, x20, #0x1\n"
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"zip1 v16.8h, v18.8h, v17.8h\n"
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"zip2 v22.8h, v31.8h, v27.8h\n"
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"str q19, [%x[out_ptr], #0x10]\n"
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"zip2 v21.8h, v29.8h, v25.8h\n"
142
"zip2 v20.8h, v30.8h, v26.8h\n"
143
"str q16, [%x[out_ptr], #0x20]\n"
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"zip2 v19.8h, v28.8h, v24.8h\n"
145
"add v2.8h, v2.8h, v16.8h\n"
146
"zip2 v16.8h, v18.8h, v17.8h\n"
147
"zip1 v18.8h, v22.8h, v21.8h\n"
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"str q16, [%x[out_ptr], #0x30]\n"
149
"zip1 v17.8h, v20.8h, v19.8h\n"
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"add v2.8h, v2.8h, v16.8h\n"
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"zip1 v16.8h, v18.8h, v17.8h\n"
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"add v2.8h, v2.8h, v16.8h\n"
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"str q16, [%x[out_ptr], #0x40]\n"
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"zip2 v16.8h, v18.8h, v17.8h\n"
155
"zip2 v18.8h, v22.8h, v21.8h\n"
156
"str q16, [%x[out_ptr], #0x50]\n"
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"zip2 v17.8h, v20.8h, v19.8h\n"
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"add v2.8h, v2.8h, v16.8h\n"
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"zip1 v16.8h, v18.8h, v17.8h\n"
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"add v2.8h, v2.8h, v16.8h\n"
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"str q16, [%x[out_ptr], #0x60]\n"
162
"zip2 v16.8h, v18.8h, v17.8h\n"
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"str q16, [%x[out_ptr], #0x70]\n"
164
"add v2.8h, v2.8h, v16.8h\n"
165
"add %x[out_ptr], %x[out_ptr], #0x80\n"
166
"bge 3b\n"
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"5:"
// Main loop skip
168
"cbz %x[width], 10f\n"
169
"tbz %x[width], #2, 7f\n"
170
"ldr s30, [x28], #0x4\n"
171
"ldr s29, [x27], #0x4\n"
172
"ldr s28, [x26], #0x4\n"
173
"ldr s27, [x25], #0x4\n"
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"ldr s26, [x24], #0x4\n"
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"ldr s25, [x23], #0x4\n"
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"ldr s24, [x22], #0x4\n"
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"ldr s23, [x21], #0x4\n"
178
"tbz %x[width], #1, 6f\n"
179
"ld1 { v30.h }[2], [x28], #0x2\n"
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"ld1 { v29.h }[2], [x27], #0x2\n"
181
"mov x20, #0x6\n"
182
"ld1 { v28.h }[2], [x26], #0x2\n"
183
"ld1 { v27.h }[2], [x25], #0x2\n"
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"ld1 { v26.h }[2], [x24], #0x2\n"
185
"ld1 { v25.h }[2], [x23], #0x2\n"
186
"ld1 { v24.h }[2], [x22], #0x2\n"
187
"ld1 { v23.h }[2], [x21], #0x2\n"
188
"tbz %x[width], #0, 9f\n"
189
"ld1 { v30.b }[6], [x28]\n"
190
"ld1 { v29.b }[6], [x27]\n"
191
"mov x20, #0x7\n"
192
"ld1 { v28.b }[6], [x26]\n"
193
"ld1 { v27.b }[6], [x25]\n"
194
"ld1 { v26.b }[6], [x24]\n"
195
"ld1 { v25.b }[6], [x23]\n"
196
"ld1 { v24.b }[6], [x22]\n"
197
"ld1 { v23.b }[6], [x21]\n"
198
"b 9f\n"
199
"6:"
// odd_loads_1_4
200
"mov x20, #0x4\n"
201
"tbz %x[width], #0, 9f\n"
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"ld1 { v30.b }[4], [x28]\n"
203
"ld1 { v29.b }[4], [x27]\n"
204
"mov x20, #0x5\n"
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"ld1 { v28.b }[4], [x26]\n"
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"ld1 { v27.b }[4], [x25]\n"
207
"ld1 { v26.b }[4], [x24]\n"
208
"ld1 { v25.b }[4], [x23]\n"
209
"ld1 { v24.b }[4], [x22]\n"
210
"ld1 { v23.b }[4], [x21]\n"
211
"b 9f\n"
212
"7:"
// odd_loads_2_0
213
"tbz %x[width], #1, 8f\n"
214
"ldr h30, [x28], #0x2\n"
215
"ldr h29, [x27], #0x2\n"
216
"mov x20, #0x2\n"
217
"ldr h28, [x26], #0x2\n"
218
"ldr h27, [x25], #0x2\n"
219
"ldr h26, [x24], #0x2\n"
220
"ldr h25, [x23], #0x2\n"
221
"ldr h24, [x22], #0x2\n"
222
"ldr h23, [x21], #0x2\n"
223
"tbz %x[width], #0, 9f\n"
224
"ld1 { v30.b }[2], [x28]\n"
225
"ld1 { v29.b }[2], [x27]\n"
226
"mov x20, #0x3\n"
227
"ld1 { v28.b }[2], [x26]\n"
228
"ld1 { v27.b }[2], [x25]\n"
229
"ld1 { v26.b }[2], [x24]\n"
230
"ld1 { v25.b }[2], [x23]\n"
231
"ld1 { v24.b }[2], [x22]\n"
232
"ld1 { v23.b }[2], [x21]\n"
233
"b 9f\n"
234
"8:"
// odd_loads_1_0
235
"ldr b30, [x28, #0x0]\n"
236
"ldr b29, [x27, #0x0]\n"
237
"mov x20, #0x1\n"
238
"ldr b28, [x26, #0x0]\n"
239
"ldr b27, [x25, #0x0]\n"
240
"ldr b26, [x24, #0x0]\n"
241
"ldr b25, [x23, #0x0]\n"
242
"ldr b24, [x22, #0x0]\n"
243
"ldr b23, [x21, #0x0]\n"
244
"9:"
// Odd load end
245
"ushll v30.8h, v30.8b, #0x0\n"
246
"ushll v29.8h, v29.8b, #0x0\n"
247
"subs x20, x20, #0x1\n"
248
"ushll v28.8h, v28.8b, #0x0\n"
249
"ushll v27.8h, v27.8b, #0x0\n"
250
"ushll v26.8h, v26.8b, #0x0\n"
251
"ushll v25.8h, v25.8b, #0x0\n"
252
"ushll v24.8h, v24.8b, #0x0\n"
253
"ushll v23.8h, v23.8b, #0x0\n"
254
"zip1 v22.8h, v30.8h, v26.8h\n"
255
"zip1 v21.8h, v28.8h, v24.8h\n"
256
"zip1 v20.8h, v29.8h, v25.8h\n"
257
"zip1 v19.8h, v27.8h, v23.8h\n"
258
"zip1 v18.8h, v22.8h, v21.8h\n"
259
"zip1 v17.8h, v20.8h, v19.8h\n"
260
"zip1 v16.8h, v18.8h, v17.8h\n"
261
"str q16, [%x[out_ptr], #0x0]\n"
262
"add v2.8h, v2.8h, v16.8h\n"
263
"add %x[out_ptr], %x[out_ptr], #0x10\n"
264
"beq 10f\n"
265
"zip2 v16.8h, v18.8h, v17.8h\n"
266
"subs x20, x20, #0x1\n"
267
"str q16, [%x[out_ptr], #0x0]\n"
268
"add v2.8h, v2.8h, v16.8h\n"
269
"add %x[out_ptr], %x[out_ptr], #0x10\n"
270
"beq 10f\n"
271
"zip2 v18.8h, v22.8h, v21.8h\n"
272
"zip2 v17.8h, v20.8h, v19.8h\n"
273
"subs x20, x20, #0x1\n"
274
"zip1 v16.8h, v18.8h, v17.8h\n"
275
"str q16, [%x[out_ptr], #0x0]\n"
276
"add v2.8h, v2.8h, v16.8h\n"
277
"add %x[out_ptr], %x[out_ptr], #0x10\n"
278
"beq 10f\n"
279
"zip2 v16.8h, v18.8h, v17.8h\n"
280
"subs x20, x20, #0x1\n"
281
"str q16, [%x[out_ptr], #0x0]\n"
282
"add v2.8h, v2.8h, v16.8h\n"
283
"add %x[out_ptr], %x[out_ptr], #0x10\n"
284
"beq 10f\n"
285
"zip2 v22.8h, v30.8h, v26.8h\n"
286
"zip2 v21.8h, v28.8h, v24.8h\n"
287
"subs x20, x20, #0x1\n"
288
"zip2 v20.8h, v29.8h, v25.8h\n"
289
"zip2 v19.8h, v27.8h, v23.8h\n"
290
"zip1 v18.8h, v22.8h, v21.8h\n"
291
"zip1 v17.8h, v20.8h, v19.8h\n"
292
"zip1 v16.8h, v18.8h, v17.8h\n"
293
"str q16, [%x[out_ptr], #0x0]\n"
294
"add v2.8h, v2.8h, v16.8h\n"
295
"add %x[out_ptr], %x[out_ptr], #0x10\n"
296
"beq 10f\n"
297
"zip2 v16.8h, v18.8h, v17.8h\n"
298
"subs x20, x20, #0x1\n"
299
"str q16, [%x[out_ptr], #0x0]\n"
300
"add v2.8h, v2.8h, v16.8h\n"
301
"add %x[out_ptr], %x[out_ptr], #0x10\n"
302
"beq 10f\n"
303
"zip2 v17.8h, v22.8h, v21.8h\n"
304
"zip2 v16.8h, v20.8h, v19.8h\n"
305
"zip1 v16.8h, v17.8h, v16.8h\n"
306
"str q16, [%x[out_ptr], #0x0]\n"
307
"add v2.8h, v2.8h, v16.8h\n"
308
"add %x[out_ptr], %x[out_ptr], #0x10\n"
309
"10:"
// Odds skip
310
"uaddw v1.4s, v1.4s, v2.4h\n"
311
"uaddw2 v0.4s, v0.4s, v2.8h\n"
312
"str q1, [%x[out_ptr], #0x0]\n"
313
"str q0, [%x[out_ptr], #0x10]\n"
314
"add %x[out_ptr], %x[out_ptr], #0x20\n"
315
: [out_ptr]
"+&r"
(out_ptr), [width]
"+&r"
(width)
316
: [first]
"r"
(first), [height]
"r"
(height), [in]
"r"
(in), [row_offset]
"r"
(row_offset)
317
:
"cc"
,
"memory"
,
"v0"
,
"v1"
,
"v2"
,
"v16"
,
"v17"
,
"v18"
,
"v19"
,
"v20"
,
"v21"
,
"v22"
,
"v23"
,
"v24"
,
"v25"
,
"v26"
,
"v27"
,
"v28"
,
"v29"
,
"v30"
,
"v31"
,
"x20"
,
"x21"
,
"x22"
,
"x23"
,
"x24"
,
"x25"
,
"x26"
,
"x27"
,
"x28"
318
);
319
}
320
321
322
#endif // __aarch64__
src
core
NEON
kernels
arm_gemm
indirect-interleaves
a64_interleave8_block1_u8_u16_summing.hpp
Generated on Mon Apr 29 2024 10:53:55 for Compute Library by
1.8.17