27 #if defined(__aarch64__)
31 void a64_transpose_interleave_16_1x8(uint8_t *out,
const uint8_t *in,
size_t width,
size_t in_stride,
size_t height)
33 uint8_t *pad_row =
reinterpret_cast<uint8_t *
>(alloca(width *
sizeof(uint8_t)));
36 memset(pad_row, 0, width *
sizeof(uint8_t));
39 size_t out_stride = 16 * roundup<size_t>(height, 8) *
sizeof(uint8_t);
44 "add x28, x9, %x[in_stride]\n"
45 "add x27, x28, %x[in_stride]\n"
46 "add x26, x27, %x[in_stride]\n"
47 "add x25, x26, %x[in_stride]\n"
48 "add x24, x25, %x[in_stride]\n"
49 "add x23, x24, %x[in_stride]\n"
50 "add x22, x23, %x[in_stride]\n"
51 "cmp %x[height], #0x7\n"
52 "add %x[in], x22, %x[in_stride]\n"
53 "csel x22, x22, %x[pad_row], GT\n"
54 "csel x23, x23, %x[pad_row], GE\n"
55 "cmp %x[height], #0x5\n"
56 "mov x21, %x[width]\n"
57 "csel x24, x24, %x[pad_row], GT\n"
58 "csel x25, x25, %x[pad_row], GE\n"
59 "cmp %x[height], #0x3\n"
60 "csel x26, x26, %x[pad_row], GT\n"
61 "csel x27, x27, %x[pad_row], GE\n"
62 "cmp %x[height], #0x1\n"
63 "csel x28, x28, %x[pad_row], GT\n"
66 "sub %x[height], %x[height], #0x8\n"
69 "ldr q23, [x9], #0x10\n"
70 "ldr q22, [x28], #0x10\n"
71 "sub x21, x21, #0x20\n"
73 "ldr q20, [x27], #0x10\n"
74 "ldr q21, [x26], #0x10\n"
75 "ldr q19, [x25], #0x10\n"
76 "ldr q18, [x24], #0x10\n"
77 "zip1 v5.16b, v23.16b, v19.16b\n"
78 "zip1 v4.16b, v22.16b, v18.16b\n"
79 "ldr q17, [x23], #0x10\n"
80 "ldr q16, [x22], #0x10\n"
81 "zip1 v3.16b, v20.16b, v17.16b\n"
82 "zip1 v31.16b, v21.16b, v16.16b\n"
83 "ldr q25, [x9], #0x10\n"
84 "ldr q24, [x28], #0x10\n"
85 "zip2 v2.16b, v23.16b, v19.16b\n"
86 "zip2 v30.16b, v20.16b, v17.16b\n"
87 "ldr q23, [x27], #0x10\n"
88 "ldr q20, [x26], #0x10\n"
89 "zip2 v22.16b, v22.16b, v18.16b\n"
90 "zip2 v21.16b, v21.16b, v16.16b\n"
91 "ldr q19, [x25], #0x10\n"
92 "ldr q18, [x24], #0x10\n"
93 "zip1 v29.16b, v25.16b, v19.16b\n"
94 "zip1 v28.16b, v24.16b, v18.16b\n"
95 "ldr q17, [x23], #0x10\n"
96 "ldr q16, [x22], #0x10\n"
97 "zip1 v27.16b, v23.16b, v17.16b\n"
98 "zip1 v26.16b, v20.16b, v16.16b\n"
99 "zip2 v1.16b, v25.16b, v19.16b\n"
100 "zip2 v25.16b, v23.16b, v17.16b\n"
101 "zip2 v24.16b, v24.16b, v18.16b\n"
102 "zip2 v16.16b, v20.16b, v16.16b\n"
103 "zip1 v0.16b, v5.16b, v3.16b\n"
104 "zip1 v17.16b, v4.16b, v31.16b\n"
105 "zip2 v20.16b, v5.16b, v3.16b\n"
106 "zip2 v19.16b, v4.16b, v31.16b\n"
107 "zip1 v31.16b, v2.16b, v30.16b\n"
108 "zip1 v18.16b, v22.16b, v21.16b\n"
109 "zip2 v30.16b, v2.16b, v30.16b\n"
110 "zip2 v23.16b, v22.16b, v21.16b\n"
111 "zip1 v22.16b, v29.16b, v27.16b\n"
112 "zip1 v21.16b, v28.16b, v26.16b\n"
113 "zip2 v29.16b, v29.16b, v27.16b\n"
114 "zip2 v28.16b, v28.16b, v26.16b\n"
115 "zip1 v27.16b, v1.16b, v25.16b\n"
116 "zip1 v26.16b, v24.16b, v16.16b\n"
117 "zip2 v25.16b, v1.16b, v25.16b\n"
118 "zip2 v24.16b, v24.16b, v16.16b\n"
119 "zip1 v16.16b, v0.16b, v17.16b\n"
120 "zip2 v17.16b, v0.16b, v17.16b\n"
121 "str q16, [x20, #0x0]\n"
122 "zip1 v16.16b, v20.16b, v19.16b\n"
123 "zip2 v20.16b, v20.16b, v19.16b\n"
124 "str q17, [x20, #0x10]\n"
125 "zip1 v19.16b, v31.16b, v18.16b\n"
126 "zip2 v18.16b, v31.16b, v18.16b\n"
127 "str q16, [x20, #0x20]\n"
128 "zip1 v17.16b, v30.16b, v23.16b\n"
129 "zip2 v16.16b, v30.16b, v23.16b\n"
130 "str q20, [x20, #0x30]\n"
131 "str q19, [x20, #0x40]\n"
132 "zip1 v23.16b, v22.16b, v21.16b\n"
133 "zip2 v22.16b, v22.16b, v21.16b\n"
134 "str q18, [x20, #0x50]\n"
135 "zip1 v21.16b, v29.16b, v28.16b\n"
136 "zip2 v20.16b, v29.16b, v28.16b\n"
137 "str q17, [x20, #0x60]\n"
138 "zip1 v19.16b, v27.16b, v26.16b\n"
139 "zip2 v18.16b, v27.16b, v26.16b\n"
140 "str q16, [x20, #0x70]\n"
141 "add x20, x20, %x[out_stride]\n"
142 "zip1 v17.16b, v25.16b, v24.16b\n"
143 "zip2 v16.16b, v25.16b, v24.16b\n"
144 "str q23, [x20, #0x0]\n"
145 "str q22, [x20, #0x10]\n"
146 "str q21, [x20, #0x20]\n"
147 "str q20, [x20, #0x30]\n"
148 "str q19, [x20, #0x40]\n"
149 "str q18, [x20, #0x50]\n"
150 "str q17, [x20, #0x60]\n"
151 "str q16, [x20, #0x70]\n"
152 "add x20, x20, %x[out_stride]\n"
158 "ldr q25, [x9], #0x10\n"
159 "ldr q27, [x28], #0x10\n"
160 "sub x21, x21, #0x10\n"
162 "ldr q26, [x27], #0x10\n"
163 "ldr q24, [x26], #0x10\n"
164 "ldr q22, [x25], #0x10\n"
165 "ldr q21, [x24], #0x10\n"
166 "zip1 v20.16b, v25.16b, v22.16b\n"
167 "zip1 v23.16b, v27.16b, v21.16b\n"
168 "ldr q17, [x23], #0x10\n"
169 "ldr q16, [x22], #0x10\n"
170 "zip1 v19.16b, v26.16b, v17.16b\n"
171 "zip1 v18.16b, v24.16b, v16.16b\n"
172 "zip2 v25.16b, v25.16b, v22.16b\n"
173 "zip2 v22.16b, v26.16b, v17.16b\n"
174 "zip2 v21.16b, v27.16b, v21.16b\n"
175 "zip2 v16.16b, v24.16b, v16.16b\n"
176 "zip1 v24.16b, v20.16b, v19.16b\n"
177 "zip1 v17.16b, v23.16b, v18.16b\n"
178 "zip2 v20.16b, v20.16b, v19.16b\n"
179 "zip2 v19.16b, v23.16b, v18.16b\n"
180 "zip1 v23.16b, v25.16b, v22.16b\n"
181 "zip1 v18.16b, v21.16b, v16.16b\n"
182 "zip2 v22.16b, v25.16b, v22.16b\n"
183 "zip2 v21.16b, v21.16b, v16.16b\n"
184 "zip1 v16.16b, v24.16b, v17.16b\n"
185 "zip2 v17.16b, v24.16b, v17.16b\n"
186 "str q16, [x20, #0x0]\n"
187 "zip1 v16.16b, v20.16b, v19.16b\n"
188 "zip2 v20.16b, v20.16b, v19.16b\n"
189 "str q17, [x20, #0x10]\n"
190 "zip1 v19.16b, v23.16b, v18.16b\n"
191 "zip2 v18.16b, v23.16b, v18.16b\n"
192 "str q16, [x20, #0x20]\n"
193 "zip1 v17.16b, v22.16b, v21.16b\n"
194 "zip2 v16.16b, v22.16b, v21.16b\n"
195 "str q20, [x20, #0x30]\n"
196 "str q19, [x20, #0x40]\n"
197 "str q18, [x20, #0x50]\n"
198 "str q17, [x20, #0x60]\n"
199 "str q16, [x20, #0x70]\n"
200 "add x20, x20, %x[out_stride]\n"
206 "ldr s18, [x9], #0x4\n"
207 "ldr s19, [x28], #0x4\n"
208 "sub x21, x21, #0x4\n"
210 "ldr s21, [x27], #0x4\n"
211 "ldr s20, [x26], #0x4\n"
212 "ldr s17, [x25], #0x4\n"
213 "ldr s16, [x24], #0x4\n"
214 "zip1 v18.16b, v18.16b, v17.16b\n"
215 "zip1 v19.16b, v19.16b, v16.16b\n"
216 "ldr s17, [x23], #0x4\n"
217 "ldr s16, [x22], #0x4\n"
218 "zip1 v17.16b, v21.16b, v17.16b\n"
219 "zip1 v16.16b, v20.16b, v16.16b\n"
220 "zip1 v18.16b, v18.16b, v17.16b\n"
221 "zip1 v16.16b, v19.16b, v16.16b\n"
222 "zip1 v17.16b, v18.16b, v16.16b\n"
223 "zip2 v16.16b, v18.16b, v16.16b\n"
224 "str q17, [x20, #0x0]\n"
225 "str q16, [x20, #0x10]\n"
226 "add x20, x20, #0x20\n"
232 "ldr b19, [x9], #0x1\n"
233 "ldr b18, [x28], #0x1\n"
234 "sub x21, x21, #0x1\n"
236 "ldr b21, [x27], #0x1\n"
237 "ldr b20, [x26], #0x1\n"
238 "ldr b17, [x25], #0x1\n"
239 "ldr b16, [x24], #0x1\n"
240 "zip1 v19.16b, v19.16b, v17.16b\n"
241 "zip1 v18.16b, v18.16b, v16.16b\n"
242 "ldr b17, [x23], #0x1\n"
243 "ldr b16, [x22], #0x1\n"
244 "zip1 v17.16b, v21.16b, v17.16b\n"
245 "zip1 v16.16b, v20.16b, v16.16b\n"
246 "zip1 v17.16b, v19.16b, v17.16b\n"
247 "zip1 v16.16b, v18.16b, v16.16b\n"
248 "zip1 v16.16b, v17.16b, v16.16b\n"
249 "str d16, [x20, #0x0]\n"
250 "add x20, x20, #0x8\n"
253 "cmp %x[height], #0x1\n"
254 "add %x[out], %x[out], #0x80\n"
256 : [height]
"+&r" (height), [in]
"+&r" (in), [out]
"+&r" (out)
257 : [in_stride]
"r" (in_stride), [out_stride]
"r" (out_stride), [pad_row]
"r" (pad_row), [width]
"r" (width)
258 :
"cc",
"memory",
"v0",
"v1",
"v2",
"v3",
"v4",
"v5",
"v16",
"v17",
"v18",
"v19",
"v20",
"v21",
"v22",
"v23",
"v24",
"v25",
"v26",
"v27",
"v28",
"v29",
"v30",
"v31",
"x9",
"x20",
"x21",
"x22",
"x23",
"x24",
"x25",
"x26",
"x27",
"x28"
265 void Transform<16, 8, true, VLType::None>(
266 uint8_t *out,
const uint8_t *in,
int stride,
int x0,
int xmax,
int k0,
int kmax)
268 a64_transpose_interleave_16_1x8(
269 reinterpret_cast<uint8_t *
>(out),
270 reinterpret_cast<const uint8_t *
>(in + k0 * stride + x0),
271 (xmax-x0) *
sizeof(uint8_t) / 1,
272 stride *
sizeof(uint8_t),
278 void Transform<16, 8, true, VLType::None>(
279 int8_t *out,
const int8_t *in,
int stride,
int x0,
int xmax,
int k0,
int kmax)
281 a64_transpose_interleave_16_1x8(
282 reinterpret_cast<uint8_t *
>(out),
283 reinterpret_cast<const uint8_t *
>(in + k0 * stride + x0),
284 (xmax-x0) *
sizeof(int8_t) / 1,
285 stride *
sizeof(int8_t),
291 #endif // defined(__aarch64__)