24.04
generic.cpp
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2019-2021, 2023 Arm Limited.
3
*
4
* SPDX-License-Identifier: MIT
5
*
6
* Permission is hereby granted, free of charge, to any person obtaining a copy
7
* of this software and associated documentation files (the "Software"), to
8
* deal in the Software without restriction, including without limitation the
9
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10
* sell copies of the Software, and to permit persons to whom the Software is
11
* furnished to do so, subject to the following conditions:
12
*
13
* The above copyright notice and this permission notice shall be included in all
14
* copies or substantial portions of the Software.
15
*
16
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22
* SOFTWARE.
23
*/
24
#ifdef ARM_COMPUTE_ENABLE_SVE
25
26
#include <cstddef>
27
28
namespace
arm_gemm
{
29
30
void
sve_interleaved_fp16_mla_8x3VL(
31
const
__fp16 *Apanel,
32
const
__fp16 *Bpanel,
33
__fp16 *Cpanel,
34
int
ablocks,
35
int
bblocks,
36
int
K
) {
37
38
struct
KernelArgs {
39
size_t
K
= {};
40
const
__fp16 *Bpanel = {};
41
size_t
bblocks = {};
42
} ka;
43
44
ka.K = (
K
/1) - 1;
45
ka.Bpanel = Bpanel;
46
ka.bblocks = bblocks;
47
48
__asm__ __volatile__(
49
"ptrue p0.b\n"
50
"1:"
// Height loop
51
"ldr x23, [%x[args_ptr], %[offsetof_bblocks]]\n"
52
"ldr x22, [%x[args_ptr], %[offsetof_Bpanel]]\n"
53
"mov x21, %x[Apanel]\n"
54
"2:"
// Width loop
55
"ldr x20, [%x[args_ptr], %[offsetof_K]]\n"
56
"mov %x[Apanel], x21\n"
57
"cmp x20, #0x2\n"
58
"mov z8.b, #0x0\n"
59
"mov z9.b, #0x0\n"
60
"ld1rqh { z0.h }, p0/Z, [%x[Apanel]]\n"
61
"mov z10.b, #0x0\n"
62
"mov z11.b, #0x0\n"
63
"ld1h { z2.h }, p0/Z, [x22]\n"
64
"mov z12.b, #0x0\n"
65
"mov z13.b, #0x0\n"
66
"ld1h { z3.h }, p0/Z, [x22, #1, MUL VL]\n"
67
"mov z14.b, #0x0\n"
68
"mov z15.b, #0x0\n"
69
"ld1h { z4.h }, p0/Z, [x22, #2, MUL VL]\n"
70
"mov z16.b, #0x0\n"
71
"mov z17.b, #0x0\n"
72
"mov z18.b, #0x0\n"
73
"mov z19.b, #0x0\n"
74
"mov z20.b, #0x0\n"
75
"mov z21.b, #0x0\n"
76
"mov z22.b, #0x0\n"
77
"mov z23.b, #0x0\n"
78
"mov z24.b, #0x0\n"
79
"mov z25.b, #0x0\n"
80
"mov z26.b, #0x0\n"
81
"mov z27.b, #0x0\n"
82
"mov z28.b, #0x0\n"
83
"mov z29.b, #0x0\n"
84
"mov z30.b, #0x0\n"
85
"mov z31.b, #0x0\n"
86
"blt 4f\n"
87
"3:"
// main loop head
88
"fmla z8.h, z2.h, z0.h[0]\n"
89
"fmla z11.h, z2.h, z0.h[1]\n"
90
"ld1rqh { z7.h }, p0/Z, [%x[Apanel], #16]\n"
91
"fmla z14.h, z2.h, z0.h[2]\n"
92
"fmla z17.h, z2.h, z0.h[3]\n"
93
"ld1h { z6.h }, p0/Z, [x22, #3, MUL VL]\n"
94
"fmla z20.h, z2.h, z0.h[4]\n"
95
"fmla z23.h, z2.h, z0.h[5]\n"
96
"ld1h { z5.h }, p0/Z, [x22, #4, MUL VL]\n"
97
"fmla z26.h, z2.h, z0.h[6]\n"
98
"fmla z29.h, z2.h, z0.h[7]\n"
99
"ld1h { z1.h }, p0/Z, [x22, #5, MUL VL]\n"
100
"fmla z9.h, z3.h, z0.h[0]\n"
101
"fmla z12.h, z3.h, z0.h[1]\n"
102
"addvl x22, x22, #6\n"
103
"fmla z15.h, z3.h, z0.h[2]\n"
104
"fmla z18.h, z3.h, z0.h[3]\n"
105
"sub x20, x20, #0x2\n"
106
"fmla z21.h, z3.h, z0.h[4]\n"
107
"fmla z24.h, z3.h, z0.h[5]\n"
108
"cmp x20, #0x2\n"
109
"fmla z27.h, z3.h, z0.h[6]\n"
110
"fmla z30.h, z3.h, z0.h[7]\n"
111
"add %x[Apanel], %x[Apanel], #0x20\n"
112
"fmla z10.h, z4.h, z0.h[0]\n"
113
"fmla z13.h, z4.h, z0.h[1]\n"
114
"ld1h { z2.h }, p0/Z, [x22]\n"
115
"fmla z16.h, z4.h, z0.h[2]\n"
116
"fmla z19.h, z4.h, z0.h[3]\n"
117
"ld1h { z3.h }, p0/Z, [x22, #1, MUL VL]\n"
118
"fmla z22.h, z4.h, z0.h[4]\n"
119
"fmla z25.h, z4.h, z0.h[5]\n"
120
"fmla z28.h, z4.h, z0.h[6]\n"
121
"fmla z31.h, z4.h, z0.h[7]\n"
122
"ld1rqh { z0.h }, p0/Z, [%x[Apanel]]\n"
123
"fmla z8.h, z6.h, z7.h[0]\n"
124
"fmla z11.h, z6.h, z7.h[1]\n"
125
"ld1h { z4.h }, p0/Z, [x22, #2, MUL VL]\n"
126
"fmla z14.h, z6.h, z7.h[2]\n"
127
"fmla z17.h, z6.h, z7.h[3]\n"
128
"fmla z20.h, z6.h, z7.h[4]\n"
129
"fmla z23.h, z6.h, z7.h[5]\n"
130
"fmla z26.h, z6.h, z7.h[6]\n"
131
"fmla z29.h, z6.h, z7.h[7]\n"
132
"fmla z9.h, z5.h, z7.h[0]\n"
133
"fmla z12.h, z5.h, z7.h[1]\n"
134
"fmla z15.h, z5.h, z7.h[2]\n"
135
"fmla z18.h, z5.h, z7.h[3]\n"
136
"fmla z21.h, z5.h, z7.h[4]\n"
137
"fmla z24.h, z5.h, z7.h[5]\n"
138
"fmla z27.h, z5.h, z7.h[6]\n"
139
"fmla z30.h, z5.h, z7.h[7]\n"
140
"fmla z10.h, z1.h, z7.h[0]\n"
141
"fmla z13.h, z1.h, z7.h[1]\n"
142
"fmla z16.h, z1.h, z7.h[2]\n"
143
"fmla z19.h, z1.h, z7.h[3]\n"
144
"fmla z22.h, z1.h, z7.h[4]\n"
145
"fmla z25.h, z1.h, z7.h[5]\n"
146
"fmla z28.h, z1.h, z7.h[6]\n"
147
"fmla z31.h, z1.h, z7.h[7]\n"
148
"bge 3b\n"
149
"4:"
// main loop skip
150
"fmla z8.h, z2.h, z0.h[0]\n"
151
"fmla z11.h, z2.h, z0.h[1]\n"
152
"add %x[Apanel], %x[Apanel], #0x10\n"
153
"fmla z14.h, z2.h, z0.h[2]\n"
154
"fmla z17.h, z2.h, z0.h[3]\n"
155
"addvl x22, x22, #3\n"
156
"fmla z20.h, z2.h, z0.h[4]\n"
157
"fmla z23.h, z2.h, z0.h[5]\n"
158
"fmla z26.h, z2.h, z0.h[6]\n"
159
"fmla z29.h, z2.h, z0.h[7]\n"
160
"fmla z9.h, z3.h, z0.h[0]\n"
161
"fmla z12.h, z3.h, z0.h[1]\n"
162
"fmla z15.h, z3.h, z0.h[2]\n"
163
"fmla z18.h, z3.h, z0.h[3]\n"
164
"fmla z21.h, z3.h, z0.h[4]\n"
165
"fmla z24.h, z3.h, z0.h[5]\n"
166
"fmla z27.h, z3.h, z0.h[6]\n"
167
"fmla z30.h, z3.h, z0.h[7]\n"
168
"fmla z10.h, z4.h, z0.h[0]\n"
169
"fmla z13.h, z4.h, z0.h[1]\n"
170
"fmla z16.h, z4.h, z0.h[2]\n"
171
"fmla z19.h, z4.h, z0.h[3]\n"
172
"fmla z22.h, z4.h, z0.h[4]\n"
173
"fmla z25.h, z4.h, z0.h[5]\n"
174
"fmla z28.h, z4.h, z0.h[6]\n"
175
"fmla z31.h, z4.h, z0.h[7]\n"
176
"cbz x20, 5f\n"
177
"ld1rqh { z3.h }, p0/Z, [%x[Apanel]]\n"
178
"ld1h { z2.h }, p0/Z, [x22]\n"
179
"fmla z8.h, z2.h, z3.h[0]\n"
180
"ld1h { z1.h }, p0/Z, [x22, #1, MUL VL]\n"
181
"ld1h { z0.h }, p0/Z, [x22, #2, MUL VL]\n"
182
"fmla z11.h, z2.h, z3.h[1]\n"
183
"fmla z14.h, z2.h, z3.h[2]\n"
184
"fmla z17.h, z2.h, z3.h[3]\n"
185
"add %x[Apanel], %x[Apanel], #0x10\n"
186
"fmla z20.h, z2.h, z3.h[4]\n"
187
"fmla z23.h, z2.h, z3.h[5]\n"
188
"addvl x22, x22, #3\n"
189
"fmla z26.h, z2.h, z3.h[6]\n"
190
"fmla z29.h, z2.h, z3.h[7]\n"
191
"fmla z9.h, z1.h, z3.h[0]\n"
192
"fmla z12.h, z1.h, z3.h[1]\n"
193
"fmla z15.h, z1.h, z3.h[2]\n"
194
"fmla z18.h, z1.h, z3.h[3]\n"
195
"fmla z21.h, z1.h, z3.h[4]\n"
196
"fmla z24.h, z1.h, z3.h[5]\n"
197
"fmla z27.h, z1.h, z3.h[6]\n"
198
"fmla z30.h, z1.h, z3.h[7]\n"
199
"fmla z10.h, z0.h, z3.h[0]\n"
200
"fmla z13.h, z0.h, z3.h[1]\n"
201
"fmla z16.h, z0.h, z3.h[2]\n"
202
"fmla z19.h, z0.h, z3.h[3]\n"
203
"fmla z22.h, z0.h, z3.h[4]\n"
204
"fmla z25.h, z0.h, z3.h[5]\n"
205
"fmla z28.h, z0.h, z3.h[6]\n"
206
"fmla z31.h, z0.h, z3.h[7]\n"
207
"5:"
// multiply loop done
208
"st1h { z8.h }, p0, [%x[Cpanel]]\n"
209
"subs x23, x23, #0x1\n"
210
"st1h { z9.h }, p0, [%x[Cpanel], #1, MUL VL]\n"
211
"st1h { z10.h }, p0, [%x[Cpanel], #2, MUL VL]\n"
212
"st1h { z11.h }, p0, [%x[Cpanel], #3, MUL VL]\n"
213
"st1h { z12.h }, p0, [%x[Cpanel], #4, MUL VL]\n"
214
"st1h { z13.h }, p0, [%x[Cpanel], #5, MUL VL]\n"
215
"st1h { z14.h }, p0, [%x[Cpanel], #6, MUL VL]\n"
216
"st1h { z15.h }, p0, [%x[Cpanel], #7, MUL VL]\n"
217
"addvl %x[Cpanel], %x[Cpanel], #16\n"
218
"st1h { z16.h }, p0, [%x[Cpanel], #-8, MUL VL]\n"
219
"st1h { z17.h }, p0, [%x[Cpanel], #-7, MUL VL]\n"
220
"st1h { z18.h }, p0, [%x[Cpanel], #-6, MUL VL]\n"
221
"st1h { z19.h }, p0, [%x[Cpanel], #-5, MUL VL]\n"
222
"st1h { z20.h }, p0, [%x[Cpanel], #-4, MUL VL]\n"
223
"st1h { z21.h }, p0, [%x[Cpanel], #-3, MUL VL]\n"
224
"st1h { z22.h }, p0, [%x[Cpanel], #-2, MUL VL]\n"
225
"st1h { z23.h }, p0, [%x[Cpanel], #-1, MUL VL]\n"
226
"st1h { z24.h }, p0, [%x[Cpanel]]\n"
227
"st1h { z25.h }, p0, [%x[Cpanel], #1, MUL VL]\n"
228
"st1h { z26.h }, p0, [%x[Cpanel], #2, MUL VL]\n"
229
"st1h { z27.h }, p0, [%x[Cpanel], #3, MUL VL]\n"
230
"st1h { z28.h }, p0, [%x[Cpanel], #4, MUL VL]\n"
231
"st1h { z29.h }, p0, [%x[Cpanel], #5, MUL VL]\n"
232
"st1h { z30.h }, p0, [%x[Cpanel], #6, MUL VL]\n"
233
"st1h { z31.h }, p0, [%x[Cpanel], #7, MUL VL]\n"
234
"addvl %x[Cpanel], %x[Cpanel], #8\n"
235
"bgt 2b\n"
236
"subs %x[ablocks], %x[ablocks], #0x1\n"
237
"bne 1b\n"
238
: [Apanel]
"+&r"
(Apanel), [Cpanel]
"+&r"
(Cpanel), [ablocks]
"+&r"
(ablocks)
239
: [args_ptr]
"r"
(&ka), [offsetof_Bpanel]
"I"
(offsetof(KernelArgs, Bpanel)), [offsetof_K]
"I"
(offsetof(KernelArgs,
K
)), [offsetof_bblocks]
"I"
(offsetof(KernelArgs, bblocks))
240
:
"cc"
,
"memory"
,
"p0"
,
"x20"
,
"x21"
,
"x22"
,
"x23"
,
"z0"
,
"z1"
,
"z2"
,
"z3"
,
"z4"
,
"z5"
,
"z6"
,
"z7"
,
"z8"
,
"z9"
,
"z10"
,
"z11"
,
"z12"
,
"z13"
,
"z14"
,
"z15"
,
"z16"
,
"z17"
,
"z18"
,
"z19"
,
"z20"
,
"z21"
,
"z22"
,
"z23"
,
"z24"
,
"z25"
,
"z26"
,
"z27"
,
"z28"
,
"z29"
,
"z30"
,
"z31"
241
);
242
}
243
244
}
// namespace arm_gemm
245
#endif // ARM_COMPUTE_ENABLE_SVE
arm_gemm
Definition:
barrier.hpp:30
K
unsigned int K
Definition:
CpuGemmAssemblyDispatch.cpp:106
src
core
NEON
kernels
arm_gemm
kernels
sve_interleaved_fp16_mla_8x3VL
generic.cpp
Generated on Mon Apr 29 2024 10:53:55 for Compute Library by
1.8.17