CpuDirectConv2d Class Reference

Function to run the direct convolution. More...

#include <CpuDirectConv2d.h>

Collaboration diagram for CpuDirectConv2d:

Public Member Functions
	CpuDirectConv2d (std::shared_ptr< IMemoryManager > memory_manager=nullptr)
	~CpuDirectConv2d ()
void	configure (ITensorInfo *src, ITensorInfo *weights, const ITensorInfo *bias, ITensorInfo *dst, const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info=ActivationLayerInfo())
	Set the input, weights, biases and output tensors. More...
void	run (ITensorPack &tensors) override
	Run the kernels contained in the function. More...
Public Member Functions inherited from INEOperator
	INEOperator (IRuntimeContext *ctx=nullptr)
	Constructor. More...
	INEOperator (const INEOperator &)=delete
	Prevent instances of this class from being copied (As this class contains pointers) More...
	INEOperator (INEOperator &&)=default
	Default move constructor. More...
INEOperator &	operator= (const INEOperator &)=delete
	Prevent instances of this class from being copied (As this class contains pointers) More...
INEOperator &	operator= (INEOperator &&)=default
	Default move assignment operator. More...
	~INEOperator ()
	Default destructor. More...
void	prepare (ITensorPack &constants) override
	Prepare the function for executing. More...
MemoryRequirements	workspace () const override
	Return the memory requirements required by the workspace. More...
Public Member Functions inherited from IOperator
virtual	~IOperator ()=default
	Destructor. More...

Static Public Member Functions
static Status	validate (const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *bias, const ITensorInfo *dst, const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info=ActivationLayerInfo())
	Static function to check if given info will lead to a valid configuration. More...

Detailed Description

Function to run the direct convolution.

This function calls the following kernels:

1. NEFillBorderKernel for the input
2. kernels::CpuDirectConv2dOutputStageKernel
3. kernels::CpuDirectConv2dKernel

Definition at line 55 of file CpuDirectConv2d.h.

Constructor & Destructor Documentation

CpuDirectConv2d()

CpuDirectConv2d

(

std::shared_ptr< IMemoryManager >

memory_manager = nullptr

)

Definition at line 38 of file CpuDirectConv2d.cpp.

    : _memory_group(std::move(memory_manager)), _output_stage_kernel(), _conv_kernel(), _input_border_handler(), _activationlayer_function(), _accumulator(), _has_bias(false),
      _is_activationlayer_enabled(false), _dim_split(Window::DimZ), _is_padding_required()
{
}

~CpuDirectConv2d()

~CpuDirectConv2d ( )

default

Member Function Documentation

configure()

void configure	(	ITensorInfo *	src,
		ITensorInfo *	weights,
		const ITensorInfo *	bias,
		ITensorInfo *	dst,
		const PadStrideInfo &	conv_info,
		const ActivationLayerInfo &	act_info = ActivationLayerInfo()
	)

Set the input, weights, biases and output tensors.

Note

: DirectConvolution only works in the following configurations: 1x1 convolution with stride_x = 1/2/3, stride_y = 1/2/3 data type = F16/F32 3x3 convolution with stride_x = 1/2/3, stride_y = 1/2/3 data type = F16/F32 5x5 convolution with stride_x = 1/2/3, stride_y = 1/2/3 data type = F32

Parameters

[in,out]	src	Input tensor info. Data types supported: F16/F32.
[in]	weights	Set of kernels to convolve the input volume. Supported sizes: 1x1, 3x3 and 5x5. The 3rd dimension must be the same as the input's volume 3rd dimension. Data type supported: Same as src.
[in]	bias	Set of biases. Can be nullptr. Data type supported: Same as src.
[out]	dst	Output tensor info. The 3rd dimensions must be equal to the 4th dimension of the kernels tensor. Data types supported: Same as input.
[in]	conv_info	Contains padding and stride information described in PadStrideInfo.
[in]	act_info	(Optional) Activation layer information in case of a fused activation.

Definition at line 44 of file CpuDirectConv2d.cpp.

{
    ARM_COMPUTE_ERROR_ON(src->data_layout() == DataLayout::UNKNOWN);
    ARM_COMPUTE_LOG_PARAMS(src, weights, bias, dst, conv_info, act_info);
 
    _output_stage_kernel  = std::make_unique<kernels::CpuDirectConv2dOutputStageKernel>();
    _conv_kernel          = std::make_unique<kernels::CpuDirectConv2dKernel>();
    _input_border_handler = std::make_unique<NEFillBorderKernel>();
 
    // Free accumulator
    if(_accumulator.buffer() != nullptr)
    {
        _accumulator.allocator()->free();
    }
 
    _dim_split = src->data_layout() == DataLayout::NCHW ? Window::DimZ : Window::DimY;
 
    // Check if bias should be added in the convolution result
    _has_bias = (bias != nullptr);
 
    _conv_kernel->configure(src, weights, dst, conv_info);
    if(_has_bias)
    {
        _output_stage_kernel->configure(dst, bias);
    }
    _is_padding_required = !_conv_kernel->border_size().empty();
 
    if(_is_padding_required)
    {
        // Add zero padding XY
        _input_border_handler->configure(src, _conv_kernel->border_size(), BorderMode::CONSTANT, PixelValue(static_cast<float>(0.f)));
    }
 
    //Configure Activation Layer
    _is_activationlayer_enabled = act_info.enabled();
    if(_is_activationlayer_enabled)
    {
        _activationlayer_function = std::make_unique<CpuActivation>();
        _activationlayer_function->configure(dst, dst, act_info);
    }
}

References arm_compute::test::validation::act_info, Tensor::allocator(), ARM_COMPUTE_ERROR_ON, ARM_COMPUTE_LOG_PARAMS, bias, Tensor::buffer(), arm_compute::CONSTANT, arm_compute::test::validation::conv_info, Window::DimY, Window::DimZ, arm_compute::test::validation::dst, TensorAllocator::free(), arm_compute::NCHW, arm_compute::test::validation::src, and arm_compute::UNKNOWN.

run()

void run ( ITensorPack &  tensors )

overridevirtual

Run the kernels contained in the function.

Parameters

[in]

tensors

Vector that contains the tensors to operate on.

Reimplemented from INEOperator.

Definition at line 117 of file CpuDirectConv2d.cpp.

{
    MemoryGroupResourceScope scope_mg(_memory_group);
 
    auto src  = tensors.get_tensor(TensorType::ACL_SRC_0);
    auto bias = tensors.get_const_tensor(TensorType::ACL_SRC_2);
    auto dst  = tensors.get_tensor(TensorType::ACL_DST);
 
    if(_is_padding_required)
    {
        ITensorPack pack;
        pack.add_tensor(TensorType::ACL_SRC_DST, src);
        NEScheduler::get().schedule_op(_input_border_handler.get(), Window::DimZ, _input_border_handler->window(), pack);
    }
    NEScheduler::get().schedule_op(_conv_kernel.get(), _dim_split, _conv_kernel->window(), tensors);
    if(_has_bias)
    {
        ITensorPack pack;
        pack.add_tensor(TensorType::ACL_SRC_0, dst);
        pack.add_tensor(TensorType::ACL_SRC_1, bias);
        pack.add_tensor(TensorType::ACL_DST, dst);
        NEScheduler::get().schedule_op(_output_stage_kernel.get(), Window::DimY, _output_stage_kernel->window(), pack);
    }
 
    if(_is_activationlayer_enabled)
    {
        ITensorPack pack;
        pack.add_tensor(TensorType::ACL_SRC, dst);
        pack.add_tensor(TensorType::ACL_DST, dst);
        _activationlayer_function->run(pack);
    }
}

References arm_compute::ACL_DST, arm_compute::ACL_SRC, arm_compute::ACL_SRC_0, arm_compute::ACL_SRC_1, arm_compute::ACL_SRC_2, arm_compute::ACL_SRC_DST, ITensorPack::add_tensor(), bias, Window::DimY, Window::DimZ, arm_compute::test::validation::dst, Scheduler::get(), ITensorPack::get_const_tensor(), ITensorPack::get_tensor(), arm_compute::test::validation::pack, IScheduler::schedule_op(), and arm_compute::test::validation::src.

validate()

Status validate ( const ITensorInfo *  src, const ITensorInfo *  weights, const ITensorInfo *  bias, const ITensorInfo *  dst, const PadStrideInfo &  conv_info, const ActivationLayerInfo &  act_info = ActivationLayerInfo()  )

static

Static function to check if given info will lead to a valid configuration.

Similar to CpuDirectConv2d::configure()

Returns

a status

Definition at line 86 of file CpuDirectConv2d.cpp.

{
    ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, weights, dst);
 
    // output might not be initialized since it can be an intermediate tensor of another layer
    DataType   data_type = src->data_type();
    TensorInfo accumulator(dst->clone()->set_is_resizable(true).reset_padding().set_data_type(data_type));
 
    // Validate Convolution kernel
    ARM_COMPUTE_RETURN_ON_ERROR(kernels::CpuDirectConv2dKernel::validate(src, weights, &accumulator, conv_info));
 
    if(bias != nullptr)
    {
        ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(weights, bias);
        ARM_COMPUTE_RETURN_ERROR_ON_MSG(bias->dimension(0) != weights->dimension(3),
                                        "Biases size and number of input feature maps should match");
        ARM_COMPUTE_RETURN_ERROR_ON_MSG(bias->num_dimensions() > 1, "Biases should be one dimensional");
    }
 
    // Validate bias kernel
    ARM_COMPUTE_RETURN_ON_ERROR(kernels::CpuDirectConv2dOutputStageKernel::validate(&accumulator, bias, dst));
 
    if(act_info.enabled())
    {
        ARM_COMPUTE_RETURN_ON_ERROR(CpuActivation::validate(dst, nullptr, act_info));
    }
 
    return Status{};
}

References arm_compute::test::validation::act_info, ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES, ARM_COMPUTE_RETURN_ERROR_ON_MSG, ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR, ARM_COMPUTE_RETURN_ON_ERROR, bias, arm_compute::test::validation::conv_info, arm_compute::test::validation::data_type, ITensorInfo::dimension(), arm_compute::test::validation::dst, arm_compute::test::validation::src, CpuActivation::validate(), CpuDirectConv2dOutputStageKernel::validate(), and CpuDirectConv2dKernel::validate().

Referenced by CpuConv2d::get_convolution_method(), NEDirectConvolutionLayer::validate(), and CpuConv2d::validate().

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The documentation for this class was generated from the following files:

• src/cpu/operators/CpuDirectConv2d.h
• src/cpu/operators/CpuDirectConv2d.cpp