305 #if !defined(_WIN64) && !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && (defined(__arm__) || defined(__aarch64__)) 306 const uint32_t hwcaps = getauxval(AT_HWCAP);
307 const uint32_t hwcaps2 = getauxval(AT_HWCAP2);
308 const uint32_t max_cpus = get_max_cpus();
311 std::vector<uint32_t> cpus_midr;
314 cpus_midr = midr_from_cpuid(max_cpus);
316 if(cpus_midr.empty())
318 cpus_midr = midr_from_proc_cpuinfo(max_cpus);
320 if(cpus_midr.empty())
322 cpus_midr.resize(max_cpus, 0);
329 std::vector<CpuModel> cpus_model;
330 std::transform(std::begin(cpus_midr),
std::end(cpus_midr), std::back_inserter(cpus_model),
336 #elif(BARE_METAL) && defined(__aarch64__) 339 uint64_t isar0 = 0, isar1 = 0, pfr0 = 0, svefr0 = 0, midr = 0;
344 if((pfr0 >> 32) & 0xf)
346 svefr0 = get_sve_feature_reg();
353 #elif defined(__aarch64__) && defined(__APPLE__) 354 int ncpus = get_hw_capability(
"hw.logicalcpu");
356 std::vector<CpuModel> cpus_model(ncpus);
357 isainfo.neon = get_hw_capability(
"hw.optional.neon");
358 isainfo.fp16 = get_hw_capability(
"hw.optional.neon_fp16");
359 isainfo.dot = get_hw_capability(
"hw.optional.arm.FEAT_DotProd");
arm_compute::CPUModel CpuModel
#define ARM_COMPUTE_GET_FEATURE_REG(var, freg)
const CpuIsaInfo & isa() const
CpuIsaInfo init_cpu_isa_from_hwcaps(uint32_t hwcaps, uint32_t hwcaps2, uint32_t midr)
Identify ISA related information through system information.
void end(TokenStream &in, bool &valid)
ScaleKernelInfo info(interpolation_policy, default_border_mode, PixelValue(), sampling_policy, false)
CpuIsaInfo init_cpu_isa_from_regs(uint64_t isar0, uint64_t isar1, uint64_t pfr0, uint64_t svefr0, uint64_t midr)
Identify ISA related information through register information.
CpuInfo()=default
Default constructor.
#define ARM_COMPUTE_CPU_FEATURE_HWCAP_CPUID
CpuModel midr_to_model(uint32_t midr)
Extract the model type from the MIDR value.