24.04
list-sve.hpp
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/*
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* Copyright (c) 2022-2023 Arm Limited.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "
sme_interleave1VL_bf16_bf16.hpp
"
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#include "
sme_interleave1VL_block2_bf16_bf16.hpp
"
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#include "
sme_interleave1VL_block2_fp16_fp16.hpp
"
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#include "
sme_interleave1VL_block4_s8_s8.hpp
"
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#include "
sme_interleave1VL_block4_u8_u8.hpp
"
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#include "
sme_interleave1VL_block4_s8_s8_summing.hpp
"
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#include "
sme_interleave1VL_block4_u8_u8_summing.hpp
"
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#include "
sme_interleave1VL_fp16_fp16.hpp
"
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#include "
sme_interleave1VL_fp32_fp32.hpp
"
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#include "
sme_interleave2VL_block2_bf16_bf16.hpp
"
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#include "
sme_interleave2VL_block2_fp16_fp16.hpp
"
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#include "
sme_interleave2VL_block4_s8_s8.hpp
"
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#include "
sme_interleave2VL_block4_s8_s8_summing.hpp
"
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#include "
sme_interleave2VL_block4_u8_u8.hpp
"
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#include "
sme_interleave2VL_block4_u8_u8_summing.hpp
"
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#include "
sme_interleave2VL_fp16_fp16.hpp
"
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#include "
sme_interleave2VL_bf16_bf16.hpp
"
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#include "
sme_interleave2VL_fp32_fp32.hpp
"
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#include "
sme_interleave4VL_block2_bf16_bf16.hpp
"
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#include "
sme_interleave4VL_block2_fp16_fp16.hpp
"
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#include "
sme_interleave4VL_block4_s8_s8.hpp
"
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#include "
sme_interleave4VL_block4_u8_u8.hpp
"
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#include "
sme_interleave4VL_block4_s8_s8_summing.hpp
"
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#include "
sme_interleave4VL_block4_u8_u8_summing.hpp
"
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#include "
sme_interleave4VL_fp32_fp32.hpp
"
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#include "
sme2_interleave1VL_block2_fp32_bf16.hpp
"
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#include "
sme2_interleave2VL_block2_fp32_bf16.hpp
"
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#include "
sme2_interleave4VL_block2_fp32_bf16.hpp
"
sme_interleave2VL_block4_s8_s8.hpp
sme_interleave4VL_block4_u8_u8_summing.hpp
sme2_interleave1VL_block2_fp32_bf16.hpp
sme_interleave1VL_block4_u8_u8_summing.hpp
sme_interleave1VL_fp32_fp32.hpp
sme_interleave1VL_fp16_fp16.hpp
sme_interleave1VL_bf16_bf16.hpp
sme_interleave4VL_block4_s8_s8_summing.hpp
sme_interleave1VL_block4_u8_u8.hpp
sme_interleave4VL_block4_u8_u8.hpp
sme_interleave2VL_fp32_fp32.hpp
sme_interleave2VL_bf16_bf16.hpp
sme_interleave2VL_fp16_fp16.hpp
sme_interleave1VL_block4_s8_s8_summing.hpp
sme_interleave2VL_block4_u8_u8.hpp
sme_interleave2VL_block4_u8_u8_summing.hpp
sme_interleave1VL_block2_fp16_fp16.hpp
sme_interleave1VL_block2_bf16_bf16.hpp
sme_interleave4VL_fp32_fp32.hpp
sme_interleave1VL_block4_s8_s8.hpp
sme_interleave4VL_block4_s8_s8.hpp
sme2_interleave4VL_block2_fp32_bf16.hpp
sme_interleave4VL_block2_fp16_fp16.hpp
sme_interleave4VL_block2_bf16_bf16.hpp
sme_interleave2VL_block2_fp16_fp16.hpp
sme_interleave2VL_block2_bf16_bf16.hpp
sme_interleave2VL_block4_s8_s8_summing.hpp
sme2_interleave2VL_block2_fp32_bf16.hpp
src
core
NEON
kernels
arm_gemm
indirect-interleaves
list-sve.hpp
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