27 #if defined(ARM_COMPUTE_ENABLE_SME)
31 void sme_transpose_interleave_2VL_1x4(uint8_t *out,
const uint8_t *in,
size_t width,
size_t in_stride,
size_t height)
33 uint8_t *pad_row =
reinterpret_cast<uint8_t *
>(alloca(width *
sizeof(uint8_t)));
36 memset(pad_row, 0, width *
sizeof(uint8_t));
39 size_t out_stride = 2 * roundup<size_t>(height, 4) * sme::get_vector_length<uint32_t>();
42 ".inst 0xd503477f // SMSTART ZA\n"
46 "add x25, x26, %x[in_stride]\n"
47 "add x24, x25, %x[in_stride]\n"
48 "add x23, x24, %x[in_stride]\n"
49 "cmp %x[height], #0x3\n"
50 "add %x[in], x23, %x[in_stride]\n"
51 "csel x23, x23, %x[pad_row], GT\n"
52 "csel x24, x24, %x[pad_row], GE\n"
53 "cmp %x[height], #0x1\n"
54 "mov x22, %x[width]\n"
56 "csel x25, x25, %x[pad_row], GT\n"
59 "sub %x[height], %x[height], #0x4\n"
62 "ld1b { z17.b }, p1/Z, [x26]\n"
65 "ld1b { z18.b }, p1/Z, [x25]\n"
66 "addvl x26, x26, #1\n"
67 "addvl x25, x25, #1\n"
68 "ld1b { z16.b }, p1/Z, [x24]\n"
69 "zip1 z20.b, z17.b, z16.b\n"
70 "zip2 z19.b, z17.b, z16.b\n"
71 "addvl x24, x24, #1\n"
72 "ld1b { z17.b }, p1/Z, [x23]\n"
73 "zip1 z16.b, z18.b, z17.b\n"
74 "zip2 z18.b, z18.b, z17.b\n"
75 "addvl x23, x23, #1\n"
76 "zip1 z17.b, z20.b, z16.b\n"
77 "zip2 z16.b, z20.b, z16.b\n"
78 "st1b { z17.b }, p1, [x20]\n"
79 "st1b { z16.b }, p1, [x20, #1, MUL VL]\n"
80 "add x20, x20, %x[out_stride]\n"
81 "zip1 z17.b, z19.b, z18.b\n"
82 "zip2 z16.b, z19.b, z18.b\n"
83 "st1b { z17.b }, p1, [x20]\n"
84 "st1b { z16.b }, p1, [x20, #1, MUL VL]\n"
85 "add x20, x20, %x[out_stride]\n"
90 "whilelt p0.b, XZR, x22\n"
91 "ld1b { z18.b }, p0/Z, [x26]\n"
92 "decw x22, ALL, MUL #2\n"
93 "ld1b { z17.b }, p0/Z, [x25]\n"
95 "incd x26, ALL, MUL #4\n"
96 "ld1b { z16.b }, p0/Z, [x24]\n"
97 "zip1 z18.b, z18.b, z16.b\n"
98 "incd x25, ALL, MUL #4\n"
99 "incd x24, ALL, MUL #4\n"
100 "ld1b { z16.b }, p0/Z, [x23]\n"
101 "zip1 z16.b, z17.b, z16.b\n"
102 "incd x23, ALL, MUL #4\n"
103 "zip1 z17.b, z18.b, z16.b\n"
104 "zip2 z16.b, z18.b, z16.b\n"
105 "st1b { z17.b }, p1, [x20]\n"
106 "st1b { z16.b }, p1, [x20, #1, MUL VL]\n"
107 "add x20, x20, %x[out_stride]\n"
110 "cmp %x[height], #0x1\n"
111 "addvl %x[out], %x[out], #2\n"
113 ".inst 0xd503467f // SMSTOP\n"
114 : [height]
"+&r" (height), [in]
"+&r" (in), [out]
"+&r" (out)
115 : [in_stride]
"r" (in_stride), [out_stride]
"r" (out_stride), [pad_row]
"r" (pad_row), [width]
"r" (width)
116 :
"cc",
"memory",
"p0",
"p1",
"p2",
"p3",
"p4",
"p5",
"p6",
"p7",
"p8",
"p9",
"p10",
"p11",
"p12",
"p13",
"p14",
"p15",
"x20",
"x21",
"x22",
"x23",
"x24",
"x25",
"x26",
"z0",
"z1",
"z2",
"z3",
"z4",
"z5",
"z6",
"z7",
"z8",
"z9",
"z10",
"z11",
"z12",
"z13",
"z14",
"z15",
"z16",
"z17",
"z18",
"z19",
"z20",
"z21",
"z22",
"z23",
"z24",
"z25",
"z26",
"z27",
"z28",
"z29",
"z30",
"z31"
123 void Transform<2, 4, true, VLType::SME>(
124 uint8_t *out,
const uint8_t *in,
int stride,
int x0,
int xmax,
int k0,
int kmax)
126 sme_transpose_interleave_2VL_1x4(
127 reinterpret_cast<uint8_t *
>(out),
128 reinterpret_cast<const uint8_t *
>(in + k0 * stride + x0),
129 (xmax-x0) *
sizeof(uint8_t) / 1,
130 stride *
sizeof(uint8_t),
136 void Transform<2, 4, true, VLType::SME>(
137 int8_t *out,
const int8_t *in,
int stride,
int x0,
int xmax,
int k0,
int kmax)
139 sme_transpose_interleave_2VL_1x4(
140 reinterpret_cast<uint8_t *
>(out),
141 reinterpret_cast<const uint8_t *
>(in + k0 * stride + x0),
142 (xmax-x0) *
sizeof(int8_t) / 1,
143 stride *
sizeof(int8_t),
149 #endif // defined(ARM_COMPUTE_ENABLE_SME)