27 #if defined(ARM_COMPUTE_ENABLE_SME)
31 void sme_transpose_interleave_4VL_1x4(uint8_t *out,
const uint8_t *in,
size_t width,
size_t in_stride,
size_t height)
33 uint8_t *pad_row =
reinterpret_cast<uint8_t *
>(alloca(width *
sizeof(uint8_t)));
36 memset(pad_row, 0, width *
sizeof(uint8_t));
39 size_t out_stride = 4 * roundup<size_t>(height, 4) * sme::get_vector_length<uint32_t>();
42 ".inst 0xd503477f // SMSTART ZA\n"
46 "add x24, x25, %x[in_stride]\n"
47 "add x23, x24, %x[in_stride]\n"
48 "add x22, x23, %x[in_stride]\n"
49 "cmp %x[height], #0x3\n"
50 "add %x[in], x22, %x[in_stride]\n"
51 "csel x22, x22, %x[pad_row], GT\n"
52 "csel x23, x23, %x[pad_row], GE\n"
53 "cmp %x[height], #0x1\n"
55 "csel x24, x24, %x[pad_row], GT\n"
56 "sub %x[height], %x[height], #0x4\n"
57 "mov x20, %x[width]\n"
59 "whilelt p0.b, XZR, x20\n"
60 "ld1b { z17.b }, p0/Z, [x25]\n"
61 "decw x20, ALL, MUL #4\n"
62 "ld1b { z19.b }, p0/Z, [x24]\n"
64 "addvl x25, x25, #1\n"
65 "ld1b { z16.b }, p0/Z, [x23]\n"
66 "zip1 z18.b, z17.b, z16.b\n"
67 "zip2 z20.b, z17.b, z16.b\n"
68 "addvl x24, x24, #1\n"
69 "ld1b { z16.b }, p0/Z, [x22]\n"
70 "zip1 z17.b, z19.b, z16.b\n"
71 "zip2 z19.b, z19.b, z16.b\n"
72 "addvl x23, x23, #1\n"
73 "addvl x22, x22, #1\n"
74 "zip1 z16.b, z18.b, z17.b\n"
75 "zip2 z18.b, z18.b, z17.b\n"
76 "st1b { z16.b }, p1, [x21]\n"
77 "zip1 z17.b, z20.b, z19.b\n"
78 "zip2 z16.b, z20.b, z19.b\n"
79 "st1b { z18.b }, p1, [x21, #1, MUL VL]\n"
80 "st1b { z17.b }, p1, [x21, #2, MUL VL]\n"
81 "st1b { z16.b }, p1, [x21, #3, MUL VL]\n"
82 "add x21, x21, %x[out_stride]\n"
85 "cmp %x[height], #0x1\n"
86 "addvl %x[out], %x[out], #4\n"
88 ".inst 0xd503467f // SMSTOP\n"
89 : [height]
"+&r" (height), [in]
"+&r" (in), [out]
"+&r" (out)
90 : [in_stride]
"r" (in_stride), [out_stride]
"r" (out_stride), [pad_row]
"r" (pad_row), [width]
"r" (width)
91 :
"cc",
"memory",
"p0",
"p1",
"p2",
"p3",
"p4",
"p5",
"p6",
"p7",
"p8",
"p9",
"p10",
"p11",
"p12",
"p13",
"p14",
"p15",
"x20",
"x21",
"x22",
"x23",
"x24",
"x25",
"z0",
"z1",
"z2",
"z3",
"z4",
"z5",
"z6",
"z7",
"z8",
"z9",
"z10",
"z11",
"z12",
"z13",
"z14",
"z15",
"z16",
"z17",
"z18",
"z19",
"z20",
"z21",
"z22",
"z23",
"z24",
"z25",
"z26",
"z27",
"z28",
"z29",
"z30",
"z31"
98 void Transform<4, 4, true, VLType::SME>(
99 uint8_t *out,
const uint8_t *in,
int stride,
int x0,
int xmax,
int k0,
int kmax)
101 sme_transpose_interleave_4VL_1x4(
102 reinterpret_cast<uint8_t *
>(out),
103 reinterpret_cast<const uint8_t *
>(in + k0 * stride + x0),
104 (xmax-x0) *
sizeof(uint8_t) / 1,
105 stride *
sizeof(uint8_t),
111 void Transform<4, 4, true, VLType::SME>(
112 int8_t *out,
const int8_t *in,
int stride,
int x0,
int xmax,
int k0,
int kmax)
114 sme_transpose_interleave_4VL_1x4(
115 reinterpret_cast<uint8_t *
>(out),
116 reinterpret_cast<const uint8_t *
>(in + k0 * stride + x0),
117 (xmax-x0) *
sizeof(int8_t) / 1,
118 stride *
sizeof(int8_t),
124 #endif // defined(ARM_COMPUTE_ENABLE_SME)