Compute Library
 21.08
Registrars.h
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1 /*
2  * Copyright (c) 2020-2021 Arm Limited.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in all
14  * copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  */
24 #ifndef SRC_CORE_COMMON_REGISTRARS_H
25 #define SRC_CORE_COMMON_REGISTRARS_H
26 
27 #if defined(ENABLE_FP16_KERNELS)
28 
29 #if defined(ARM_COMPUTE_ENABLE_SVE)
30 #define REGISTER_FP16_SVE(func_name) &(func_name)
31 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */
32 #define REGISTER_FP16_SVE(func_name) nullptr
33 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */
34 
35 #if defined(ARM_COMPUTE_ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
36 #define REGISTER_FP16_NEON(func_name) &(func_name)
37 #else /* !defined(ARM_COMPUTE_ENABLE_NEON) */
38 #define REGISTER_FP16_NEON(func_name) nullptr
39 #endif /* defined(ARM_COMPUTE_ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) */
40 
41 #else /* !defined(ENABLE_FP16_KERNELS) */
42 #define REGISTER_FP16_NEON(func_name) nullptr
43 #define REGISTER_FP16_SVE(func_name) nullptr
44 #endif /* defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) */
45 
46 #if defined(ENABLE_FP32_KERNELS)
47 
48 #if defined(ARM_COMPUTE_ENABLE_SVE)
49 #define REGISTER_FP32_SVE(func_name) &(func_name)
50 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */
51 #define REGISTER_FP32_SVE(func_name) nullptr
52 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */
53 
54 #if defined(ARM_COMPUTE_ENABLE_NEON)
55 #define REGISTER_FP32_NEON(func_name) &(func_name)
56 #else /* !defined(ARM_COMPUTE_ENABLE_NEON) */
57 #define REGISTER_FP32_NEON(func_name) nullptr
58 #endif /* defined(ARM_COMPUTE_ENABLE_NEON) */
59 
60 #else /* defined(ENABLE_FP32_KERNELS) */
61 #define REGISTER_FP32_NEON(func_name) nullptr
62 #define REGISTER_FP32_SVE(func_name) nullptr
63 #endif /* defined(ENABLE_FP32_KERNELS) */
64 
65 #if defined(ENABLE_QASYMM8_SIGNED_KERNELS)
66 
67 #define REGISTER_QASYMM8_SIGNED_NEON(func_name) &(func_name)
68 
69 #if defined(ARM_COMPUTE_ENABLE_SVE)
70 #define REGISTER_QASYMM8_SIGNED_SVE(func_name) &(func_name)
71 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */
72 #define REGISTER_QASYMM8_SIGNED_SVE(func_name) nullptr
73 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */
74 
75 #else /* defined(ENABLE_QASYMM8_SIGNED_KERNELS) */
76 #define REGISTER_QASYMM8_SIGNED_NEON(func_name) nullptr
77 #define REGISTER_QASYMM8_SIGNED_SVE(func_name) nullptr
78 #endif /* defined(ENABLE_QASYMM8_SIGNED_KERNELS) */
79 
80 #if defined(ENABLE_QASYMM8_KERNELS)
81 #define REGISTER_QASYMM8_NEON(func_name) &(func_name)
82 
83 #if defined(ARM_COMPUTE_ENABLE_SVE)
84 #define REGISTER_QASYMM8_SVE(func_name) &(func_name)
85 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */
86 #define REGISTER_QASYMM8_SVE(func_name) nullptr
87 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */
88 
89 #else /* defined(ENABLE_QASYMM8_KERNELS) */
90 #define REGISTER_QASYMM8_NEON(func_name) nullptr
91 #define REGISTER_QASYMM8_SVE(func_name) nullptr
92 #endif /* defined(ENABLE_QASYMM8_KERNELS) */
93 
94 #if defined(ENABLE_QSYMM16_KERNELS)
95 
96 #define REGISTER_QSYMM16_NEON(func_name) &(func_name)
97 
98 #if defined(ARM_COMPUTE_ENABLE_SVE)
99 #define REGISTER_QSYMM16_SVE(func_name) &(func_name)
100 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */
101 #define REGISTER_QSYMM16_SVE(func_name) nullptr
102 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */
103 
104 #else /* defined(ENABLE_QSYMM16_KERNELS) */
105 #define REGISTER_QSYMM16_NEON(func_name) nullptr
106 #define REGISTER_QSYMM16_SVE(func_name) nullptr
107 #endif /* defined(ENABLE_QSYMM16_KERNELS) */
108 
109 #if defined(ENABLE_INTEGER_KERNELS)
110 
111 #if defined(ARM_COMPUTE_ENABLE_SVE)
112 #define REGISTER_INTEGER_SVE(func_name) &(func_name)
113 #else /* !defined(ARM_COMPUTE_ENABLE_SVE) */
114 #define REGISTER_INTEGER_SVE(func_name) nullptr
115 #endif /* defined(ARM_COMPUTE_ENABLE_SVE) */
116 
117 #if defined(ARM_COMPUTE_ENABLE_NEON)
118 #define REGISTER_INTEGER_NEON(func_name) &(func_name)
119 #else /* !defined(ARM_COMPUTE_ENABLE_NEON) */
120 #define REGISTER_INTEGER_NEON(func_name) nullptr
121 #endif /* defined(ARM_COMPUTE_ENABLE_NEON) */
122 
123 #else /* defined(ENABLE_INTEGER_KERNELS) */
124 #define REGISTER_INTEGER_NEON(func_name) nullptr
125 #define REGISTER_INTEGER_SVE(func_name) nullptr
126 #endif /* defined(ENABLE_INTEGER_KERNELS) */
127 
128 #endif /* SRC_CORE_COMMON_REGISTRARS_H */