27 #if defined(ARM_COMPUTE_ENABLE_SVE)
31 void sve_transpose_interleave_3VL_2x2(uint16_t *out,
const uint16_t *in,
size_t width,
size_t in_stride,
size_t height)
33 uint16_t *pad_row =
reinterpret_cast<uint16_t *
>(alloca(width *
sizeof(uint16_t)));
36 memset(pad_row, 0, width *
sizeof(uint16_t));
39 size_t out_stride = 3 * roundup<size_t>(height, 2) * get_vector_length<uint16_t>();
42 "cmp %x[height], #0x8\n"
47 "add x11, x12, %x[in_stride]\n"
48 "add x10, x11, %x[in_stride]\n"
49 "add x9, x10, %x[in_stride]\n"
50 "add x28, x9, %x[in_stride]\n"
51 "mov x27, %x[width]\n"
52 "cnth x26, ALL, MUL #3\n"
53 "add x25, x28, %x[in_stride]\n"
54 "add x24, x25, %x[in_stride]\n"
55 "add x23, x24, %x[in_stride]\n"
57 "add %x[in], x23, %x[in_stride]\n"
59 "sub %x[height], %x[height], #0x8\n"
62 "ld1h { z17.h }, p2/Z, [x12]\n"
63 "ld1h { z23.h }, p2/Z, [x12, #1, MUL VL]\n"
65 "add x22, x22, %x[out_stride]\n"
66 "ld1h { z16.h }, p2/Z, [x11]\n"
67 "ld1h { z20.h }, p2/Z, [x11, #1, MUL VL]\n"
68 "zip1 z9.h, z17.h, z16.h\n"
69 "zip2 z8.h, z17.h, z16.h\n"
70 "ld1h { z17.h }, p2/Z, [x10]\n"
71 "ld1h { z22.h }, p2/Z, [x10, #1, MUL VL]\n"
72 "zip1 z7.h, z23.h, z20.h\n"
74 "ld1h { z16.h }, p2/Z, [x9]\n"
75 "ld1h { z21.h }, p2/Z, [x9, #1, MUL VL]\n"
76 "zip1 z6.h, z17.h, z16.h\n"
77 "zip2 z5.h, z17.h, z16.h\n"
78 "ld1h { z18.h }, p2/Z, [x28]\n"
79 "ld1h { z17.h }, p2/Z, [x25]\n"
80 "zip1 z4.h, z22.h, z21.h\n"
81 "zip1 z3.h, z18.h, z17.h\n"
82 "ld1h { z19.h }, p2/Z, [x12, #2, MUL VL]\n"
83 "ld1h { z16.h }, p2/Z, [x11, #2, MUL VL]\n"
84 "zip2 z2.h, z18.h, z17.h\n"
85 "zip2 z1.h, z23.h, z20.h\n"
86 "ld1h { z18.h }, p2/Z, [x10, #2, MUL VL]\n"
87 "ld1h { z17.h }, p2/Z, [x9, #2, MUL VL]\n"
88 "zip1 z0.h, z19.h, z16.h\n"
89 "zip2 z31.h, z19.h, z16.h\n"
90 "ld1h { z20.h }, p2/Z, [x28, #1, MUL VL]\n"
91 "ld1h { z30.h }, p2/Z, [x28, #2, MUL VL]\n"
92 "zip2 z29.h, z22.h, z21.h\n"
93 "zip1 z28.h, z18.h, z17.h\n"
94 "ld1h { z16.h }, p2/Z, [x25, #1, MUL VL]\n"
95 "ld1h { z19.h }, p2/Z, [x25, #2, MUL VL]\n"
96 "zip1 z27.h, z20.h, z16.h\n"
97 "zip2 z26.h, z18.h, z17.h\n"
98 "ld1h { z17.h }, p2/Z, [x24]\n"
99 "ld1h { z18.h }, p2/Z, [x24, #1, MUL VL]\n"
100 "zip2 z25.h, z20.h, z16.h\n"
101 "zip1 z24.h, z30.h, z19.h\n"
102 "ld1h { z23.h }, p2/Z, [x24, #2, MUL VL]\n"
103 "ld1h { z16.h }, p2/Z, [x23]\n"
104 "zip1 z22.h, z17.h, z16.h\n"
105 "zip2 z21.h, z17.h, z16.h\n"
106 "ld1h { z17.h }, p2/Z, [x23, #1, MUL VL]\n"
107 "ld1h { z16.h }, p2/Z, [x23, #2, MUL VL]\n"
108 "st1h { z9.h }, p2, [x21]\n"
109 "zip1 z20.h, z18.h, z17.h\n"
110 "st1h { z8.h }, p2, [x21, #1, MUL VL]\n"
111 "sub x27, x27, x26\n"
113 "zip2 z19.h, z30.h, z19.h\n"
114 "st1h { z7.h }, p2, [x21, #2, MUL VL]\n"
115 "addvl x12, x12, #3\n"
116 "addvl x11, x11, #3\n"
117 "zip2 z18.h, z18.h, z17.h\n"
118 "st1h { z6.h }, p2, [x21, #3, MUL VL]\n"
119 "addvl x10, x10, #3\n"
121 "zip1 z17.h, z23.h, z16.h\n"
122 "st1h { z5.h }, p2, [x21, #4, MUL VL]\n"
123 "addvl x28, x28, #3\n"
124 "addvl x25, x25, #3\n"
125 "zip2 z16.h, z23.h, z16.h\n"
126 "st1h { z4.h }, p2, [x21, #5, MUL VL]\n"
127 "addvl x24, x24, #3\n"
128 "addvl x23, x23, #3\n"
129 "st1h { z3.h }, p2, [x21, #6, MUL VL]\n"
130 "add x22, x22, %x[out_stride]\n"
131 "st1h { z2.h }, p2, [x21, #7, MUL VL]\n"
132 "addvl x21, x21, #12\n"
133 "st1h { z27.h }, p2, [x21, #-4, MUL VL]\n"
134 "st1h { z22.h }, p2, [x21, #-3, MUL VL]\n"
135 "st1h { z21.h }, p2, [x21, #-2, MUL VL]\n"
136 "st1h { z20.h }, p2, [x21, #-1, MUL VL]\n"
137 "st1h { z1.h }, p2, [x20]\n"
138 "st1h { z0.h }, p2, [x20, #1, MUL VL]\n"
139 "st1h { z31.h }, p2, [x20, #2, MUL VL]\n"
140 "st1h { z29.h }, p2, [x20, #3, MUL VL]\n"
141 "st1h { z28.h }, p2, [x20, #4, MUL VL]\n"
142 "st1h { z26.h }, p2, [x20, #5, MUL VL]\n"
143 "st1h { z25.h }, p2, [x20, #6, MUL VL]\n"
144 "st1h { z24.h }, p2, [x20, #7, MUL VL]\n"
145 "addvl x20, x20, #12\n"
146 "st1h { z19.h }, p2, [x20, #-4, MUL VL]\n"
147 "st1h { z18.h }, p2, [x20, #-3, MUL VL]\n"
148 "st1h { z17.h }, p2, [x20, #-2, MUL VL]\n"
149 "st1h { z16.h }, p2, [x20, #-1, MUL VL]\n"
155 "whilelt p1.h, XZR, x20\n"
156 "ld1h { z0.h }, p1/Z, [x12]\n"
157 "ld1h { z16.h }, p1/Z, [x11]\n"
159 "whilelt p0.h, XZR, x20\n"
160 "ld1h { z21.h }, p0/Z, [x12, #1, MUL VL]\n"
161 "ld1h { z19.h }, p0/Z, [x11, #1, MUL VL]\n"
162 "ld1h { z31.h }, p1/Z, [x10]\n"
163 "ld1h { z30.h }, p0/Z, [x10, #1, MUL VL]\n"
165 "decw x27, ALL, MUL #3\n"
166 "ld1h { z18.h }, p1/Z, [x9]\n"
167 "ld1h { z29.h }, p0/Z, [x9, #1, MUL VL]\n"
168 "addvl x12, x12, #1\n"
169 "addvl x11, x11, #1\n"
170 "ld1h { z28.h }, p1/Z, [x28]\n"
171 "ld1h { z20.h }, p1/Z, [x25]\n"
172 "addvl x10, x10, #1\n"
174 "ld1h { z27.h }, p0/Z, [x28, #1, MUL VL]\n"
175 "addvl x28, x28, #1\n"
176 "ld1h { z26.h }, p0/Z, [x25, #1, MUL VL]\n"
177 "addvl x25, x25, #1\n"
178 "ld1h { z25.h }, p1/Z, [x24]\n"
179 "ld1h { z24.h }, p0/Z, [x24, #1, MUL VL]\n"
180 "addvl x24, x24, #1\n"
181 "zip1 z17.h, z0.h, z16.h\n"
182 "ld1h { z23.h }, p1/Z, [x23]\n"
183 "ld1h { z22.h }, p0/Z, [x23, #1, MUL VL]\n"
184 "addvl x23, x23, #1\n"
185 "zip2 z16.h, z0.h, z16.h\n"
186 "zip1 z21.h, z21.h, z19.h\n"
187 "zip1 z19.h, z31.h, z18.h\n"
188 "st1h { z17.h }, p2, [x20]\n"
190 "zip2 z18.h, z31.h, z18.h\n"
191 "zip1 z17.h, z30.h, z29.h\n"
192 "st1h { z16.h }, p2, [x20, #1, MUL VL]\n"
193 "incd x12, ALL, MUL #4\n"
194 "zip1 z16.h, z28.h, z20.h\n"
195 "zip2 z20.h, z28.h, z20.h\n"
196 "st1h { z21.h }, p2, [x20, #2, MUL VL]\n"
197 "incd x11, ALL, MUL #4\n"
198 "st1h { z19.h }, p2, [x20, #3, MUL VL]\n"
199 "incd x10, ALL, MUL #4\n"
200 "incd x9, ALL, MUL #4\n"
201 "zip1 z19.h, z27.h, z26.h\n"
202 "st1h { z18.h }, p2, [x20, #4, MUL VL]\n"
203 "incd x28, ALL, MUL #4\n"
204 "incd x25, ALL, MUL #4\n"
205 "zip1 z18.h, z25.h, z23.h\n"
206 "st1h { z17.h }, p2, [x20, #5, MUL VL]\n"
207 "incd x24, ALL, MUL #4\n"
208 "incd x23, ALL, MUL #4\n"
209 "zip2 z17.h, z25.h, z23.h\n"
210 "st1h { z16.h }, p2, [x20, #6, MUL VL]\n"
211 "zip1 z16.h, z24.h, z22.h\n"
212 "add x22, x22, %x[out_stride]\n"
213 "st1h { z20.h }, p2, [x20, #7, MUL VL]\n"
214 "addvl x20, x20, #12\n"
215 "st1h { z19.h }, p2, [x20, #-4, MUL VL]\n"
216 "st1h { z18.h }, p2, [x20, #-3, MUL VL]\n"
217 "st1h { z17.h }, p2, [x20, #-2, MUL VL]\n"
218 "st1h { z16.h }, p2, [x20, #-1, MUL VL]\n"
221 "cmp %x[height], #0x8\n"
222 "addvl %x[out], %x[out], #12\n"
224 "cbz %x[height], 12f\n"
228 "mov x21, %x[width]\n"
229 "cnth x20, ALL, MUL #3\n"
230 "add x11, x12, %x[in_stride]\n"
231 "cmp %x[height], #0x1\n"
232 "add %x[in], x11, %x[in_stride]\n"
233 "csel x11, x11, %x[pad_row], GT\n"
236 "sub %x[height], %x[height], #0x2\n"
239 "ld1h { z17.h }, p2/Z, [x12]\n"
240 "ld1h { z22.h }, p2/Z, [x12, #1, MUL VL]\n"
241 "sub x21, x21, x20\n"
243 "ld1h { z16.h }, p2/Z, [x11]\n"
244 "ld1h { z21.h }, p2/Z, [x11, #1, MUL VL]\n"
245 "zip1 z18.h, z17.h, z16.h\n"
246 "zip2 z17.h, z17.h, z16.h\n"
247 "ld1h { z20.h }, p2/Z, [x12, #2, MUL VL]\n"
248 "ld1h { z19.h }, p2/Z, [x11, #2, MUL VL]\n"
249 "zip1 z16.h, z22.h, z21.h\n"
250 "st1h { z18.h }, p2, [x22]\n"
251 "st1h { z17.h }, p2, [x22, #1, MUL VL]\n"
252 "addvl x12, x12, #3\n"
253 "addvl x11, x11, #3\n"
254 "zip2 z18.h, z22.h, z21.h\n"
255 "st1h { z16.h }, p2, [x22, #2, MUL VL]\n"
256 "add x22, x22, %x[out_stride]\n"
257 "zip1 z17.h, z20.h, z19.h\n"
258 "zip2 z16.h, z20.h, z19.h\n"
259 "st1h { z18.h }, p2, [x22]\n"
260 "st1h { z17.h }, p2, [x22, #1, MUL VL]\n"
261 "st1h { z16.h }, p2, [x22, #2, MUL VL]\n"
262 "add x22, x22, %x[out_stride]\n"
268 "whilelt p0.h, XZR, x20\n"
269 "ld1h { z20.h }, p0/Z, [x12]\n"
270 "ld1h { z17.h }, p0/Z, [x11]\n"
272 "whilelt p0.h, XZR, x20\n"
273 "ld1h { z19.h }, p0/Z, [x12, #1, MUL VL]\n"
274 "ld1h { z16.h }, p0/Z, [x11, #1, MUL VL]\n"
275 "decw x21, ALL, MUL #3\n"
276 "addvl x12, x12, #1\n"
277 "zip1 z18.h, z20.h, z17.h\n"
278 "zip2 z17.h, z20.h, z17.h\n"
279 "addvl x11, x11, #1\n"
281 "zip1 z16.h, z19.h, z16.h\n"
282 "st1h { z18.h }, p2, [x22]\n"
283 "incd x12, ALL, MUL #4\n"
284 "incd x11, ALL, MUL #4\n"
285 "st1h { z17.h }, p2, [x22, #1, MUL VL]\n"
286 "st1h { z16.h }, p2, [x22, #2, MUL VL]\n"
287 "add x22, x22, %x[out_stride]\n"
290 "cmp %x[height], #0x1\n"
291 "addvl %x[out], %x[out], #3\n"
294 : [height]
"+&r" (height), [in]
"+&r" (in), [out]
"+&r" (out)
295 : [in_stride]
"r" (in_stride), [out_stride]
"r" (out_stride), [pad_row]
"r" (pad_row), [width]
"r" (width)
296 :
"cc",
"memory",
"p0",
"p1",
"p2",
"x9",
"x10",
"x11",
"x12",
"x20",
"x21",
"x22",
"x23",
"x24",
"x25",
"x26",
"x27",
"x28",
"z0",
"z1",
"z2",
"z3",
"z4",
"z5",
"z6",
"z7",
"z8",
"z9",
"z16",
"z17",
"z18",
"z19",
"z20",
"z21",
"z22",
"z23",
"z24",
"z25",
"z26",
"z27",
"z28",
"z29",
"z30",
"z31"
303 void Transform<3, 2, true, VLType::SVE>(
304 bfloat16 *out,
const bfloat16 *in,
int stride,
int x0,
int xmax,
int k0,
int kmax)
306 sve_transpose_interleave_3VL_2x2(
307 reinterpret_cast<uint16_t *
>(out),
308 reinterpret_cast<const uint16_t *
>(in + k0 * stride + x0),
316 #endif // defined(ARM_COMPUTE_ENABLE_SVE)