27 #if defined(ARM_COMPUTE_ENABLE_SVE)
31 void sve_transpose_interleave_6VL_4x2(uint32_t *out,
const uint32_t *in,
size_t width,
size_t in_stride,
size_t height)
33 uint32_t *pad_row =
reinterpret_cast<uint32_t *
>(alloca(width *
sizeof(uint32_t)));
36 memset(pad_row, 0, width *
sizeof(uint32_t));
39 size_t out_stride = 6 * roundup<size_t>(height, 2) * get_vector_length<uint16_t>();
42 "cmp %x[height], #0x4\n"
47 "mov x27, %x[width]\n"
48 "cntw x26, ALL, MUL #6\n"
49 "add x25, x28, %x[in_stride]\n"
50 "add x24, x25, %x[in_stride]\n"
51 "add x23, x24, %x[in_stride]\n"
53 "add %x[in], x23, %x[in_stride]\n"
55 "sub %x[height], %x[height], #0x4\n"
58 "ld1w { z18.s }, p3/Z, [x28]\n"
59 "ld1w { z17.s }, p3/Z, [x28, #1, MUL VL]\n"
61 "add x22, x22, %x[out_stride]\n"
62 "ld1w { z19.s }, p3/Z, [x28, #2, MUL VL]\n"
63 "ld1w { z16.s }, p3/Z, [x25]\n"
64 "zip1 z9.s, z18.s, z16.s\n"
65 "zip2 z8.s, z18.s, z16.s\n"
66 "ld1w { z16.s }, p3/Z, [x25, #1, MUL VL]\n"
67 "ld1w { z18.s }, p3/Z, [x25, #2, MUL VL]\n"
68 "zip1 z7.s, z17.s, z16.s\n"
69 "zip2 z6.s, z17.s, z16.s\n"
70 "ld1w { z17.s }, p3/Z, [x24]\n"
71 "ld1w { z16.s }, p3/Z, [x23]\n"
72 "zip1 z5.s, z19.s, z18.s\n"
73 "zip2 z4.s, z19.s, z18.s\n"
74 "ld1w { z18.s }, p3/Z, [x28, #3, MUL VL]\n"
75 "ld1w { z21.s }, p3/Z, [x28, #4, MUL VL]\n"
76 "zip1 z3.s, z17.s, z16.s\n"
77 "zip2 z2.s, z17.s, z16.s\n"
78 "ld1w { z20.s }, p3/Z, [x28, #5, MUL VL]\n"
79 "ld1w { z17.s }, p3/Z, [x25, #3, MUL VL]\n"
81 "zip1 z1.s, z18.s, z17.s\n"
82 "ld1w { z19.s }, p3/Z, [x25, #4, MUL VL]\n"
83 "ld1w { z16.s }, p3/Z, [x25, #5, MUL VL]\n"
84 "zip2 z0.s, z18.s, z17.s\n"
85 "zip1 z31.s, z21.s, z19.s\n"
86 "ld1w { z18.s }, p3/Z, [x24, #1, MUL VL]\n"
87 "ld1w { z17.s }, p3/Z, [x24, #2, MUL VL]\n"
88 "zip2 z30.s, z21.s, z19.s\n"
89 "zip1 z29.s, z20.s, z16.s\n"
90 "ld1w { z19.s }, p3/Z, [x24, #3, MUL VL]\n"
91 "ld1w { z28.s }, p3/Z, [x24, #4, MUL VL]\n"
92 "zip2 z27.s, z20.s, z16.s\n"
94 "ld1w { z26.s }, p3/Z, [x24, #5, MUL VL]\n"
95 "ld1w { z16.s }, p3/Z, [x23, #1, MUL VL]\n"
96 "zip1 z25.s, z18.s, z16.s\n"
97 "zip2 z24.s, z18.s, z16.s\n"
98 "ld1w { z16.s }, p3/Z, [x23, #2, MUL VL]\n"
99 "ld1w { z18.s }, p3/Z, [x23, #3, MUL VL]\n"
100 "zip1 z23.s, z17.s, z16.s\n"
101 "zip2 z22.s, z17.s, z16.s\n"
102 "ld1w { z17.s }, p3/Z, [x23, #4, MUL VL]\n"
103 "ld1w { z16.s }, p3/Z, [x23, #5, MUL VL]\n"
104 "st1w { z9.s }, p3, [x21]\n"
105 "zip1 z21.s, z19.s, z18.s\n"
106 "st1w { z8.s }, p3, [x21, #1, MUL VL]\n"
107 "zip2 z20.s, z19.s, z18.s\n"
109 "addvl x28, x28, #6\n"
110 "st1w { z7.s }, p3, [x21, #2, MUL VL]\n"
111 "addvl x25, x25, #6\n"
112 "addvl x24, x24, #6\n"
113 "zip1 z19.s, z28.s, z17.s\n"
114 "st1w { z6.s }, p3, [x21, #3, MUL VL]\n"
115 "addvl x23, x23, #6\n"
116 "zip2 z18.s, z28.s, z17.s\n"
117 "zip1 z17.s, z26.s, z16.s\n"
118 "st1w { z5.s }, p3, [x21, #4, MUL VL]\n"
119 "zip2 z16.s, z26.s, z16.s\n"
120 "add x22, x22, %x[out_stride]\n"
121 "st1w { z4.s }, p3, [x21, #5, MUL VL]\n"
122 "st1w { z3.s }, p3, [x21, #6, MUL VL]\n"
123 "st1w { z2.s }, p3, [x21, #7, MUL VL]\n"
124 "addvl x21, x21, #12\n"
125 "st1w { z25.s }, p3, [x21, #-4, MUL VL]\n"
126 "st1w { z24.s }, p3, [x21, #-3, MUL VL]\n"
127 "st1w { z23.s }, p3, [x21, #-2, MUL VL]\n"
128 "st1w { z22.s }, p3, [x21, #-1, MUL VL]\n"
129 "st1w { z1.s }, p3, [x20]\n"
130 "st1w { z0.s }, p3, [x20, #1, MUL VL]\n"
131 "st1w { z31.s }, p3, [x20, #2, MUL VL]\n"
132 "st1w { z30.s }, p3, [x20, #3, MUL VL]\n"
133 "st1w { z29.s }, p3, [x20, #4, MUL VL]\n"
134 "st1w { z27.s }, p3, [x20, #5, MUL VL]\n"
135 "st1w { z21.s }, p3, [x20, #6, MUL VL]\n"
136 "st1w { z20.s }, p3, [x20, #7, MUL VL]\n"
137 "addvl x20, x20, #12\n"
138 "st1w { z19.s }, p3, [x20, #-4, MUL VL]\n"
139 "st1w { z18.s }, p3, [x20, #-3, MUL VL]\n"
140 "st1w { z17.s }, p3, [x20, #-2, MUL VL]\n"
141 "st1w { z16.s }, p3, [x20, #-1, MUL VL]\n"
147 "whilelt p2.s, XZR, x20\n"
148 "ld1w { z19.s }, p2/Z, [x28]\n"
149 "ld1w { z18.s }, p2/Z, [x25]\n"
151 "whilelt p1.s, XZR, x20\n"
152 "ld1w { z17.s }, p1/Z, [x28, #1, MUL VL]\n"
153 "ld1w { z16.s }, p1/Z, [x25, #1, MUL VL]\n"
155 "whilelt p0.s, XZR, x20\n"
156 "ld1w { z22.s }, p0/Z, [x28, #2, MUL VL]\n"
157 "ld1w { z21.s }, p0/Z, [x25, #2, MUL VL]\n"
158 "ld1w { z28.s }, p2/Z, [x24]\n"
159 "ld1w { z27.s }, p2/Z, [x23]\n"
161 "decd x27, ALL, MUL #6\n"
162 "ld1w { z26.s }, p1/Z, [x24, #1, MUL VL]\n"
163 "ld1w { z25.s }, p0/Z, [x24, #2, MUL VL]\n"
164 "zip1 z20.s, z19.s, z18.s\n"
165 "zip2 z19.s, z19.s, z18.s\n"
166 "ld1w { z24.s }, p1/Z, [x23, #1, MUL VL]\n"
167 "ld1w { z23.s }, p0/Z, [x23, #2, MUL VL]\n"
168 "zip1 z18.s, z17.s, z16.s\n"
169 "zip2 z17.s, z17.s, z16.s\n"
170 "zip1 z16.s, z22.s, z21.s\n"
171 "zip2 z22.s, z22.s, z21.s\n"
172 "st1w { z20.s }, p3, [x20]\n"
174 "zip1 z21.s, z28.s, z27.s\n"
175 "zip2 z20.s, z28.s, z27.s\n"
176 "st1w { z19.s }, p3, [x20, #1, MUL VL]\n"
177 "addvl x28, x28, #3\n"
178 "st1w { z18.s }, p3, [x20, #2, MUL VL]\n"
179 "addvl x25, x25, #3\n"
180 "addvl x24, x24, #3\n"
181 "zip1 z19.s, z26.s, z24.s\n"
182 "st1w { z17.s }, p3, [x20, #3, MUL VL]\n"
183 "addvl x23, x23, #3\n"
184 "zip2 z18.s, z26.s, z24.s\n"
185 "zip1 z17.s, z25.s, z23.s\n"
186 "st1w { z16.s }, p3, [x20, #4, MUL VL]\n"
187 "zip2 z16.s, z25.s, z23.s\n"
188 "add x22, x22, %x[out_stride]\n"
189 "st1w { z22.s }, p3, [x20, #5, MUL VL]\n"
190 "st1w { z21.s }, p3, [x20, #6, MUL VL]\n"
191 "st1w { z20.s }, p3, [x20, #7, MUL VL]\n"
192 "addvl x20, x20, #12\n"
193 "st1w { z19.s }, p3, [x20, #-4, MUL VL]\n"
194 "st1w { z18.s }, p3, [x20, #-3, MUL VL]\n"
195 "st1w { z17.s }, p3, [x20, #-2, MUL VL]\n"
196 "st1w { z16.s }, p3, [x20, #-1, MUL VL]\n"
199 "cmp %x[height], #0x4\n"
200 "addvl %x[out], %x[out], #12\n"
202 "cbz %x[height], 12f\n"
206 "mov x21, %x[width]\n"
207 "cntw x20, ALL, MUL #6\n"
208 "add x25, x28, %x[in_stride]\n"
209 "cmp %x[height], #0x1\n"
210 "add %x[in], x25, %x[in_stride]\n"
211 "csel x25, x25, %x[pad_row], GT\n"
214 "sub %x[height], %x[height], #0x2\n"
217 "ld1w { z17.s }, p3/Z, [x28]\n"
218 "ld1w { z19.s }, p3/Z, [x28, #1, MUL VL]\n"
219 "sub x21, x21, x20\n"
221 "ld1w { z18.s }, p3/Z, [x28, #2, MUL VL]\n"
222 "ld1w { z16.s }, p3/Z, [x25]\n"
223 "zip1 z28.s, z17.s, z16.s\n"
224 "zip2 z20.s, z17.s, z16.s\n"
225 "ld1w { z17.s }, p3/Z, [x25, #1, MUL VL]\n"
226 "ld1w { z16.s }, p3/Z, [x25, #2, MUL VL]\n"
227 "zip1 z27.s, z19.s, z17.s\n"
228 "zip2 z26.s, z19.s, z17.s\n"
229 "ld1w { z19.s }, p3/Z, [x28, #3, MUL VL]\n"
230 "ld1w { z25.s }, p3/Z, [x28, #4, MUL VL]\n"
231 "zip1 z24.s, z18.s, z16.s\n"
232 "zip2 z23.s, z18.s, z16.s\n"
233 "ld1w { z22.s }, p3/Z, [x28, #5, MUL VL]\n"
234 "ld1w { z18.s }, p3/Z, [x25, #3, MUL VL]\n"
235 "addvl x28, x28, #6\n"
236 "zip1 z21.s, z19.s, z18.s\n"
237 "ld1w { z17.s }, p3/Z, [x25, #4, MUL VL]\n"
238 "ld1w { z16.s }, p3/Z, [x25, #5, MUL VL]\n"
239 "st1w { z28.s }, p3, [x22]\n"
240 "addvl x25, x25, #6\n"
241 "st1w { z20.s }, p3, [x22, #1, MUL VL]\n"
242 "zip2 z20.s, z19.s, z18.s\n"
243 "zip1 z19.s, z25.s, z17.s\n"
244 "st1w { z27.s }, p3, [x22, #2, MUL VL]\n"
245 "zip2 z18.s, z25.s, z17.s\n"
246 "zip1 z17.s, z22.s, z16.s\n"
247 "st1w { z26.s }, p3, [x22, #3, MUL VL]\n"
248 "zip2 z16.s, z22.s, z16.s\n"
249 "st1w { z24.s }, p3, [x22, #4, MUL VL]\n"
250 "st1w { z23.s }, p3, [x22, #5, MUL VL]\n"
251 "add x22, x22, %x[out_stride]\n"
252 "st1w { z21.s }, p3, [x22]\n"
253 "st1w { z20.s }, p3, [x22, #1, MUL VL]\n"
254 "st1w { z19.s }, p3, [x22, #2, MUL VL]\n"
255 "st1w { z18.s }, p3, [x22, #3, MUL VL]\n"
256 "st1w { z17.s }, p3, [x22, #4, MUL VL]\n"
257 "st1w { z16.s }, p3, [x22, #5, MUL VL]\n"
258 "add x22, x22, %x[out_stride]\n"
264 "whilelt p0.s, XZR, x20\n"
265 "ld1w { z20.s }, p0/Z, [x28]\n"
266 "ld1w { z19.s }, p0/Z, [x25]\n"
268 "whilelt p0.s, XZR, x20\n"
269 "ld1w { z18.s }, p0/Z, [x28, #1, MUL VL]\n"
270 "ld1w { z17.s }, p0/Z, [x25, #1, MUL VL]\n"
272 "whilelt p0.s, XZR, x20\n"
273 "ld1w { z22.s }, p0/Z, [x28, #2, MUL VL]\n"
274 "ld1w { z16.s }, p0/Z, [x25, #2, MUL VL]\n"
275 "decd x21, ALL, MUL #6\n"
277 "zip1 z21.s, z20.s, z19.s\n"
278 "zip2 z20.s, z20.s, z19.s\n"
279 "addvl x28, x28, #3\n"
280 "addvl x25, x25, #3\n"
281 "zip1 z19.s, z18.s, z17.s\n"
282 "zip2 z18.s, z18.s, z17.s\n"
283 "zip1 z17.s, z22.s, z16.s\n"
284 "zip2 z16.s, z22.s, z16.s\n"
285 "st1w { z21.s }, p3, [x22]\n"
286 "st1w { z20.s }, p3, [x22, #1, MUL VL]\n"
287 "st1w { z19.s }, p3, [x22, #2, MUL VL]\n"
288 "st1w { z18.s }, p3, [x22, #3, MUL VL]\n"
289 "st1w { z17.s }, p3, [x22, #4, MUL VL]\n"
290 "st1w { z16.s }, p3, [x22, #5, MUL VL]\n"
291 "add x22, x22, %x[out_stride]\n"
294 "cmp %x[height], #0x1\n"
295 "addvl %x[out], %x[out], #6\n"
298 : [height]
"+&r" (height), [in]
"+&r" (in), [out]
"+&r" (out)
299 : [in_stride]
"r" (in_stride), [out_stride]
"r" (out_stride), [pad_row]
"r" (pad_row), [width]
"r" (width)
300 :
"cc",
"memory",
"p0",
"p1",
"p2",
"p3",
"x20",
"x21",
"x22",
"x23",
"x24",
"x25",
"x26",
"x27",
"x28",
"z0",
"z1",
"z2",
"z3",
"z4",
"z5",
"z6",
"z7",
"z8",
"z9",
"z16",
"z17",
"z18",
"z19",
"z20",
"z21",
"z22",
"z23",
"z24",
"z25",
"z26",
"z27",
"z28",
"z29",
"z30",
"z31"
307 void Transform<6, 2, true, VLType::SVE>(
308 float *out,
const float *in,
int stride,
int x0,
int xmax,
int k0,
int kmax)
310 sve_transpose_interleave_6VL_4x2(
311 reinterpret_cast<uint32_t *
>(out),
312 reinterpret_cast<const uint32_t *
>(in + k0 * stride + x0),
313 (xmax-x0) *
sizeof(
float) / 4,
314 stride *
sizeof(
float),
320 #endif // defined(ARM_COMPUTE_ENABLE_SVE)