42 void cell_width_lt8(
const int16_t *__restrict mag_row_ptr,
const uint8_t *__restrict phase_row_ptr,
float *__restrict output_ptr,
43 size_t mag_stride,
size_t phase_stride,
size_t cell_width,
size_t cell_height,
size_t num_bins,
float phase_scale)
45 const float32x4_t scale_f32 = vdupq_n_f32(phase_scale);
46 static const float32x4_t one_f32 = vdupq_n_f32(1.0f);
47 static const float32x4_t zerofive_f32 = vdupq_n_f32(0.5f);
48 static const int32x4_t zero_s32 = vdupq_n_s32(0);
49 static const int32x4_t one_s32 = vdupq_n_s32(1);
50 const int32x4_t num_bins_s32 = vdupq_n_s32(num_bins);
52 memset(output_ptr, 0,
sizeof(
float) * num_bins);
54 for(
size_t yc = 0; yc < cell_height; ++yc)
58 for(; xc <= static_cast<int32_t>(cell_width) - 4; xc += 4)
61 const uint8x8_t phase_u8 = vld1_u8(phase_row_ptr + xc + yc * phase_stride);
62 const int16x4_t mag_s16 = vld1_s16(mag_row_ptr + xc + yc * mag_stride);
65 const float32x4_t mag_f32 = vcvtq_f32_s32(vmovl_s16(mag_s16));
66 float32x4_t phase_f32 = vcvtq_f32_u32(vmovl_u16(vget_low_u16(vmovl_u8(phase_u8))));
69 phase_f32 = vmlaq_f32(zerofive_f32, phase_f32, scale_f32);
72 int32x4_t hidx_s32 = vcvtq_s32_f32(phase_f32);
75 const float32x4_t hidx_f32 = vcvtq_f32_s32(hidx_s32);
78 const float32x4_t w1_f32 = vsubq_f32(phase_f32, hidx_f32);
81 const float32x4_t w0_f32 = vsubq_f32(one_f32, w1_f32);
84 const float32x4_t mag_w0_f32 = vmulq_f32(mag_f32, w0_f32);
85 const float32x4_t mag_w1_f32 = vmulq_f32(mag_f32, w1_f32);
90 uint32x4_t mask = vceqq_s32(hidx_s32, num_bins_s32);
91 hidx_s32 = vbslq_s32(mask, zero_s32, hidx_s32);
94 *(output_ptr + vgetq_lane_s32(hidx_s32, 0)) += vgetq_lane_f32(mag_w0_f32, 0);
95 *(output_ptr + vgetq_lane_s32(hidx_s32, 1)) += vgetq_lane_f32(mag_w0_f32, 1);
96 *(output_ptr + vgetq_lane_s32(hidx_s32, 2)) += vgetq_lane_f32(mag_w0_f32, 2);
97 *(output_ptr + vgetq_lane_s32(hidx_s32, 3)) += vgetq_lane_f32(mag_w0_f32, 3);
99 hidx_s32 = vaddq_s32(hidx_s32, one_s32);
102 mask = vceqq_s32(hidx_s32, num_bins_s32);
103 hidx_s32 = vbslq_s32(mask, zero_s32, hidx_s32);
106 *(output_ptr + vgetq_lane_s32(hidx_s32, 0)) += vgetq_lane_f32(mag_w1_f32, 0);
107 *(output_ptr + vgetq_lane_s32(hidx_s32, 1)) += vgetq_lane_f32(mag_w1_f32, 1);
108 *(output_ptr + vgetq_lane_s32(hidx_s32, 2)) += vgetq_lane_f32(mag_w1_f32, 2);
109 *(output_ptr + vgetq_lane_s32(hidx_s32, 3)) += vgetq_lane_f32(mag_w1_f32, 3);
112 for(; xc < static_cast<int32_t>(cell_width); ++xc)
114 const float phase_value = *(phase_row_ptr + xc + yc * phase_stride) * phase_scale + 0.5f;
115 const float mag_value = *(mag_row_ptr + xc + yc * mag_stride);
117 const float w1 = phase_value - std::floor(phase_value);
121 const auto hidx =
static_cast<size_t>(phase_value) % num_bins;
124 *(output_ptr + hidx) += mag_value * (1.0f - w1);
125 *(output_ptr + ((hidx + 1) % (num_bins))) += mag_value * w1;
130 void cell_width_ge8(
const int16_t *__restrict mag_row_ptr,
const uint8_t *__restrict phase_row_ptr,
float *__restrict output_ptr,
size_t mag_stride,
size_t phase_stride,
size_t cell_width,
131 size_t cell_height,
size_t num_bins,
float phase_scale)
133 const float32x4_t scale_f32 = vdupq_n_f32(phase_scale);
134 static const float32x4_t one_f32 = vdupq_n_f32(1.0f);
135 static const float32x4_t zerofive_f32 = vdupq_n_f32(0.5f);
136 static const int32x4_t zero_s32 = vdupq_n_s32(0);
137 static const int32x4_t one_s32 = vdupq_n_s32(1);
138 const int32x4_t num_bins_s32 = vdupq_n_s32(num_bins);
140 memset(output_ptr, 0,
sizeof(
float) * num_bins);
142 for(
size_t yc = 0; yc < cell_height; ++yc)
146 for(; xc <= static_cast<int32_t>(cell_width) - 8; xc += 8)
149 const uint8x8_t phase_u8 = vld1_u8(phase_row_ptr + xc + yc * phase_stride);
150 const int16x8_t mag_s16 = vld1q_s16(mag_row_ptr + xc + yc * mag_stride);
153 const uint16x8_t phase_u16 = vmovl_u8(phase_u8);
156 const float32x4x2_t mag_f32 =
159 vcvtq_f32_s32(vmovl_s16(vget_low_s16(mag_s16))),
160 vcvtq_f32_s32(vmovl_s16(vget_high_s16(mag_s16)))
165 float32x4x2_t phase_f32 =
168 vcvtq_f32_u32(vmovl_u16(vget_low_u16(phase_u16))),
169 vcvtq_f32_u32(vmovl_u16(vget_high_u16(phase_u16)))
174 phase_f32.val[0] = vmlaq_f32(zerofive_f32, phase_f32.val[0], scale_f32);
175 phase_f32.val[1] = vmlaq_f32(zerofive_f32, phase_f32.val[1], scale_f32);
178 int32x4x2_t hidx_s32 =
181 vcvtq_s32_f32(phase_f32.val[0]),
182 vcvtq_s32_f32(phase_f32.val[1])
187 const float32x4x2_t hidx_f32 =
190 vcvtq_f32_s32(hidx_s32.val[0]),
191 vcvtq_f32_s32(hidx_s32.val[1])
195 float32x4x2_t w1_f32 =
198 vsubq_f32(phase_f32.val[0], hidx_f32.val[0]),
199 vsubq_f32(phase_f32.val[1], hidx_f32.val[1])
203 float32x4x2_t w0_f32 =
206 vsubq_f32(one_f32, w1_f32.val[0]),
207 vsubq_f32(one_f32, w1_f32.val[1])
212 const float32x4x2_t mag_w0_f32 =
215 vmulq_f32(mag_f32.val[0], w0_f32.val[0]),
216 vmulq_f32(mag_f32.val[1], w0_f32.val[1])
220 const float32x4x2_t mag_w1_f32 =
223 vmulq_f32(mag_f32.val[0], w1_f32.val[0]),
224 vmulq_f32(mag_f32.val[1], w1_f32.val[1])
234 vceqq_s32(hidx_s32.val[0], num_bins_s32),
235 vceqq_s32(hidx_s32.val[1], num_bins_s32)
239 hidx_s32.val[0] = vbslq_s32(mask.val[0], zero_s32, hidx_s32.val[0]);
240 hidx_s32.val[1] = vbslq_s32(mask.val[1], zero_s32, hidx_s32.val[1]);
243 *(output_ptr + vgetq_lane_s32(hidx_s32.val[0], 0)) += vgetq_lane_f32(mag_w0_f32.val[0], 0);
244 *(output_ptr + vgetq_lane_s32(hidx_s32.val[0], 1)) += vgetq_lane_f32(mag_w0_f32.val[0], 1);
245 *(output_ptr + vgetq_lane_s32(hidx_s32.val[0], 2)) += vgetq_lane_f32(mag_w0_f32.val[0], 2);
246 *(output_ptr + vgetq_lane_s32(hidx_s32.val[0], 3)) += vgetq_lane_f32(mag_w0_f32.val[0], 3);
249 *(output_ptr + vgetq_lane_s32(hidx_s32.val[1], 0)) += vgetq_lane_f32(mag_w0_f32.val[1], 0);
250 *(output_ptr + vgetq_lane_s32(hidx_s32.val[1], 1)) += vgetq_lane_f32(mag_w0_f32.val[1], 1);
251 *(output_ptr + vgetq_lane_s32(hidx_s32.val[1], 2)) += vgetq_lane_f32(mag_w0_f32.val[1], 2);
252 *(output_ptr + vgetq_lane_s32(hidx_s32.val[1], 3)) += vgetq_lane_f32(mag_w0_f32.val[1], 3);
254 hidx_s32.val[0] = vaddq_s32(hidx_s32.val[0], one_s32);
255 hidx_s32.val[1] = vaddq_s32(hidx_s32.val[1], one_s32);
258 mask.val[0] = vceqq_s32(hidx_s32.val[0], num_bins_s32);
259 mask.val[1] = vceqq_s32(hidx_s32.val[1], num_bins_s32);
261 hidx_s32.val[0] = vbslq_s32(mask.val[0], zero_s32, hidx_s32.val[0]);
262 hidx_s32.val[1] = vbslq_s32(mask.val[1], zero_s32, hidx_s32.val[1]);
265 *(output_ptr + vgetq_lane_s32(hidx_s32.val[0], 0)) += vgetq_lane_f32(mag_w1_f32.val[0], 0);
266 *(output_ptr + vgetq_lane_s32(hidx_s32.val[0], 1)) += vgetq_lane_f32(mag_w1_f32.val[0], 1);
267 *(output_ptr + vgetq_lane_s32(hidx_s32.val[0], 2)) += vgetq_lane_f32(mag_w1_f32.val[0], 2);
268 *(output_ptr + vgetq_lane_s32(hidx_s32.val[0], 3)) += vgetq_lane_f32(mag_w1_f32.val[0], 3);
271 *(output_ptr + vgetq_lane_s32(hidx_s32.val[1], 0)) += vgetq_lane_f32(mag_w1_f32.val[1], 0);
272 *(output_ptr + vgetq_lane_s32(hidx_s32.val[1], 1)) += vgetq_lane_f32(mag_w1_f32.val[1], 1);
273 *(output_ptr + vgetq_lane_s32(hidx_s32.val[1], 2)) += vgetq_lane_f32(mag_w1_f32.val[1], 2);
274 *(output_ptr + vgetq_lane_s32(hidx_s32.val[1], 3)) += vgetq_lane_f32(mag_w1_f32.val[1], 3);
277 for(; xc < static_cast<int32_t>(cell_width); xc++)
279 const float phase_value = *(phase_row_ptr + xc + yc * phase_stride) * phase_scale + 0.5f;
280 const float mag_value = *(mag_row_ptr + xc + yc * mag_stride);
282 const float w1 = phase_value - std::floor(phase_value);
286 const size_t hidx =
static_cast<size_t>(phase_value) % num_bins;
289 *(output_ptr + hidx) += mag_value * (1.0f - w1);
290 *(output_ptr + ((hidx + 1) % (num_bins))) += mag_value * w1;
295 void l2_norm(
const float *__restrict input_row_ptr,
float *__restrict output_ptr,
size_t input_stride,
296 size_t num_cells_per_block_height,
size_t num_bins_block_x,
size_t num_bins_block,
float l2_hyst_threshold)
301 float32x4_t sum_f32 = vdupq_n_f32(0.0f);
304 for(
size_t yc = 0; yc < num_cells_per_block_height; ++yc)
306 const float *
const hist_ptr = input_row_ptr + yc * input_stride;
310 for(; xc <= static_cast<int32_t>(num_bins_block_x) - 16; xc += 16)
312 const float32x4x4_t input_value =
315 vld1q_f32(hist_ptr + xc + 0),
316 vld1q_f32(hist_ptr + xc + 4),
317 vld1q_f32(hist_ptr + xc + 8),
318 vld1q_f32(hist_ptr + xc + 12)
323 sum_f32 = vmlaq_f32(sum_f32, input_value.val[0], input_value.val[0]);
324 sum_f32 = vmlaq_f32(sum_f32, input_value.val[1], input_value.val[1]);
325 sum_f32 = vmlaq_f32(sum_f32, input_value.val[2], input_value.val[2]);
326 sum_f32 = vmlaq_f32(sum_f32, input_value.val[3], input_value.val[3]);
328 vst1q_f32(&output_ptr[xc + 0 + yc * num_bins_block_x], input_value.val[0]);
329 vst1q_f32(&output_ptr[xc + 4 + yc * num_bins_block_x], input_value.val[1]);
330 vst1q_f32(&output_ptr[xc + 8 + yc * num_bins_block_x], input_value.val[2]);
331 vst1q_f32(&output_ptr[xc + 12 + yc * num_bins_block_x], input_value.val[3]);
335 for(; xc < static_cast<int32_t>(num_bins_block_x); xc++)
337 const float input_value = hist_ptr[xc];
339 sum += input_value * input_value;
341 output_ptr[xc + yc * num_bins_block_x] = input_value;
345 sum += vgetq_lane_f32(sum_f32, 0);
346 sum += vgetq_lane_f32(sum_f32, 1);
347 sum += vgetq_lane_f32(sum_f32, 2);
348 sum += vgetq_lane_f32(sum_f32, 3);
350 const float scale = 1.0f / (std::sqrt(sum) + num_bins_block * 0.1f);
351 const float32x4_t scale_f32 = vdupq_n_f32(scale);
355 for(; i <= static_cast<int32_t>(num_bins_block) - 16; i += 16)
357 float32x4x4_t input_value =
360 vld1q_f32(&output_ptr[i + 0]),
361 vld1q_f32(&output_ptr[i + 4]),
362 vld1q_f32(&output_ptr[i + 8]),
363 vld1q_f32(&output_ptr[i + 12])
368 input_value.val[0] = vmulq_f32(input_value.val[0], scale_f32);
369 input_value.val[1] = vmulq_f32(input_value.val[1], scale_f32);
370 input_value.val[2] = vmulq_f32(input_value.val[2], scale_f32);
371 input_value.val[3] = vmulq_f32(input_value.val[3], scale_f32);
373 vst1q_f32(&output_ptr[i + 0], input_value.val[0]);
374 vst1q_f32(&output_ptr[i + 4], input_value.val[1]);
375 vst1q_f32(&output_ptr[i + 8], input_value.val[2]);
376 vst1q_f32(&output_ptr[i + 12], input_value.val[3]);
379 for(; i < static_cast<int32_t>(num_bins_block); ++i)
381 output_ptr[i] *=
scale;
385 void l2hys_norm(
const float *__restrict input_row_ptr,
float *__restrict output_ptr,
size_t input_stride,
size_t num_cells_per_block_height,
size_t num_bins_block_x,
size_t num_bins_block,
386 float l2_hyst_threshold)
389 float32x4_t sum_f32 = vdupq_n_f32(0.0f);
392 for(
size_t yc = 0; yc < num_cells_per_block_height; ++yc)
394 const float *
const hist_ptr = input_row_ptr + yc * input_stride;
398 for(; xc <= static_cast<int32_t>(num_bins_block_x) - 16; xc += 16)
400 const float32x4x4_t input_value =
403 vld1q_f32(hist_ptr + xc + 0),
404 vld1q_f32(hist_ptr + xc + 4),
405 vld1q_f32(hist_ptr + xc + 8),
406 vld1q_f32(hist_ptr + xc + 12)
411 sum_f32 = vmlaq_f32(sum_f32, input_value.val[0], input_value.val[0]);
412 sum_f32 = vmlaq_f32(sum_f32, input_value.val[1], input_value.val[1]);
413 sum_f32 = vmlaq_f32(sum_f32, input_value.val[2], input_value.val[2]);
414 sum_f32 = vmlaq_f32(sum_f32, input_value.val[3], input_value.val[3]);
416 vst1q_f32(&output_ptr[xc + 0 + yc * num_bins_block_x], input_value.val[0]);
417 vst1q_f32(&output_ptr[xc + 4 + yc * num_bins_block_x], input_value.val[1]);
418 vst1q_f32(&output_ptr[xc + 8 + yc * num_bins_block_x], input_value.val[2]);
419 vst1q_f32(&output_ptr[xc + 12 + yc * num_bins_block_x], input_value.val[3]);
423 for(; xc < static_cast<int32_t>(num_bins_block_x); ++xc)
425 const float input_value = hist_ptr[xc];
427 sum += input_value * input_value;
429 output_ptr[xc + yc * num_bins_block_x] = input_value;
433 sum += vgetq_lane_f32(sum_f32, 0);
434 sum += vgetq_lane_f32(sum_f32, 1);
435 sum += vgetq_lane_f32(sum_f32, 2);
436 sum += vgetq_lane_f32(sum_f32, 3);
438 float scale = 1.0f / (std::sqrt(sum) + num_bins_block * 0.1f);
439 float32x4_t scale_f32 = vdupq_n_f32(scale);
440 const float32x4_t l2_hyst_threshold_f32 = vdupq_n_f32(l2_hyst_threshold);
443 sum_f32 = vdupq_n_f32(0.0f);
448 for(; i <= static_cast<int32_t>(num_bins_block) - 16; i += 16)
450 float32x4x4_t input_value =
453 vld1q_f32(&output_ptr[i + 0]),
454 vld1q_f32(&output_ptr[i + 4]),
455 vld1q_f32(&output_ptr[i + 8]),
456 vld1q_f32(&output_ptr[i + 12])
461 input_value.val[0] = vmulq_f32(input_value.val[0], scale_f32);
462 input_value.val[1] = vmulq_f32(input_value.val[1], scale_f32);
463 input_value.val[2] = vmulq_f32(input_value.val[2], scale_f32);
464 input_value.val[3] = vmulq_f32(input_value.val[3], scale_f32);
467 input_value.val[0] = vminq_f32(input_value.val[0], l2_hyst_threshold_f32);
468 input_value.val[1] = vminq_f32(input_value.val[1], l2_hyst_threshold_f32);
469 input_value.val[2] = vminq_f32(input_value.val[2], l2_hyst_threshold_f32);
470 input_value.val[3] = vminq_f32(input_value.val[3], l2_hyst_threshold_f32);
473 sum_f32 = vmlaq_f32(sum_f32, input_value.val[0], input_value.val[0]);
474 sum_f32 = vmlaq_f32(sum_f32, input_value.val[1], input_value.val[1]);
475 sum_f32 = vmlaq_f32(sum_f32, input_value.val[2], input_value.val[2]);
476 sum_f32 = vmlaq_f32(sum_f32, input_value.val[3], input_value.val[3]);
478 vst1q_f32(&output_ptr[i + 0], input_value.val[0]);
479 vst1q_f32(&output_ptr[i + 4], input_value.val[1]);
480 vst1q_f32(&output_ptr[i + 8], input_value.val[2]);
481 vst1q_f32(&output_ptr[i + 12], input_value.val[3]);
484 sum += vgetq_lane_f32(sum_f32, 0);
485 sum += vgetq_lane_f32(sum_f32, 1);
486 sum += vgetq_lane_f32(sum_f32, 2);
487 sum += vgetq_lane_f32(sum_f32, 3);
489 for(; i < static_cast<int32_t>(num_bins_block); ++i)
491 float input_value = output_ptr[i] *
scale;
494 input_value = std::min(input_value, l2_hyst_threshold);
496 sum += input_value * input_value;
498 output_ptr[i] = input_value;
502 scale = 1.0f / (std::sqrt(sum) + 1e-3f);
503 scale_f32 = vdupq_n_f32(scale);
508 for(; i <= static_cast<int32_t>(num_bins_block) - 16; i += 16)
510 float32x4x4_t input_value =
513 vld1q_f32(&output_ptr[i + 0]),
514 vld1q_f32(&output_ptr[i + 4]),
515 vld1q_f32(&output_ptr[i + 8]),
516 vld1q_f32(&output_ptr[i + 12])
521 input_value.val[0] = vmulq_f32(input_value.val[0], scale_f32);
522 input_value.val[1] = vmulq_f32(input_value.val[1], scale_f32);
523 input_value.val[2] = vmulq_f32(input_value.val[2], scale_f32);
524 input_value.val[3] = vmulq_f32(input_value.val[3], scale_f32);
526 vst1q_f32(&output_ptr[i + 0], input_value.val[0]);
527 vst1q_f32(&output_ptr[i + 4], input_value.val[1]);
528 vst1q_f32(&output_ptr[i + 8], input_value.val[2]);
529 vst1q_f32(&output_ptr[i + 12], input_value.val[3]);
532 for(; i < static_cast<int32_t>(num_bins_block); ++i)
535 output_ptr[i] *=
scale;
539 void l1_norm(
const float *__restrict input_row_ptr,
float *__restrict output_ptr,
size_t input_stride,
size_t num_cells_per_block_height,
size_t num_bins_block_x,
size_t num_bins_block,
540 float l2_hyst_threshold)
545 float32x4_t sum_f32 = vdupq_n_f32(0.0f);
548 for(
size_t yc = 0; yc < num_cells_per_block_height; ++yc)
550 const float *
const hist_ptr = input_row_ptr + yc * input_stride;
554 for(; xc <= static_cast<int32_t>(num_bins_block_x) - 16; xc += 16)
556 const float32x4x4_t input_value =
559 vld1q_f32(hist_ptr + xc + 0),
560 vld1q_f32(hist_ptr + xc + 4),
561 vld1q_f32(hist_ptr + xc + 8),
562 vld1q_f32(hist_ptr + xc + 12)
567 sum_f32 += vabsq_f32(input_value.val[0]);
568 sum_f32 += vabsq_f32(input_value.val[1]);
569 sum_f32 += vabsq_f32(input_value.val[2]);
570 sum_f32 += vabsq_f32(input_value.val[3]);
572 vst1q_f32(&output_ptr[xc + 0 + yc * num_bins_block_x], input_value.val[0]);
573 vst1q_f32(&output_ptr[xc + 4 + yc * num_bins_block_x], input_value.val[1]);
574 vst1q_f32(&output_ptr[xc + 8 + yc * num_bins_block_x], input_value.val[2]);
575 vst1q_f32(&output_ptr[xc + 12 + yc * num_bins_block_x], input_value.val[3]);
578 for(; xc < static_cast<int32_t>(num_bins_block_x); xc++)
580 const float input_value = hist_ptr[xc];
582 sum += std::abs(input_value);
584 output_ptr[xc + yc * num_bins_block_x] = input_value;
588 sum += vgetq_lane_f32(sum_f32, 0);
589 sum += vgetq_lane_f32(sum_f32, 1);
590 sum += vgetq_lane_f32(sum_f32, 2);
591 sum += vgetq_lane_f32(sum_f32, 3);
593 const float scale = 1.0f / (std::sqrt(sum) + num_bins_block * 0.1f);
594 const float32x4_t scale_f32 = vdupq_n_f32(scale);
598 for(; i <= static_cast<int32_t>(num_bins_block) - 16; i += 16)
600 float32x4x4_t input_value =
603 vld1q_f32(&output_ptr[i + 0]),
604 vld1q_f32(&output_ptr[i + 4]),
605 vld1q_f32(&output_ptr[i + 8]),
606 vld1q_f32(&output_ptr[i + 12])
611 input_value.val[0] = vmulq_f32(input_value.val[0], scale_f32);
612 input_value.val[1] = vmulq_f32(input_value.val[1], scale_f32);
613 input_value.val[2] = vmulq_f32(input_value.val[2], scale_f32);
614 input_value.val[3] = vmulq_f32(input_value.val[3], scale_f32);
616 vst1q_f32(&output_ptr[i + 0], input_value.val[0]);
617 vst1q_f32(&output_ptr[i + 4], input_value.val[1]);
618 vst1q_f32(&output_ptr[i + 8], input_value.val[2]);
619 vst1q_f32(&output_ptr[i + 12], input_value.val[3]);
622 for(; i < static_cast<int32_t>(num_bins_block); ++i)
624 output_ptr[i] *=
scale;
630 : _func(nullptr), _input_magnitude(nullptr), _input_phase(nullptr), _output(nullptr), _cell_width(0), _cell_height(0), _num_bins(0), _phase_scale(0)
643 _input_magnitude = input_magnitude;
644 _input_phase = input_phase;
654 _func = &cell_width_lt8;
658 _func = &cell_width_ge8;
662 const unsigned int num_elems_read_per_iteration = 1;
663 const unsigned int num_rows_read_per_iteration = _cell_height;
664 const unsigned int num_elems_written_per_iteration = 1;
677 INEKernel::configure(win);
694 Window win_phase(win_mag);
696 Iterator mag(_input_magnitude, win_mag);
702 const auto mag_row_ptr =
reinterpret_cast<const int16_t *
>(mag.
ptr());
703 const auto phase_row_ptr =
reinterpret_cast<const uint8_t *
>(phase.
ptr());
704 const auto out_row_ptr =
reinterpret_cast<float *
>(out.
ptr());
706 (*_func)(mag_row_ptr, phase_row_ptr, out_row_ptr, mag_stride, phase_stride, _cell_width, _cell_height, _num_bins, _phase_scale);
712 : _func(nullptr), _input(nullptr), _output(nullptr), _num_cells_per_block(), _num_cells_per_block_stride(), _num_bins(0), _l2_hyst_threshold(0.0f)
733 _num_cells_per_block = num_cells_per_block;
734 _num_cells_per_block_stride = num_cells_per_block_stride;
756 const unsigned int num_elems_read_per_iteration = 1;
757 const unsigned int num_rows_read_per_iteration = _num_cells_per_block.
height;
758 const unsigned int num_elems_written_per_iteration = 1;
759 const unsigned int num_rows_written_per_iteration = _num_cells_per_block.
height;
763 AccessWindowRectangle output_access(output->
info(), 0, 0, num_elems_written_per_iteration, num_rows_written_per_iteration);
771 INEKernel::configure(win);
785 const int32_t num_bins_per_block_x = _num_cells_per_block.
width * _num_bins;
800 const auto out_row_ptr =
reinterpret_cast<float *
>(out.
ptr());
803 (*_func)(input_row_ptr, out_row_ptr, input_stride, _num_cells_per_block.
height, num_bins_per_block_x, num_bins_per_block, _l2_hyst_threshold);
L2-norm followed by clipping.
size_t num_bins() const
The number of histogram bins for each cell.
Window calculate_max_window(const ValidRegion &valid_region, const Steps &steps, bool skip_border, BorderSize border_size)
void run(const Window &window, const ThreadInfo &info) override
Execute the kernel on the passed window.
const Window & window() const
The maximum window the kernel can be executed on.
virtual size_t dimension(size_t index) const =0
Return the size of the requested dimension.
const Size2D & cell_size() const
The cell size in pixels.
1 channel, 1 U8 per channel
DATA_TYPE sum(__global const DATA_TYPE *input)
Calculate sum of a vector.
virtual DataType data_type() const =0
Data type used for each element of the tensor.
Store the HOG's metadata.
1 channel, 1 F32 per channel
#define ARM_COMPUTE_ERROR_ON(cond)
If the condition is true then an error message is printed and an exception thrown.
SimpleTensor< uint8_t > phase(const SimpleTensor< T > &gx, const SimpleTensor< T > &gy, PhaseType phase_type)
Describe one of the image's dimensions with a start, end and step.
PhaseType phase_type() const
The type of PhaseType.
Interface for Neon tensor.
const Size2D & block_stride() const
The block stride in pixels.
HOGNormType normalization_type() const
The normalization type.
Copyright (c) 2017-2021 Arm Limited.
virtual void set_valid_region(const ValidRegion &valid_region)=0
Set the valid region of the tensor.
size_t height
Height of the image region or rectangle.
Implementation of a rectangular access pattern.
virtual Format format() const =0
Colour format of the image.
#define ARM_COMPUTE_ERROR_ON_DATA_TYPE_NOT_IN(t,...)
static constexpr size_t DimX
Alias for dimension 0 also known as X dimension.
bool update_window_and_padding(Window &win, Ts &&... patterns)
Update window and padding size for each of the access patterns.
#define ARM_COMPUTE_UNUSED(...)
To avoid unused variables warnings.
virtual const TensorShape & tensor_shape() const =0
Size for each dimension of the tensor.
Class to describe a number of elements in each dimension.
const Size2D & block_size() const
The block size in pixels.
Implementation of a row access pattern.
virtual ITensorInfo * info() const =0
Interface to be implemented by the child class to return the tensor's metadata.
size_t data_size_from_type(DataType data_type)
The size in bytes of the data type.
constexpr uint8_t * ptr() const
Return a pointer to the current pixel.
float l2_hyst_threshold() const
Threshold used for L2HYS_NORM normalization type.
#define ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(k)
1 channel, 1 S16 per channel
void run(const Window &window, const ThreadInfo &info) override
Execute the kernel on the passed window.
#define ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(t, c,...)
void configure(const ITensor *input, ITensor *output, const HOGInfo *hog_info)
Initialise the kernel's input, output and HOG's metadata.
static constexpr size_t DimY
Alias for dimension 1 also known as Y dimension.
ScaleKernelInfo info(interpolation_policy, default_border_mode, PixelValue(), sampling_policy, false)
Information about executing thread and CPU.
size_t pixel_size_from_format(Format format)
The size in bytes of the pixel format.
size_t width
Width of the image region or rectangle.
Class for specifying the size of an image or rectangle.
constexpr const Dimension & y() const
Alias to access the second dimension of the window.
void configure(const ITensor *input_magnitude, const ITensor *input_phase, ITensor *output, const HOGInfo *hog_info)
Initialise the kernel's inputs, output and HOG's metadata.
unsigned int num_elems_processed_per_iteration
void execute_window_loop(const Window &w, L &&lambda_function, Ts &&... iterators)
Iterate through the passed window, automatically adjusting the iterators and calling the lambda_funct...
virtual const Strides & strides_in_bytes() const =0
The strides in bytes for accessing each dimension of the tensor.
Container for valid region of a window.
Iterator updated by execute_window_loop for each window element.
constexpr int start() const
Return the start of the dimension.
Describe a multidimensional execution window.
virtual size_t num_channels() const =0
The number of channels for each tensor element.
NEHOGBlockNormalizationKernel()
Default constructor.
#define ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(f, s)
constexpr const Dimension & x() const
Alias to access the first dimension of the window.
NEHOGOrientationBinningKernel()
Default constructor.