21.08
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2021 Arm Limited.
3
*
4
* SPDX-License-Identifier: MIT
5
*
6
* Permission is hereby granted, free of charge, to any person obtaining a copy
7
* of this software and associated documentation files (the "Software"), to
8
* deal in the Software without restriction, including without limitation the
9
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10
* sell copies of the Software, and to permit persons to whom the Software is
11
* furnished to do so, subject to the following conditions:
12
*
13
* The above copyright notice and this permission notice shall be included in all
14
* copies or substantial portions of the Software.
15
*
16
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22
* SOFTWARE.
23
*/
24
25
#include "
src/core/NEON/kernels/arm_gemm/utils.hpp
"
26
27
#include <cstdint>
28
29
#pragma once
30
31
namespace
arm_conv
{
32
namespace
depthwise
{
33
34
void
a64_s8q_nhwc_generic_output9_mla_depthfirst_impl
(
const
int8_t *
const
*
const
, int8_t *
const
*
const
,
const
void
*,
const
arm_gemm::Requantize32
&,
const
unsigned
int
,
const
unsigned
int
);
35
36
struct
a64_s8q_nhwc_generic_output9_mla_depthfirst
37
{
38
typedef
int32_t
bias_type
;
39
typedef
int8_t
input_type
;
40
typedef
int8_t
weight_type
;
41
typedef
int8_t
return_type
;
42
43
typedef
void (*
kern_type
)(
const
int8_t *
const
*
const
, int8_t *
const
*
const
,
const
void
*,
const
arm_gemm::Requantize32
&,
const
unsigned
int,
const
unsigned
int);
44
45
constexpr
static
arm_gemm::VLType
vl_type
=
arm_gemm::VLType::None
;
46
47
constexpr
static
unsigned
int
n_output_points
= 9;
48
49
kern_type
kernel
=
a64_s8q_nhwc_generic_output9_mla_depthfirst_impl
;
50
51
a64_s8q_nhwc_generic_output9_mla_depthfirst
(
const
CPUInfo
*) {}
52
};
53
54
}
// namespace depthwise
55
}
// namespace arm_conv
arm_conv
Definition:
CpuDepthwiseConv2dAssemblyWrapperKernel.h:31
arm_gemm::VLType::None
arm_conv::depthwise::a64_s8q_nhwc_generic_output9_mla_depthfirst::a64_s8q_nhwc_generic_output9_mla_depthfirst
a64_s8q_nhwc_generic_output9_mla_depthfirst(const CPUInfo *)
Definition:
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp:51
arm_conv::depthwise::a64_s8q_nhwc_generic_output9_mla_depthfirst
Definition:
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp:36
utils.hpp
arm_conv::depthwise::a64_s8q_nhwc_generic_output9_mla_depthfirst::kern_type
void(* kern_type)(const int8_t *const *const, int8_t *const *const, const void *, const arm_gemm::Requantize32 &, const unsigned int, const unsigned int)
Definition:
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp:43
arm_conv::depthwise::a64_s8q_nhwc_generic_output9_mla_depthfirst::bias_type
int32_t bias_type
Definition:
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp:38
arm_compute::CPUInfo
Definition:
CPPTypes.h:59
arm_conv::depthwise::a64_s8q_nhwc_generic_output9_mla_depthfirst::input_type
int8_t input_type
Definition:
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp:39
arm_conv::depthwise::a64_s8q_nhwc_generic_output9_mla_depthfirst::weight_type
int8_t weight_type
Definition:
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp:40
arm_gemm::Requantize32
Definition:
arm_gemm.hpp:127
arm_conv::depthwise::a64_s8q_nhwc_generic_output9_mla_depthfirst::vl_type
static constexpr arm_gemm::VLType vl_type
Definition:
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp:45
arm_conv::depthwise::a64_s8q_nhwc_generic_output9_mla_depthfirst::n_output_points
static constexpr unsigned int n_output_points
Definition:
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp:47
arm_conv::depthwise::depthwise
template UniqueDepthwiseCommon< float > depthwise(const DepthwiseArgs &, const Nothing &)
arm_conv::depthwise::a64_s8q_nhwc_generic_output9_mla_depthfirst::return_type
int8_t return_type
Definition:
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp:41
arm_conv::depthwise::a64_s8q_nhwc_generic_output9_mla_depthfirst_impl
void a64_s8q_nhwc_generic_output9_mla_depthfirst_impl(const int8_t *const *const inptrs, int8_t *const *const outptrs, const void *params, const arm_gemm::Requantize32 &qp, const unsigned int n_points, const unsigned int n_channels)
Definition:
generic.cpp:33
arm_gemm::VLType
VLType
Definition:
utils.hpp:80
arm_conv::depthwise::a64_s8q_nhwc_generic_output9_mla_depthfirst::kernel
kern_type kernel
Definition:
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp:49
src
core
NEON
kernels
arm_conv
depthwise
kernels
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp
Generated on Fri Aug 20 2021 08:56:12 for Compute Library by
1.8.13