31 static std::vector<float> Bias2({0, 2});
33 static std::vector<float> Bias4({1, 2, 3, 4});
35 static std::vector<float> Bias8({1, 2, 3, 4, 1, 2, 3, 4});
38 static std::vector<float> ConvInput3x8x16({
39 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
40 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
41 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
42 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
43 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
44 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
45 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
46 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
47 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
48 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
49 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
50 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
51 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
52 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
53 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
54 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
55 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
56 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
57 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
58 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
59 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
60 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
61 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
62 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
72 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
73 std::vector<T>
GetBias2(
bool biasEnabled,
float qScale)
77 return QuantizedVector<T>(Bias2, qScale, 0);
81 return std::vector<T>();
86 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
87 std::vector<T>
GetBias4(
bool biasEnabled,
float qScale)
91 return QuantizedVector<T>(Bias4, qScale, 0);
95 return std::vector<T>();
100 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
101 std::vector<T>
GetBias8(
bool biasEnabled,
float qScale)
105 return QuantizedVector<T>(Bias8, qScale, 0);
109 return std::vector<T>();
114 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
119 const unsigned int outputChannels = outputInfo.
GetShape()[channelsIndex];
121 switch (outputChannels)
126 return GetBias2<ArmnnType>(biasEnabled, qScale);
130 return GetBias4<ArmnnType>(biasEnabled, qScale);
134 return GetBias8<ArmnnType>(biasEnabled, qScale);
146 struct FullyConnectedBiasTypeForInputType;
149 struct FullyConnectedBiasTypeForInputType<float>
155 struct FullyConnectedBiasTypeForInputType<uint8_t>
157 using Type = int32_t;
161 template<
typename T,
typename B>
162 void ApplyBias(std::vector<T>& v,
float vScale, int32_t vOffset,
163 const std::vector<B>& bias,
float bScale, int32_t bOffset, uint32_t w, uint32_t h)
165 ARMNN_ASSERT_MSG((armnn::IsQuantizedType<T>() && vScale != 0.0f) || (!armnn::IsQuantizedType<T>()),
166 "Invalid type and parameter combination.");
167 ARMNN_ASSERT_MSG((armnn::IsQuantizedType<B>() && bScale != 0.0f) || (!armnn::IsQuantizedType<B>()),
168 "Invalid type and parameter combination.");
171 for (uint32_t i = 0; i < bias.size(); ++i)
174 for (uint32_t y = 0; y < h; ++y)
176 for (uint32_t x = 0; x < w; ++x)
178 uint32_t offset = (i * h + y) * w + x;
180 T& outRef = v[offset];
182 outRef = SelectiveQuantize<T>(dOutput + dBias, vScale, vOffset);
198 const std::vector<T>& originalInput,
199 const std::vector<T>& originalKernel,
200 const std::vector<B>& bias,
201 const std::vector<T>& originalOutputExpected,
208 uint32_t padLeft = 0,
210 uint32_t padRight = 0,
211 uint32_t padBottom = 0,
212 uint32_t strideX = 1,
213 uint32_t strideY = 1,
214 uint32_t dilationX = 1,
215 uint32_t dilationY = 1)
223 unsigned int outputHeight =
armnn::numeric_cast<
unsigned int>(originalOutputExpectedShape[2]);
224 unsigned int outputWidth =
armnn::numeric_cast<
unsigned int>(originalOutputExpectedShape[3]);
225 unsigned int outputChannels =
armnn::numeric_cast<
unsigned int>(originalOutputExpectedShape[1]);
226 unsigned int outputNum =
armnn::numeric_cast<
unsigned int>(originalOutputExpectedShape[0]);
233 bool biasEnabled = bias.size() > 0;
240 ARMNN_ASSERT(!biasEnabled || bias.size() == outputChannels);
249 armnn::TensorInfo biasDesc({
static_cast<unsigned int>(bias.size())}, ArmnnBType);
252 if(armnn::IsQuantizedType<T>())
254 inputTensorInfo.SetQuantizationScale(qScale);
255 inputTensorInfo.SetQuantizationOffset(qOffset);
265 std::vector<T> inputImage;
266 inputImage.assign(originalInput.data(), originalInput.data() + 1*inputChannels*inputHeight*inputWidth);
267 std::vector<T> inputData;
268 inputData.insert(inputData.end(), inputImage.begin(), inputImage.end());
269 inputData.insert(inputData.end(), inputImage.begin(), inputImage.end());
275 std::vector<T> tmp(inputData.size());
276 armnnUtils::Permute(inputTensorInfo.GetShape(), NCHWToNHWC, inputData.data(), tmp.data(),
sizeof(T));
280 std::vector<T> outputImage;
281 outputImage.assign(originalOutputExpected.data(),
282 originalOutputExpected.data() + outputChannels*outputHeight*outputWidth);
287 std::vector<T> biasV;
288 biasV.assign(bias.data(), bias.data() + outputChannels);
291 outputWidth, outputHeight);
298 std::vector<T> expectedOutput;
299 expectedOutput.insert(expectedOutput.end(), outputImage.begin(), outputImage.end());
300 expectedOutput.insert(expectedOutput.end(), outputImage.begin(), outputImage.end());
305 std::vector<T> tmp(expectedOutput.size());
307 expectedOutput = tmp;
310 std::unique_ptr<armnn::ITensorHandle> inputHandle = tensorHandleFactory.
CreateTensorHandle(inputTensorInfo);
311 std::unique_ptr<armnn::ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputTensorInfo);
319 std::vector<T> kernel = originalKernel;
331 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
332 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
335 data.
m_Bias = &biasTensor;
347 std::unique_ptr<armnn::IWorkload> workload = workloadFactory.
CreateConvolution2d(data, info);
348 inputHandle->Allocate();
349 outputHandle->Allocate();
353 ExecuteWorkload(*workload, memoryManager);
359 outputHandle->GetShape(),
370 const std::vector<T>& input,
371 const std::vector<T>& kernel,
372 const std::vector<B>& bias,
373 const std::vector<O>& outputExpected,
380 uint32_t padLeft = 1,
382 uint32_t padRight = 1,
383 uint32_t padBottom = 1,
384 uint32_t strideX = 1,
385 uint32_t strideY = 1)
403 bool biasEnabled = bias.size() > 0;
406 armnn::TensorInfo inputTensorInfo({inputNum, inputHeight, inputWidth, inputChannels}, ArmnnType);
407 armnn::TensorInfo outputTensorInfo({outputNum, outputHeight, outputWidth, outputChannels},
409 armnn::TensorInfo kernelDesc({kernelChanMul, kernelHeight, kernelWidth, kernelChannels}, ArmnnType);
410 armnn::TensorInfo biasDesc({
static_cast<unsigned int>(bias.size())}, ArmnnBType);
413 std::vector<T> inputData;
414 inputData.assign(input.data(), input.data() + inputHeight*inputWidth*inputChannels);
417 std::vector<O> outputData;
418 outputData.assign(outputExpected.data(), outputExpected.data() + outputHeight*outputWidth*outputChannels);
420 std::vector<O> actualOutput(outputTensorInfo.GetNumElements());
422 std::unique_ptr<armnn::ITensorHandle> inputHandle = tensorHandleFactory.
CreateTensorHandle(inputTensorInfo);
423 std::unique_ptr<armnn::ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputTensorInfo);
433 data.
m_Bias = &biasTensor;
444 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
445 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
447 std::unique_ptr<armnn::IWorkload> workload = workloadFactory.
CreateConvolution2d(data, info);
448 inputHandle->Allocate();
449 outputHandle->Allocate();
453 ExecuteWorkload(*workload, memoryManager);
459 outputHandle->GetShape(),
460 outputTensorInfo.GetShape());
463 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
478 unsigned int batchSize = 1;
479 unsigned int inputChannels = 2;
480 unsigned int outputChannels = 3;
481 unsigned int inputSize = 5;
482 unsigned int kernelSize = 3;
483 unsigned int padSize = 2;
484 unsigned int stride = 1;
485 unsigned int outputSize = 7;
487 armnn::TensorInfo inputInfo({batchSize, inputChannels, inputSize, 1}, ArmnnType);
488 armnn::TensorInfo outputInfo({batchSize, outputChannels, outputSize, 1}, ArmnnType);
489 armnn::TensorInfo kernelInfo({outputChannels, inputChannels, kernelSize, 1}, ArmnnType);
493 if(armnn::IsQuantizedType<T>())
496 inputInfo.SetQuantizationOffset(qOffset);
497 outputInfo.SetQuantizationScale(qScale);
498 outputInfo.SetQuantizationOffset(qOffset);
499 kernelInfo.SetQuantizationScale(qScale);
500 kernelInfo.SetQuantizationOffset(qOffset);
501 biasInfo.SetQuantizationScale(inputInfo.GetQuantizationScale()*kernelInfo.GetQuantizationScale());
502 biasInfo.SetQuantizationOffset(0);
505 std::vector<T> inputData = QuantizedVector<T>(
507 5.0f, -2.0f, 2.5f, 0.0f, 1.0f,
508 -3.0f, 3.2f, 5.0f, 2.0f, 3.0f,
510 inputInfo.GetQuantizationScale(),
511 inputInfo.GetQuantizationOffset());
513 std::vector<T> kernelData = QuantizedVector<T>(
524 kernelInfo.GetQuantizationScale(),
525 kernelInfo.GetQuantizationOffset());
527 std::vector<B> biasData =
528 QuantizedVector<B>({ 1.0f, 0.0f, 0.0f }, biasInfo.GetQuantizationScale(), biasInfo.GetQuantizationOffset());
530 std::vector<T> outputData = QuantizedVector<T>(
532 4.5f, -10.8f, 5.0f + 6.4f - 7.5f, -2.0f + 10.0f -3.0f, 2.5f + 4.0f - 4.5f, 6.0f, 1.0f,
533 -0.6f, -0.6f + 0.64f, -0.6f + 0.64f + 1.0f, 0.64f + 1.0f + 0.4f, 1.0f + 0.4f + 0.6f, 0.4f + 0.6f, 0.6f,
534 2.5f, -1.0f + 3.0f, 1.25f - 3.2f + 2.5f, -1.0f - 5.0f, 1.25f + 0.5f - 2.0f, -3.0f, 0.5f
536 outputInfo.GetQuantizationScale(),
537 outputInfo.GetQuantizationOffset());
539 std::vector<T> actualOutput(outputInfo.GetNumElements());
544 ApplyBias(outputData, outputInfo.GetQuantizationScale(), outputInfo.GetQuantizationOffset(),
545 biasData, biasInfo.GetQuantizationScale(), biasInfo.GetQuantizationOffset(),
549 std::unique_ptr<armnn::ITensorHandle> inputHandle = tensorHandleFactory.
CreateTensorHandle(inputInfo);
550 std::unique_ptr<armnn::ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputInfo);
560 AddInputToWorkload(data, info, inputInfo, inputHandle.get());
561 AddOutputToWorkload(data, info, outputInfo, outputHandle.get());
564 data.
m_Bias = &biasTensor;
573 std::unique_ptr<armnn::IWorkload> workload = workloadFactory.
CreateConvolution2d(data, info);
574 inputHandle->Allocate();
575 outputHandle->Allocate();
579 ExecuteWorkload(*workload, memoryManager);
585 outputHandle->GetShape(),
586 outputInfo.GetShape());
589 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
603 std::vector<T> input =
612 std::vector<T> kernel =
621 const std::vector<float> outputData =
628 return SimpleConvolution2dNhwcTestImpl<ArmnnType, ArmnnType>(
636 inputDesc.GetShape(),
637 kernelDesc.GetShape(),
638 outputDesc.GetShape(),
644 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
658 std::vector<T> input =
669 std::vector<T> kernel =
678 std::vector<T> outputData =
685 uint32_t padLeft = 1;
687 uint32_t padRight = 1;
688 uint32_t padBottom = 1;
689 uint32_t strideX = 2;
690 uint32_t strideY = 2;
692 return SimpleConvolution2dNhwcTestImpl<ArmnnType, ArmnnType>(
700 inputDesc.GetShape(),
701 kernelDesc.GetShape(),
702 outputDesc.GetShape(),
714 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
726 std::vector<T> input = QuantizedVector<T>(ConvInput3x8x16, qScale, qOffset);
730 std::vector<T> kernel = QuantizedVector<T>({
772 std::vector<T> expectedOutput = QuantizedVector<T>({
773 -24, -24, -24, -24, -24, -24, -24, -24, -24, -24, -24, -24, -24, -24,
774 -25, -25, -25, -25, -25, -25, -25, -25, -25, -25, -25, -25, -25, -25,
775 -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f,
776 -23.5f, -23.5f, -23.5f,
777 -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f, -23.5f,
778 -23.5f, -23.5f, -23.5f,
780 5, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
781 5, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
782 5, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
783 5, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
787 return SimpleConvolution2dTestImpl<ArmnnType, ArmnnBType>(
793 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
795 inputDesc.GetShape(),
796 kernelDesc.GetShape(),
797 outputDesc.GetShape(),
818 std::vector<unsigned int> inputShape = { 1, 3, 8, 16 };
819 std::vector<T> input = QuantizedVector<T>(ConvInput3x8x16, qScale, qOffset);
823 std::vector<T> kernel = QuantizedVector<T>({
853 std::vector<T> expectedOutput = QuantizedVector<T>({
854 -15, -15, -15, -15, -15, -15, -15, -15, -15, -15, -15, -15, -15, -15,
855 -16, -16, -16, -16, -16, -16, -16, -16, -16, -16, -16, -16, -16, -16,
856 -14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,
857 -14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,
858 -14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,
859 -14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,-14.5f,
861 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
862 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
863 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
864 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
865 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
866 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
870 return SimpleConvolution2dTestImpl<ArmnnType, ArmnnBType>(
876 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
878 inputDesc.GetShape(),
879 kernelDesc.GetShape(),
880 outputDesc.GetShape(),
898 std::vector<T> input =
908 std::vector<T> kernel =
925 std::vector<T> expectedOutput =
928 -242, -594, -934, -372, 0, 0,
929 -495, -1190, -1850, -725, 0, 0,
930 -538, -1256, -1916, -748, 0, 0,
931 -273, -626, -946, -363, 0, 0,
938 return SimpleConvolution2dTestImpl<ArmnnType, ArmnnBType>(
944 GetBias2<ArmnnBType>(
false, qScale * qScale),
946 inputDesc.GetShape(),
947 kernelDesc.GetShape(),
948 outputDesc.GetShape(),
970 std::vector<T> input =
981 std::vector<T> kernel =
992 std::vector<T> expectedOutput =
994 -7140, -10580, -13940, -9300, -5230,
995 -9590, -14120, -18520, -12290, -6860,
996 -9980, -14560, -18960, -12560, -7000,
997 -7518, -10904, -14144, -9318, -5152,
998 -5032, -7256, -9376, -6142, -3368,
1002 return SimpleConvolution2dTestImpl<ArmnnType, ArmnnBType>(
1005 tensorHandleFactory,
1008 GetBias2<ArmnnBType>(
false, qScale * qScale),
1010 inputDesc.GetShape(),
1011 kernelDesc.GetShape(),
1012 outputDesc.GetShape(),
1022 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
1027 const std::vector<float>& inputNoQuantizedValues,
1029 const std::vector<float>& kernelNoQuantizedValues,
1031 const std::vector<float>& outputExpectedNoQuantizedValues,
1036 uint32_t padLeft = 0,
1037 uint32_t padTop = 0,
1038 uint32_t padRight = 0,
1039 uint32_t padBottom = 0,
1040 uint32_t strideX = 1,
1041 uint32_t strideY = 1,
1042 bool biasEnabled =
false 1078 auto input = QuantizedVector<T>(inputNoQuantizedValues,
1081 auto kernel = QuantizedVector<T>(kernelNoQuantizedValues,
1084 auto expectedOutput = QuantizedVector<T>(outputExpectedNoQuantizedValues,
1088 return SimpleConvolution2dTestImpl<ArmnnType, ArmnnBType>(
1091 tensorHandleFactory,
1094 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
1112 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
1121 std::vector<float> inputNoQuantizedValues =
1123 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1124 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1125 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1126 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1127 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1128 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1129 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1130 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1131 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1132 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
1136 std::vector<float> kernelNoQuantizedValues =
1146 std::vector<float> outputExpectedNoQuantizedValues =
1154 return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1157 tensorHandleFactory,
1158 inputNoQuantizedValues,
1160 kernelNoQuantizedValues,
1162 outputExpectedNoQuantizedValues,
1170 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
1179 std::vector<float> inputNoQuantizedValues =
1181 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1182 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1183 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1184 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1185 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1186 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1187 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1188 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1189 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1190 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1192 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1193 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1194 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1195 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1196 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1197 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1198 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1199 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1200 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1201 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
1205 std::vector<float> kernelNoQuantizedValues =
1219 std::vector<float> outputExpectedNoQuantizedValues =
1227 return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1230 tensorHandleFactory,
1231 inputNoQuantizedValues,
1233 kernelNoQuantizedValues,
1235 outputExpectedNoQuantizedValues,
1243 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
1252 std::vector<float> inputNoQuantizedValues =
1254 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1255 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1256 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1257 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1258 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1259 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1260 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1261 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1262 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1263 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
1267 std::vector<float> kernelNoQuantizedValues =
1277 std::vector<float> outputExpectedNoQuantizedValues =
1284 uint32_t padLeft = 1;
1285 uint32_t padTop = 1;
1286 uint32_t padRight = 1;
1287 uint32_t padBottom = 1;
1289 return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1292 tensorHandleFactory,
1293 inputNoQuantizedValues,
1295 kernelNoQuantizedValues,
1297 outputExpectedNoQuantizedValues,
1312 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
1320 unsigned int inputHeight = 8;
1321 unsigned int inputWidth = 16;
1322 unsigned int inputChannels = 3;
1323 unsigned int inputNum = 5;
1325 unsigned int kernelHeight = 3;
1326 unsigned int kernelWidth = 3;
1328 unsigned int strideX = 2;
1329 unsigned int strideY = 3;
1330 unsigned int padX = 1;
1331 unsigned int padY = 1;
1333 unsigned int outputNum = inputNum;
1334 unsigned int outputChannels = 2;
1335 unsigned int outputHeight = (inputHeight + 2 * padY - kernelHeight + strideY) / strideY;
1336 unsigned int outputWidth = (inputWidth + 2 * padX - kernelWidth + strideX) / strideX;
1343 unsigned int inputShape[] = {inputNum, inputChannels, inputHeight, inputWidth};
1344 unsigned int outputShape[] = {outputNum, outputChannels, outputHeight, outputWidth};
1345 unsigned int kernelShape[] = {outputChannels, inputChannels, kernelHeight, kernelWidth};
1346 unsigned int biasShape[] = {outputChannels};
1353 auto input = MakeRandomTensor<T>(inputTensorInfo, 124908);
1354 auto kernel = MakeRandomTensor<T>(kernelDesc, 891234);
1355 auto bias = MakeRandomTensor<T>(biasDesc, 1028);
1358 std::vector<T> expectedOutput(outputTensorInfo.
GetNumElements());
1360 std::unique_ptr<armnn::ITensorHandle> inputHandle = tensorHandleFactory.
CreateTensorHandle(inputTensorInfo);
1361 std::unique_ptr<armnn::ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputTensorInfo);
1371 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
1372 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
1374 data.
m_Bias = &biasTensor;
1383 std::unique_ptr<armnn::ITensorHandle> outputHandleRef = refTensorHandleFactory.
CreateTensorHandle(outputTensorInfo);
1384 std::unique_ptr<armnn::ITensorHandle> inputHandleRef = refTensorHandleFactory.
CreateTensorHandle(inputTensorInfo);
1388 SetWorkloadInput(refData, refInfo, 0, inputTensorInfo, inputHandleRef.get());
1389 SetWorkloadOutput(refData, refInfo, 0, outputTensorInfo, outputHandleRef.get());
1391 std::unique_ptr<armnn::IWorkload> workload = workloadFactory.
CreateConvolution2d(data, info);
1392 std::unique_ptr<armnn::IWorkload> workloadRef = refWorkloadFactory.
CreateConvolution2d(refData, refInfo);
1394 outputHandleRef->Allocate();
1395 inputHandleRef->Allocate();
1397 inputHandle->Allocate();
1398 outputHandle->Allocate();
1403 ExecuteWorkload(*workload, memoryManager);
1405 workloadRef->PostAllocationConfigure();
1406 workloadRef->Execute();
1413 outputHandle->GetShape(),
1430 std::vector<armnn::BFloat16> inputValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1463 std::vector<armnn::BFloat16> kernelValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1481 const std::vector<float> outputData =
1494 uint32_t padLeft = 1;
1495 uint32_t padTop = 1;
1496 uint32_t padRight = 1;
1497 uint32_t padBottom = 1;
1498 uint32_t strideX = 2;
1499 uint32_t strideY = 2;
1505 tensorHandleFactory,
1508 std::vector<float>(),
1510 inputDesc.GetShape(),
1511 kernelDesc.GetShape(),
1512 outputDesc.GetShape(),
1537 std::vector<armnn::BFloat16> inputValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1570 std::vector<armnn::BFloat16> kernelValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1588 const std::vector<float> outputData =
1601 uint32_t padLeft = 1;
1602 uint32_t padTop = 1;
1603 uint32_t padRight = 1;
1604 uint32_t padBottom = 1;
1605 uint32_t strideX = 2;
1606 uint32_t strideY = 2;
1612 tensorHandleFactory,
1615 std::vector<float>(),
1617 inputDesc.GetShape(),
1618 kernelDesc.GetShape(),
1619 outputDesc.GetShape(),
1641 const std::vector<T>& input,
1642 const std::vector<T>& kernel,
1643 const std::vector<B>& bias,
1644 const std::vector<T>& outputExpected,
1651 uint32_t padLeft = 0,
1652 uint32_t padTop = 0,
1653 uint32_t padRight = 0,
1654 uint32_t padBottom = 0,
1655 uint32_t strideX = 1,
1656 uint32_t strideY = 1)
1671 bool biasEnabled = bias.size() > 0;
1672 ARMNN_ASSERT(!biasEnabled || bias.size() == outputChannels);
1679 armnn::TensorInfo kernelDesc({1, kernelHeight, kernelWidth, kernelChannels}, ArmnnType);
1680 armnn::TensorInfo biasDesc({
static_cast<unsigned int>(bias.size())}, ArmnnBType);
1683 if (armnn::IsQuantizedType<T>())
1685 inputTensorInfo.SetQuantizationScale(qScale);
1686 inputTensorInfo.SetQuantizationOffset(qOffset);
1689 kernelDesc.SetQuantizationScale(qScale);
1690 kernelDesc.SetQuantizationOffset(qOffset);
1691 biasDesc.SetQuantizationScale(qScale*qScale);
1692 biasDesc.SetQuantizationOffset(0);
1696 std::vector<T> inputData;
1697 inputData.assign(input.data(), input.data() + inputChannels*inputHeight*inputWidth);
1703 std::vector<T> tmp(inputData.size());
1704 armnnUtils::Permute(inputTensorInfo.GetShape(), NCHWToNHWC, inputData.data(), tmp.data(),
sizeof(T));
1709 std::vector<T> outputData;
1710 outputData.assign(outputExpected.data(), outputExpected.data() + outputChannels*outputHeight*outputWidth);
1713 std::vector<T> biasV;
1714 biasV.assign(bias.data(), bias.data() + outputChannels);
1716 biasV, biasDesc.GetQuantizationScale(), biasDesc.GetQuantizationOffset(),
1717 outputWidth, outputHeight);
1725 std::vector<T> tmp(outputData.size());
1730 std::unique_ptr<armnn::ITensorHandle> inputHandle = tensorHandleFactory.
CreateTensorHandle(inputTensorInfo);
1731 std::unique_ptr<armnn::ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputTensorInfo);
1745 data.m_Bias = &biasTensor;
1746 data.m_Parameters.m_StrideX = strideX;
1747 data.m_Parameters.m_StrideY = strideY;
1748 data.m_Parameters.m_PadLeft = padLeft;
1749 data.m_Parameters.m_PadRight = padRight;
1750 data.m_Parameters.m_PadTop = padTop;
1751 data.m_Parameters.m_PadBottom = padBottom;
1752 data.m_Parameters.m_BiasEnabled = biasEnabled;
1753 data.m_Parameters.m_DataLayout = layout;
1756 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
1757 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
1760 inputHandle->Allocate();
1761 outputHandle->Allocate();
1765 ExecuteWorkload(*workload, memoryManager);
1771 outputHandle->GetShape(),
1775 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
1787 unsigned int inputHeight = 3;
1788 unsigned int inputWidth = 3;
1789 unsigned int inputChannels = 2;
1790 unsigned int inputNum = 1;
1792 unsigned int kernelHeight = 3;
1793 unsigned int kernelWidth = 3;
1795 unsigned int outputHeight = 1;
1796 unsigned int outputWidth = 1;
1797 unsigned int outputChannels = inputChannels;
1798 unsigned int outputNum = inputNum;
1809 if(armnn::IsQuantizedType<T>())
1815 kernelDesc.SetQuantizationScale(qScale);
1816 kernelDesc.SetQuantizationOffset(qOffset);
1817 biasDesc.SetQuantizationScale(qScale*qScale);
1818 biasDesc.SetQuantizationOffset(0);
1820 std::vector<T> inputData = std::vector<T>(
1821 QuantizedVector<T>({
1837 std::vector<T> tmp(inputData.size());
1842 std::vector<B> biasV(QuantizedVector<B>({ 0, 2 },
1843 biasDesc.GetQuantizationScale(),
1844 biasDesc.GetQuantizationOffset()));
1846 std::vector<T> kernelData = std::vector<T>(
1847 QuantizedVector<T>({
1856 kernelDesc.GetQuantizationScale(),
1857 kernelDesc.GetQuantizationOffset()));
1860 std::vector<T> outputImage(
1861 QuantizedVector<T>({ 0.f, 0.f },
1870 biasV, biasDesc.GetQuantizationScale(), biasDesc.GetQuantizationOffset(),
1871 outputWidth, outputHeight);
1876 std::vector<T> tmp(outputImage.size());
1883 std::unique_ptr<armnn::ITensorHandle> inputHandle = tensorHandleFactory.
CreateTensorHandle(inputTensorInfo);
1884 std::unique_ptr<armnn::ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputTensorInfo);
1894 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
1895 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
1898 data.
m_Bias = &biasTensor;
1909 inputHandle->Allocate();
1910 outputHandle->Allocate();
1914 ExecuteWorkload(*workload, memoryManager);
1920 outputHandle->GetShape(),
1924 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
1936 unsigned int depthMultiplier = 2;
1938 unsigned int inputHeight = 8;
1939 unsigned int inputWidth = 16;
1940 unsigned int inputChannels = 2;
1941 unsigned int inputBatchSize = 1;
1943 unsigned int kernelHeight = 5;
1944 unsigned int kernelWidth = 3;
1946 unsigned int outputHeight = inputHeight - kernelHeight + 1 + 2;
1947 unsigned int outputWidth = (inputWidth - kernelWidth + 1)/2;
1948 unsigned int outputChannels = inputChannels * depthMultiplier;
1949 unsigned int outputBatchSize = inputBatchSize;
1952 inputBatchSize, inputChannels, inputHeight, inputWidth, layout, ArmnnType);
1954 outputBatchSize, outputChannels, outputHeight, outputWidth, layout, ArmnnType);
1960 if(armnn::IsQuantizedType<T>())
1966 kernelDesc.SetQuantizationScale(qScale);
1967 kernelDesc.SetQuantizationOffset(qOffset);
1968 biasDesc.SetQuantizationScale(qScale*qScale);
1969 biasDesc.SetQuantizationOffset(0);
1973 std::vector<T> originalInputData = std::vector<T>(
1974 QuantizedVector<T>({
1975 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1976 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1977 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1978 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1979 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1980 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1981 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1982 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f, 0.5f,
1983 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1984 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1985 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1986 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1987 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1988 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1989 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
1990 0.0f, 0.0f, 1.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f
1995 std::vector<T> inputData = originalInputData;
2001 originalInputData.data(), inputData.data(),
sizeof(T));
2004 std::vector<B> biasV = QuantizedVector<B>({ 0, 2, 1, -1 },
2005 biasDesc.GetQuantizationScale(),
2006 biasDesc.GetQuantizationOffset());
2008 std::vector<T> kernelData = std::vector<T>(
2009 QuantizedVector<T>({
2034 kernelDesc.GetQuantizationScale(),
2035 kernelDesc.GetQuantizationOffset()));
2038 std::vector<T> originalOutputImage = std::vector<T>(
2039 QuantizedVector<T>({
2040 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
2041 5, 5, 5, 5, 5, 5, 5, 5.5, 5.5, 5.5, 5.5, 5.5, 5.5, 5.5,
2042 5.5, 5.5, 5.5, 5.5, 5.5, 5.5, 5.5, 5, 5, 5, 5, 5, 5, 5,
2043 2.5, 2.5, 2.5, 2.5, 2.5, 2.5, 2.5, 3.5, 3.5, 3.5, 3.5, 3.5, 3.5, 3.5,
2044 4.5, 4.5, 4.5, 4.5, 4.5, 4.5, 4.5, 6, 6, 6, 6, 6, 6, 6,
2045 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
2046 1, 3, 0, 0, 0, 0, 0, 2, 4, 0, 0, 0, 0, 0,
2047 2, 4, 0, 0, 0, 0, 0, 2, 4, 0, 0, 0, 0, 0,
2048 2, 4, 0, 0, 0, 0, 0, 2, 4, 0, 0, 0, 0, 0,
2049 2, 4, 0, 0, 0, 0, 0, 3, 5, 0, 0, 0, 0, 0,
2050 3, 5, 0, 0, 0, 0, 0, 3, 5, 0, 0, 0, 0, 0,
2051 3, 5, 0, 0, 0, 0, 0, 3, 5, 0, 0, 0, 0, 0
2063 biasDesc.GetQuantizationScale(),
2064 biasDesc.GetQuantizationOffset(),
2069 std::vector<T> outputImage = originalOutputImage;
2073 originalOutputImage.data(), outputImage.data(),
sizeof(T));
2078 std::unique_ptr<armnn::ITensorHandle> inputHandle = tensorHandleFactory.
CreateTensorHandle(inputTensorInfo);
2079 std::unique_ptr<armnn::ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputTensorInfo);
2089 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
2090 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
2093 data.
m_Bias = &biasTensor;
2104 inputHandle->Allocate();
2105 outputHandle->Allocate();
2109 ExecuteWorkload(*workload, memoryManager);
2115 outputHandle->GetShape(),
2126 const std::vector<T>& originalInput,
2127 const std::vector<T>& originalKernel,
2128 const std::vector<B>& bias,
2129 const std::vector<T>& originalOutputExpected,
2136 uint32_t padLeft = 0,
2137 uint32_t padTop = 0,
2138 uint32_t padRight = 0,
2139 uint32_t padBottom = 0,
2140 uint32_t strideX = 1,
2141 uint32_t strideY = 1,
2142 uint32_t dilationX = 1,
2143 uint32_t dilationY = 1)
2150 unsigned int outputHeight =
armnn::numeric_cast<
unsigned int>(originalOutputExpectedShape[2]);
2151 unsigned int outputWidth =
armnn::numeric_cast<
unsigned int>(originalOutputExpectedShape[3]);
2152 unsigned int outputChannels =
armnn::numeric_cast<
unsigned int>(originalOutputExpectedShape[1]);
2153 unsigned int outputNum =
armnn::numeric_cast<
unsigned int>(originalOutputExpectedShape[0]);
2159 bool biasEnabled = bias.size() > 0;
2166 ARMNN_ASSERT(!biasEnabled || bias.size() == outputChannels);
2176 armnn::TensorInfo kernelDesc({1, kernelHeight, kernelWidth, kernelChannels}, ArmnnType);
2178 armnn::TensorInfo biasDesc({
static_cast<unsigned int>(bias.size())}, ArmnnBType);
2181 if(armnn::IsQuantizedType<T>())
2183 inputTensorInfo.SetQuantizationScale(qScale);
2184 inputTensorInfo.SetQuantizationOffset(qOffset);
2187 kernelDesc.SetQuantizationScale(qScale);
2188 kernelDesc.SetQuantizationOffset(qOffset);
2189 biasDesc.SetQuantizationScale(qScale*qScale);
2190 biasDesc.SetQuantizationOffset(0);
2194 std::vector<T> input;
2195 input.assign(originalInput.data(), originalInput.data() + 1*inputChannels*inputHeight*inputWidth);
2196 std::vector<T> inputData;
2197 inputData.insert(inputData.end(), input.begin(), input.end());
2198 inputData.insert(inputData.end(), input.begin(), input.end());
2204 std::vector<T> tmp(inputData.size());
2205 armnnUtils::Permute(inputTensorInfo.GetShape(), NCHWToNHWC, inputData.data(), tmp.data(),
sizeof(T));
2209 std::vector<T> output;
2210 output.assign(originalOutputExpected.data(),
2211 originalOutputExpected.data() + outputChannels*outputHeight*outputWidth);
2216 std::vector<T> biasV;
2217 biasV.assign(bias.data(), bias.data() + outputChannels);
2219 biasV, biasDesc.GetQuantizationScale(), biasDesc.GetQuantizationOffset(),
2220 outputWidth, outputHeight);
2226 std::vector<T> outputData;
2227 outputData.insert(outputData.end(), output.begin(), output.end());
2228 outputData.insert(outputData.end(), output.begin(), output.end());
2233 std::vector<T> tmp(outputData.size());
2238 std::unique_ptr<armnn::ITensorHandle> inputHandle = tensorHandleFactory.
CreateTensorHandle(inputTensorInfo);
2239 std::unique_ptr<armnn::ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputTensorInfo);
2253 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
2254 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
2257 data.
m_Bias = &biasTensor;
2270 inputHandle->Allocate();
2271 outputHandle->Allocate();
2275 ExecuteWorkload(*workload, memoryManager);
2281 outputHandle->GetShape(),
2298 auto input = QuantizedVector<T>(
2312 inputTensorInfo.GetQuantizationScale(),
2313 inputTensorInfo.GetQuantizationOffset());
2318 auto kernel = QuantizedVector<T>({
2329 kernelTensorInfo.GetQuantizationScale(),
2330 kernelTensorInfo.GetQuantizationOffset());
2335 auto expectedOutput = QuantizedVector<T>(
2337 396, 664, 820, 756, 602, 1016, 1608, 1880, 1652, 1268, 1976, 2968, 3240, 2732,
2338 2028, 2628, 3808, 4060, 3312, 2390, 2596, 3700, 3900, 3130, 2226, 2817, 4186,
2339 4330, 3609, 2651, 5414, 7864, 8120, 6626, 4780, 6314, 9144, 9400, 7646, 5500,
2340 6759, 9610, 9850, 7875, 5579, 5935, 8348, 8540, 6757, 4742
2342 outputTensorInfo.GetQuantizationScale(),
2343 outputTensorInfo.GetQuantizationOffset());
2345 return DepthwiseConvolution2dAsymmetricTestImpl<ArmnnType, ArmnnBType>(
2348 tensorHandleFactory,
2351 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
2353 inputTensorInfo.GetShape(),
2354 kernelTensorInfo.GetShape(),
2355 outputTensorInfo.GetShape(),
2380 auto input = QuantizedVector<T>(
2394 inputTensorInfo.GetQuantizationScale(),
2395 inputTensorInfo.GetQuantizationOffset());
2398 auto kernel = QuantizedVector<T>({
2409 kernelTensorInfo.GetQuantizationScale(),
2410 kernelTensorInfo.GetQuantizationOffset());
2413 auto expectedOutput = QuantizedVector<T>(
2415 396,664,820,756,602,
2416 1016,1608,1880,1652,1268,
2417 1976,2968,3240,2732,2028,
2418 2628,3808,4060,3312,2390,
2419 2596,3700,3900,3130,2226,
2421 2817,4186,4330,3609,2651,
2422 5414,7864,8120,6626,4780,
2423 6314,9144,9400,7646,5500,
2424 6759,9610,9850,7875,5579,
2425 5935,8348,8540,6757,4742
2427 outputTensorInfo.GetQuantizationScale(),
2428 outputTensorInfo.GetQuantizationOffset());
2430 return DepthwiseConvolution2dTestImpl<ArmnnType, ArmnnBType>(
2433 tensorHandleFactory,
2436 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
2438 inputTensorInfo.GetShape(),
2439 kernelTensorInfo.GetShape(),
2440 outputTensorInfo.GetShape(),
2465 auto input = QuantizedVector<T>(
2467 0, 0, 0, 0, 0, 0, 0, 0, 0,
2468 0, 0, 0, 0, 0, 0, 0, 0, 0,
2469 0, 0, 0, 0, 0, 0, 0, 0, 0,
2470 0, 0, 0, 1, 1, 1, 0, 0, 0,
2471 0, 0, 0, 1, 1, 1, 0, 0, 0,
2472 0, 0, 0, 1, 1, 1, 0, 0, 0,
2473 0, 0, 0, 0, 0, 0, 0, 0, 0,
2474 0, 0, 0, 0, 0, 0, 0, 0, 0,
2475 0, 0, 0, 0, 0, 0, 0, 0, 0
2477 inputTensorInfo.GetQuantizationScale(),
2478 inputTensorInfo.GetQuantizationOffset());
2481 auto kernel = QuantizedVector<T>({
2486 kernelTensorInfo.GetQuantizationScale(),
2487 kernelTensorInfo.GetQuantizationOffset());
2489 uint32_t padLeft = 0;
2490 uint32_t padTop = 0;
2491 uint32_t padRight = 0;
2492 uint32_t padBottom = 0;
2493 uint32_t strideX = 1;
2494 uint32_t strideY = 1;
2495 uint32_t dilationX = 3;
2496 uint32_t dilationY = 3;
2500 auto expectedOutput = QuantizedVector<T>(
2506 outputTensorInfo.GetQuantizationScale(),
2507 outputTensorInfo.GetQuantizationOffset());
2509 return DepthwiseConvolution2dTestImpl<ArmnnType, ArmnnBType>(
2512 tensorHandleFactory,
2515 GetBias2<ArmnnBType>(biasEnabled, qScale * qScale),
2517 inputTensorInfo.GetShape(),
2518 kernelTensorInfo.GetShape(),
2519 outputTensorInfo.GetShape(),
2533 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T = armnn::ResolveType<ArmnnType>>
2538 const std::vector<float>& inputNoQuantizedValues,
2540 const std::vector<float>& kernelNoQuantizedValues,
2542 const std::vector<float>& outputExpectedNoQuantizedValues,
2547 bool biasEnabled =
false)
2582 auto input = QuantizedVector<T>(inputNoQuantizedValues,
2585 auto kernel = QuantizedVector<T>(kernelNoQuantizedValues,
2588 auto expectedOutput = QuantizedVector<T>(outputExpectedNoQuantizedValues,
2592 uint32_t padLeft = 0;
2593 uint32_t padTop = 0;
2594 uint32_t padRight = 0;
2595 uint32_t padBottom = 0;
2596 uint32_t strideX = 1;
2597 uint32_t strideY = 1;
2599 return DepthwiseConvolution2dTestImpl<ArmnnType, ArmnnBType>(
2602 tensorHandleFactory,
2605 GetBias<ArmnnBType>(biasEnabled, qScale * qScale, outputTensorInfo, layout),
2609 outputTensorInfo.GetShape(),
2623 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
2632 std::vector<float> inputNoQuantizedValues =
2634 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2635 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2636 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2637 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2638 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2639 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2640 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2641 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2642 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2643 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
2647 std::vector<float> kernelNoQuantizedValues =
2657 std::vector<float> outputExpectedNoQuantizedValues =
2665 return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2668 tensorHandleFactory,
2669 inputNoQuantizedValues,
2671 kernelNoQuantizedValues,
2673 outputExpectedNoQuantizedValues,
2681 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
2690 std::vector<float> inputNoQuantizedValues =
2692 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2693 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2694 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2695 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2696 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2697 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2698 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2699 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2700 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2701 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2703 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2704 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2705 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2706 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2707 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2708 0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2709 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2710 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2711 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2712 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
2716 std::vector<float> kernelNoQuantizedValues =
2730 std::vector<float> outputExpectedNoQuantizedValues =
2732 2, 9, 9, 9, 2, 9, 9, 9, 2, 9, 9, 9, 5, 3, 3, 3, 3,
2734 1, 1, 1, 3, 1, 1, 1, 3, 1, 1, 1, 6, 4, 4, 4
2737 return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2740 tensorHandleFactory,
2741 inputNoQuantizedValues,
2743 kernelNoQuantizedValues,
2745 outputExpectedNoQuantizedValues,
2753 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
2762 std::vector<float> inputNoQuantizedValues =
2775 std::vector<float> kernelNoQuantizedValues =
2803 std::vector<float> outputExpectedNoQuantizedValues =
2805 4.5f, 4.5f, 4.5f, 4.5f, 5.5f, 5.5f, 5.5f, 5.5f,
2806 2.5f, 2.5f, 2.5f, 2.5f, 3.5f, 3.5f, 3.5f, 3.5f,
2807 10.05f, 10.5f, 11.4f, 11.85f, 12.75f, 13.3f, 14.4f, 14.95f,
2808 5.25f, 5.5f, 6.0f, 6.25f, 7.45f, 7.8f, 8.5f, 8.85f
2812 return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2815 tensorHandleFactory,
2816 inputNoQuantizedValues,
2818 kernelNoQuantizedValues,
2820 outputExpectedNoQuantizedValues,
2828 template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType,
typename T>
2837 std::vector<float> inputNoQuantizedValues =
2850 std::vector<float> kernelNoQuantizedValues =
2867 std::vector<float> outputExpectedNoQuantizedValues =
2869 4.5f, 4.5f, 4.5f, 4.5f,
2870 5.5f, 5.5f, 5.5f, 5.5f,
2871 5.25f, 5.5f, 6.0f, 6.25f,
2872 7.65f, 8.0f, 8.7f, 9.05f
2876 return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2879 tensorHandleFactory,
2880 inputNoQuantizedValues,
2882 kernelNoQuantizedValues,
2884 outputExpectedNoQuantizedValues,
2892 template<armnn::DataType ArmnnType,
typename T = armnn::ResolveType<ArmnnType>>
2901 unsigned int inputHeight = 8;
2902 unsigned int inputWidth = 16;
2903 unsigned int inputChannels = 3;
2904 unsigned int inputNum = 5;
2906 unsigned int kernelHeight = 3;
2907 unsigned int kernelWidth = 3;
2908 unsigned int channelMultiplier = 1;
2910 unsigned int strideX = 2;
2911 unsigned int strideY = 3;
2912 unsigned int padX = 1;
2913 unsigned int padY = 1;
2915 unsigned int outputNum = inputNum;
2916 unsigned int outputChannels = inputChannels * channelMultiplier;
2917 unsigned int outputHeight = (inputHeight + 2 * padY - kernelHeight + strideY) / strideY;
2918 unsigned int outputWidth = (inputWidth + 2 * padX - kernelWidth + strideX) / strideX;
2925 std::vector<unsigned int> inputShape;
2926 std::vector<unsigned int> outputShape;
2927 std::vector<unsigned int> kernelShape{ 1, kernelHeight, kernelWidth, outputChannels };
2928 std::vector<unsigned int> biasShape{ outputChannels };
2932 inputShape = { inputNum, inputChannels, inputHeight, inputWidth };
2933 outputShape = { outputNum, outputChannels, outputHeight, outputWidth };
2936 inputShape = { inputNum, inputHeight, inputWidth, inputChannels };
2937 outputShape = { outputNum, outputHeight, outputWidth, outputChannels };
2941 + std::to_string(static_cast<int>(layout.
GetDataLayout())) +
"]");
2944 float inputsQScale = armnn::IsQuantizedType<T>() ? 1.0f : 0;
2945 float outputQScale = armnn::IsQuantizedType<T>() ? 2.0f : 0;
2946 int32_t qOffset = 0;
2948 inputTensorInfo =
armnn::TensorInfo(4, inputShape.data(), ArmnnType, inputsQScale, qOffset);
2949 outputTensorInfo =
armnn::TensorInfo(4, outputShape.data(), ArmnnType, outputQScale, qOffset);
2950 kernelDesc =
armnn::TensorInfo(4, kernelShape.data(), ArmnnType, inputsQScale, qOffset);
2953 auto input = MakeRandomTensor<T>(inputTensorInfo, 124908, 0.0f, 255.0f);
2954 auto kernel = MakeRandomTensor<T>(kernelDesc, 891234, 0.0f, 255.0f);
2955 auto bias = MakeRandomTensor<typename FullyConnectedBiasTypeForInputType<T>::Type>(biasDesc, 1028, 0.0f, 255.0f);
2958 std::vector<T> expectedOutput(outputTensorInfo.
GetNumElements());
2960 std::unique_ptr<armnn::ITensorHandle> inputHandle = tensorHandleFactory.
CreateTensorHandle(inputTensorInfo);
2961 std::unique_ptr<armnn::ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputTensorInfo);
2971 AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
2972 AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
2974 data.
m_Bias = &biasTensor;
2984 std::unique_ptr<armnn::ITensorHandle> outputHandleRef = refTensorHandleFactory.
CreateTensorHandle(outputTensorInfo);
2985 std::unique_ptr<armnn::ITensorHandle> inputHandleRef = refTensorHandleFactory.
CreateTensorHandle(inputTensorInfo);
2989 SetWorkloadInput(refData, refInfo, 0, inputTensorInfo, inputHandleRef.get());
2990 SetWorkloadOutput(refData, refInfo, 0, outputTensorInfo, outputHandleRef.get());
2995 outputHandleRef->Allocate();
2996 inputHandleRef->Allocate();
2998 inputHandle->Allocate();
2999 outputHandle->Allocate();
3004 ExecuteWorkload(*workload, memoryManager);
3006 workloadRef->PostAllocationConfigure();
3007 workloadRef->Execute();
3014 outputHandle->GetShape(),
3022 Convolution2d3x3Dilation3x3Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
3030 Convolution2d3x3Dilation3x3Test<armnn::DataType::Float32, armnn::DataType::Float32>(
3031 armnn::IWorkloadFactory&,
3032 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3033 const armnn::ITensorHandleFactory&,
3038 Convolution2d3x3Dilation3x3Test<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
3039 armnn::IWorkloadFactory&,
3040 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3041 const armnn::ITensorHandleFactory&,
3046 Convolution2d3x3Dilation3x3Test<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3047 armnn::IWorkloadFactory&,
3048 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3049 const armnn::ITensorHandleFactory&,
3054 Convolution2d3x3Dilation3x3Test<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3055 armnn::IWorkloadFactory&,
3056 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3057 const armnn::ITensorHandleFactory&,
3061 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
3062 Convolution2d2x3x3Dilation3x3Test<armnn::DataType::Float32, armnn::DataType::Float32>(
3063 armnn::IWorkloadFactory&,
3064 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3065 const armnn::ITensorHandleFactory&,
3069 template LayerTestResult<armnn::ResolveType<armnn::DataType::BFloat16>, 4>
3070 Convolution2d2x3x3Dilation3x3Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
3071 armnn::IWorkloadFactory&,
3072 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3073 const armnn::ITensorHandleFactory&,
3077 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmS8>, 4>
3078 Convolution2d2x3x3Dilation3x3Test<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
3079 armnn::IWorkloadFactory&,
3080 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3081 const armnn::ITensorHandleFactory&,
3085 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmU8>, 4>
3086 Convolution2d2x3x3Dilation3x3Test<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3087 armnn::IWorkloadFactory&,
3088 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3089 const armnn::ITensorHandleFactory&,
3093 template LayerTestResult<armnn::ResolveType<armnn::DataType::QSymmS16>, 4>
3094 Convolution2d2x3x3Dilation3x3Test<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3095 armnn::IWorkloadFactory&,
3096 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3097 const armnn::ITensorHandleFactory&,
3101 template LayerTestResult<armnn::ResolveType<armnn::DataType::BFloat16>, 4>
3102 Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
3103 armnn::IWorkloadFactory &workloadFactory,
3104 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
3105 const armnn::ITensorHandleFactory& tensorHandleFactory,
3109 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
3110 Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test<armnn::DataType::Float32, armnn::DataType::Float32>(
3111 armnn::IWorkloadFactory &workloadFactory,
3112 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
3113 const armnn::ITensorHandleFactory& tensorHandleFactory,
3117 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmS8>, 4>
3118 Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
3119 armnn::IWorkloadFactory &workloadFactory,
3120 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
3121 const armnn::ITensorHandleFactory& tensorHandleFactory,
3125 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmU8>, 4>
3126 Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3127 armnn::IWorkloadFactory &workloadFactory,
3128 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
3129 const armnn::ITensorHandleFactory& tensorHandleFactory,
3133 template LayerTestResult<armnn::ResolveType<armnn::DataType::QSymmS16>, 4>
3134 Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3135 armnn::IWorkloadFactory &workloadFactory,
3136 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
3137 const armnn::ITensorHandleFactory& tensorHandleFactory,
3141 template LayerTestResult<armnn::ResolveType<armnn::DataType::BFloat16>, 4>
3142 DepthwiseConvolution2d3x3Dilation3x3Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
3143 armnn::IWorkloadFactory&,
3144 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3145 const armnn::ITensorHandleFactory&,
3149 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
3150 DepthwiseConvolution2d3x3Dilation3x3Test<armnn::DataType::Float32, armnn::DataType::Float32>(
3151 armnn::IWorkloadFactory&,
3152 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3153 const armnn::ITensorHandleFactory&,
3157 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmS8>, 4>
3158 DepthwiseConvolution2d3x3Dilation3x3Test<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
3159 armnn::IWorkloadFactory&,
3160 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3161 const armnn::ITensorHandleFactory&,
3165 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmU8>, 4>
3166 DepthwiseConvolution2d3x3Dilation3x3Test<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3167 armnn::IWorkloadFactory&,
3168 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3169 const armnn::ITensorHandleFactory&,
3173 template LayerTestResult<armnn::ResolveType<armnn::DataType::QSymmS16>, 4>
3174 DepthwiseConvolution2d3x3Dilation3x3Test<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3175 armnn::IWorkloadFactory&,
3176 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3177 const armnn::ITensorHandleFactory&,
3181 template LayerTestResult<armnn::ResolveType<armnn::DataType::BFloat16>, 4>
3182 DepthwiseConvolution2d2x3x3Dilation3x3Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
3183 armnn::IWorkloadFactory&,
3184 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3185 const armnn::ITensorHandleFactory&,
3189 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
3190 DepthwiseConvolution2d2x3x3Dilation3x3Test<armnn::DataType::Float32, armnn::DataType::Float32>(
3191 armnn::IWorkloadFactory&,
3192 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3193 const armnn::ITensorHandleFactory&,
3197 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmS8>, 4>
3198 DepthwiseConvolution2d2x3x3Dilation3x3Test<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
3199 armnn::IWorkloadFactory&,
3200 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3201 const armnn::ITensorHandleFactory&,
3205 template LayerTestResult<armnn::ResolveType<armnn::DataType::QAsymmU8>, 4>
3206 DepthwiseConvolution2d2x3x3Dilation3x3Test<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3207 armnn::IWorkloadFactory&,
3208 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3209 const armnn::ITensorHandleFactory&,
3213 template LayerTestResult<armnn::ResolveType<armnn::DataType::QSymmS16>, 4>
3214 DepthwiseConvolution2d2x3x3Dilation3x3Test<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3215 armnn::IWorkloadFactory&,
3216 const armnn::IBackendInternal::IMemoryManagerSharedPtr&,
3217 const armnn::ITensorHandleFactory&,
3221 template LayerTestResult<armnn::ResolveType<armnn::DataType::BFloat16>, 4>
3222 DepthwiseConvolution2dMult4Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
3223 armnn::IWorkloadFactory &workloadFactory,
3224 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
3225 const armnn::ITensorHandleFactory& tensorHandleFactory,
3229 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
3230 DepthwiseConvolution2dMult4Test<armnn::DataType::Float32, armnn::DataType::Float32>(
3231 armnn::IWorkloadFactory &workloadFactory,
3232 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
3233 const armnn::ITensorHandleFactory& tensorHandleFactory,
3237 template LayerTestResult<armnn::ResolveType<armnn::DataType::BFloat16>, 4>
3238 DepthwiseConvolution2dMult2Test<armnn::DataType::BFloat16, armnn::DataType::BFloat16>(
3239 armnn::IWorkloadFactory &workloadFactory,
3240 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
3241 const armnn::ITensorHandleFactory& tensorHandleFactory,
3245 template LayerTestResult<armnn::ResolveType<armnn::DataType::Float32>, 4>
3246 DepthwiseConvolution2dMult2Test<armnn::DataType::Float32, armnn::DataType::Float32>(
3247 armnn::IWorkloadFactory &workloadFactory,
3248 const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager,
3249 const armnn::ITensorHandleFactory& tensorHandleFactory,
3258 armnn::IWorkloadFactory& workloadFactory,
3259 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3260 const armnn::ITensorHandleFactory& tensorHandleFactory,
3264 return SimpleConvolution2d3x5TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3265 workloadFactory, memoryManager, tensorHandleFactory, 0.f, 0, biasEnabled, layout);
3269 armnn::IWorkloadFactory& workloadFactory,
3270 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3271 const armnn::ITensorHandleFactory& tensorHandleFactory,
3275 return SimpleConvolution2d3x5TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3276 workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3280 armnn::IWorkloadFactory& workloadFactory,
3281 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3282 const armnn::ITensorHandleFactory& tensorHandleFactory,
3286 return SimpleConvolution2d3x3TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3287 workloadFactory, memoryManager, tensorHandleFactory, 0.f, 0, biasEnabled, layout);
3291 armnn::IWorkloadFactory& workloadFactory,
3292 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3293 const armnn::ITensorHandleFactory& tensorHandleFactory,
3296 return SimpleConvolution2d3x3NhwcTestCommon<armnn::DataType::Float32>(
3299 tensorHandleFactory,
3307 armnn::IWorkloadFactory& workloadFactory,
3308 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3309 const armnn::ITensorHandleFactory& tensorHandleFactory,
3313 return SimpleConvolution2d3x3Stride2x2TestCommon<armnn::DataType::Float32>(
3316 tensorHandleFactory,
3324 armnn::IWorkloadFactory& workloadFactory,
3325 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3326 const armnn::ITensorHandleFactory& tensorHandleFactory,
3330 return SimpleConvolution2d3x3TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3331 workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3335 armnn::IWorkloadFactory& workloadFactory,
3336 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3337 const armnn::ITensorHandleFactory& tensorHandleFactory,
3341 return SimpleConvolution2d3x5TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3342 workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3346 armnn::IWorkloadFactory& workloadFactory,
3347 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3348 const armnn::ITensorHandleFactory& tensorHandleFactory,
3352 return SimpleConvolution2d3x3TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3353 workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3357 armnn::IWorkloadFactory& workloadFactory,
3358 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3359 const armnn::ITensorHandleFactory& tensorHandleFactory,
3362 return SimpleConvolution2dAsymmetricPaddingTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3363 workloadFactory, memoryManager, tensorHandleFactory, layout, 0.0f, 0);
3367 armnn::IWorkloadFactory& workloadFactory,
3368 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3369 const armnn::ITensorHandleFactory& tensorHandleFactory,
3374 workloadFactory, memoryManager, tensorHandleFactory, layout, 0.0f, 0);
3378 armnn::IWorkloadFactory& workloadFactory,
3379 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3380 const armnn::ITensorHandleFactory& tensorHandleFactory,
3383 return Convolution1dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3384 workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled);
3388 armnn::IWorkloadFactory& workloadFactory,
3389 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3390 const armnn::ITensorHandleFactory& tensorHandleFactory,
3393 return Convolution1dTestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3394 workloadFactory, memoryManager, tensorHandleFactory, 0.1f, 128, biasEnabled);
3398 armnn::IWorkloadFactory& workloadFactory,
3399 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3400 const armnn::ITensorHandleFactory& tensorHandleFactory,
3403 using namespace armnn;
3405 const DataType inputType = DataType::QAsymmU8;
3406 const DataType kernelType = DataType::QSymmS8;
3407 const DataType biasType = DataType::Signed32;
3409 TensorInfo inputInfo ({ 1, 3, 1, 2 }, inputType, 0.5f, 128);
3410 TensorInfo outputInfo({ 1, 3, 1, 3 }, inputType, 1.0f, 128);
3412 const std::vector<float> quantScales{ 0.5f, 0.75f, 1.0f };
3413 constexpr
unsigned int quantDimension = 0;
3415 TensorInfo kernelInfo({ 3, 1, 1, 2 }, kernelType, quantScales, quantDimension);
3417 const std::vector<float> biasQuantScales{ 0.25f, 0.375f, 0.5f };
3418 TensorInfo biasInfo({ 3 }, biasType, biasQuantScales, quantDimension);
3420 std::vector<uint8_t> inputData =
3422 138, 108, 138, 108, 138, 108
3425 std::vector<int8_t> kernelData =
3430 std::vector<int32_t> biasData =
3435 std::vector<uint8_t> expectedOutputData =
3437 121, 118, 115, 121, 118, 115, 121, 118, 115
3447 std::vector<uint8_t> actualOutput(outputInfo.GetNumElements());
3451 descriptor.m_StrideY = 1;
3452 descriptor.m_PadLeft = 0;
3453 descriptor.m_PadRight = 0;
3454 descriptor.m_PadTop = 0;
3455 descriptor.m_PadBottom = 0;
3456 descriptor.m_BiasEnabled =
true;
3457 descriptor.m_DataLayout = layout;
3459 std::unique_ptr<ITensorHandle> inputHandle = tensorHandleFactory.
CreateTensorHandle(inputInfo);
3460 std::unique_ptr<ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputInfo);
3471 queueDescriptor.m_Weight = &weightTensor;
3472 queueDescriptor.m_Bias = &biasTensor;
3474 AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
3475 AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
3477 std::unique_ptr<IWorkload> workload = workloadFactory.
CreateConvolution2d(queueDescriptor, workloadInfo);
3478 inputHandle->Allocate();
3479 outputHandle->Allocate();
3483 ExecuteWorkload(*workload, memoryManager);
3489 outputHandle->GetShape(),
3490 outputInfo.GetShape());
3494 armnn::IWorkloadFactory& workloadFactory,
3495 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3496 armnn::IWorkloadFactory& refWorkloadFactory,
3497 const armnn::ITensorHandleFactory& tensorHandleFactory,
3498 const armnn::ITensorHandleFactory& refTensorHandleFactory)
3500 return CompareConvolution2dTestImpl<armnn::DataType::Float32>(
3501 workloadFactory, memoryManager, refWorkloadFactory, tensorHandleFactory, refTensorHandleFactory);
3505 armnn::IWorkloadFactory& workloadFactory,
3506 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3507 const armnn::ITensorHandleFactory& tensorHandleFactory,
3511 return DepthwiseConvolution2dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3512 workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled, layout);
3516 armnn::IWorkloadFactory& workloadFactory,
3517 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3518 const armnn::ITensorHandleFactory& tensorHandleFactory,
3521 return DepthwiseConvolution2dNhwcTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3522 workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled);
3526 armnn::IWorkloadFactory& workloadFactory,
3527 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3528 const armnn::ITensorHandleFactory& tensorHandleFactory,
3532 return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3533 workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled, layout);
3537 armnn::IWorkloadFactory& workloadFactory,
3538 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3539 const armnn::ITensorHandleFactory& tensorHandleFactory)
3542 std::vector<float> input = { 1.f, 2.f, 3.f, 4.f };
3544 std::vector<float> kernelData;
3545 std::vector<float> singleDepthKernel{ 1.f, -1.f, -1.f, 1.f };
3546 for (
unsigned int i = 0; i < 64; ++i)
3548 kernelData.insert(kernelData.end(), singleDepthKernel.begin(), singleDepthKernel.end());
3555 std::vector<float> kernelPermuted(kernelTensorInfo.GetNumElements());
3557 kernelData.data(), kernelPermuted.data(),
3560 std::vector<float> expectedOutputData(64, 0.f);
3563 return DepthwiseConvolution2dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3566 tensorHandleFactory,
3569 std::vector<float>(),
3571 inputTensorInfo.GetShape(),
3572 kernelTensorInfo.GetShape(),
3573 outputTensorInfo.GetShape(),
3580 armnn::IWorkloadFactory& workloadFactory,
3581 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3582 const armnn::ITensorHandleFactory& tensorHandleFactory,
3586 return DepthwiseConvolution2dAsymmetricTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3587 workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled, layout);
3591 armnn::IWorkloadFactory& workloadFactory,
3592 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3593 const armnn::ITensorHandleFactory& tensorHandleFactory,
3597 return DepthwiseConvolution2dTestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3598 workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3602 armnn::IWorkloadFactory& workloadFactory,
3603 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3604 const armnn::ITensorHandleFactory& tensorHandleFactory,
3608 return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3609 workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3613 armnn::IWorkloadFactory& workloadFactory,
3614 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3615 const armnn::ITensorHandleFactory& tensorHandleFactory)
3617 return SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3620 tensorHandleFactory,
3627 armnn::IWorkloadFactory& workloadFactory,
3628 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3629 const armnn::ITensorHandleFactory& tensorHandleFactory,
3633 return DepthwiseConvolution2dTestImpl<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3634 workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3638 armnn::IWorkloadFactory& workloadFactory,
3639 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3640 const armnn::ITensorHandleFactory& tensorHandleFactory,
3644 return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3645 workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3649 armnn::IWorkloadFactory& workloadFactory,
3650 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3651 const armnn::ITensorHandleFactory& tensorHandleFactory,
3654 using namespace armnn;
3656 const DataType inputType = DataType::QAsymmU8;
3657 const DataType kernelType = DataType::QSymmS8;
3658 const DataType biasType = DataType::Signed32;
3660 TensorInfo inputInfo ({ 1, 3, 3, 2 }, inputType, 0.5f, 128);
3661 TensorInfo outputInfo({ 1, 2, 2, 4 }, inputType, 1.0f, 128);
3663 const std::vector<float> quantScales{ 1.0f, 0.5f, 1.0f, 0.5f };
3664 const unsigned int quantDimension = 3;
3665 TensorInfo kernelInfo({ 1, 2, 2, 4 }, kernelType, quantScales, quantDimension);
3667 const std::vector<float> biasQuantScales{ 0.5f, 0.25f, 0.5f, 0.25f };
3668 constexpr
unsigned int biasQuantDimension = 0;
3669 TensorInfo biasInfo({ 4 }, biasType, biasQuantScales, biasQuantDimension);
3671 std::vector<uint8_t> inputData =
3684 std::vector<int8_t> kernelData =
3692 std::vector<int32_t> biasData =
3697 std::vector<uint8_t> expectedOutputData =
3711 std::vector<uint8_t> actualOutput(outputInfo.GetNumElements());
3715 descriptor.m_StrideY = 1;
3716 descriptor.m_PadLeft = 0;
3717 descriptor.m_PadRight = 0;
3718 descriptor.m_PadTop = 0;
3719 descriptor.m_PadBottom = 0;
3720 descriptor.m_DilationX = 1;
3721 descriptor.m_DilationY = 1;
3722 descriptor.m_BiasEnabled =
true;
3723 descriptor.m_DataLayout = layout;
3725 std::unique_ptr<ITensorHandle> inputHandle = tensorHandleFactory.
CreateTensorHandle(inputInfo);
3726 std::unique_ptr<ITensorHandle> outputHandle = tensorHandleFactory.
CreateTensorHandle(outputInfo);
3737 queueDescriptor.m_Weight = &weightTensor;
3738 queueDescriptor.m_Bias = &biasTensor;
3740 AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
3741 AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
3744 inputHandle->Allocate();
3745 outputHandle->Allocate();
3749 ExecuteWorkload(*workload, memoryManager);
3757 outputHandle->GetShape(),
3758 outputInfo.GetShape());
3762 armnn::IWorkloadFactory& workloadFactory,
3763 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3764 armnn::IWorkloadFactory& refWorkloadFactory,
3765 const armnn::ITensorHandleFactory& tensorHandleFactory,
3766 const armnn::ITensorHandleFactory& refTensorHandleFactory,
3769 return CompareDepthwiseConvolution2dTestImpl<armnn::DataType::Float32>(
3770 workloadFactory, memoryManager, refWorkloadFactory, tensorHandleFactory, refTensorHandleFactory, layout);
3774 armnn::IWorkloadFactory& workloadFactory,
3775 const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
3776 armnn::IWorkloadFactory& refWorkloadFactory,
3777 const armnn::ITensorHandleFactory& tensorHandleFactory,
3778 const armnn::ITensorHandleFactory& refTensorHandleFactory,
3781 return CompareDepthwiseConvolution2dTestImpl<armnn::DataType::QAsymmU8>(
3782 workloadFactory, memoryManager, refWorkloadFactory, tensorHandleFactory, refTensorHandleFactory, layout);
LayerTestResult< T, 4 > DepthwiseConvolution2dMult2Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< float, 4 > Convolution2d3x3Stride2x2BFloat16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout &dataLayout)
uint32_t m_PadBottom
Padding bottom value in the height dimension.
bool m_BiasEnabled
Enable/disable bias.
LayerTestResult< O, 4 > SimpleConvolution2dNhwcTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const std::vector< T > &input, const std::vector< T > &kernel, const std::vector< B > &bias, const std::vector< O > &outputExpected, const armnn::TensorShape &inputShape, const armnn::TensorShape &kernelShape, const armnn::TensorShape &outputExpectedShape, const armnn::DataLayout dataLayout, float qScale, int32_t qOffset, uint32_t padLeft=1, uint32_t padTop=1, uint32_t padRight=1, uint32_t padBottom=1, uint32_t strideX=1, uint32_t strideY=1)
std::vector< T > GetBias(bool biasEnabled, float qScale, armnn::TensorInfo outputInfo, armnn::DataLayout layout)
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dUint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
bool m_BiasEnabled
Enable/disable bias.
LayerTestResult< int16_t, 4 > SimpleConvolution2d3x5QSymm16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< T, 4 > SimpleConvolution2d3x3Stride2x2TestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout &dataLayout)
LayerTestResult< T, 4 > Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout, float qScale, int32_t qOffset)
const TensorShape & GetShape() const
uint32_t m_PadBottom
Padding bottom value in the height dimension.
LayerTestResult< float, 4 > Convolution2d3x3Stride2x2BFloat16SmallValueTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout &dataLayout)
void ApplyBias(std::vector< T > &v, float vScale, int32_t vOffset, const std::vector< B > &bias, float bScale, int32_t bOffset, uint32_t w, uint32_t h)
std::vector< T > GetBias8(bool biasEnabled, float qScale)
LayerTestResult< T, 4 > Convolution2d2x3x3Dilation3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
LayerTestResult< uint8_t, 4 > SimpleConvolution2d3x5Uint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
A Convolution2dDescriptor for the Convolution2dLayer.
uint32_t m_PadLeft
Padding left value in the width dimension.
LayerTestResult< T, 4 > CompareConvolution2dTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory)
LayerTestResult< T, 4 > Convolution2d3x3DilationTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const std::vector< float > &inputNoQuantizedValues, armnn::TensorInfo &inputTensorInfo, const std::vector< float > &kernelNoQuantizedValues, armnn::TensorInfo &kernelTensorInfo, const std::vector< float > &outputExpectedNoQuantizedValues, armnn::TensorInfo &outputTensorInfo, uint32_t dilationX, uint32_t dilationY, armnn::DataLayout layout=armnn::DataLayout::NCHW, uint32_t padLeft=0, uint32_t padTop=0, uint32_t padRight=0, uint32_t padBottom=0, uint32_t strideX=1, uint32_t strideY=1, bool biasEnabled=false)
LayerTestResult< float, 4 > SimpleConvolution2d3x3NhwcTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
LayerTestResult< T, 4 > DepthwiseConvolution2dDepthMul1TestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout layout)
const ConstTensorHandle * m_Weight
typename ResolveTypeImpl< DT >::Type ResolveType
const ConstTensorHandle * m_Bias
LayerTestResult< T, 4 > SimpleConvolution2d3x3NhwcTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, float qScale, int32_t qOffset, bool biasEnabled, armnn::DataLayout dataLayout)
LayerTestResult< T, 4 > DepthwiseConvolution2dTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout layout)
uint32_t m_PadRight
Padding right value in the width dimension.
LayerTestResult< uint8_t, 4 > Convolution1dUint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
LayerTestResult< T, 4 > SimpleConvolution2dAsymmetricPaddingTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout, float qScale, int32_t qOffset)
Copyright (c) 2021 ARM Limited and Contributors.
void IgnoreUnused(Ts &&...)
LayerTestResult< T, 4 > DepthwiseConvolution2dAsymmetricTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const std::vector< T > &input, const std::vector< T > &kernel, const std::vector< B > &bias, const std::vector< T > &outputExpected, const armnn::TensorShape &inputShape, const armnn::TensorShape &kernelShape, const armnn::TensorShape &outputExpectedShape, float qScale, int32_t qOffset, const armnn::DataLayout layout, uint32_t padLeft=0, uint32_t padTop=0, uint32_t padRight=0, uint32_t padBottom=0, uint32_t strideX=1, uint32_t strideY=1)
LayerTestResult< float, 4 > Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, armnn::DataLayout layout)
uint32_t m_DilationY
Dilation along y axis.
LayerDescriptor m_Parameters
uint32_t m_DilationY
Dilation factor value for height dimension.
LayerTestResult< T, 4 > DepthwiseConvolution2dMult4Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthMul64Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory)
LayerTestResult< int16_t, 4 > SimpleConvolution2d3x3QSymm16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
uint32_t m_PadTop
Padding top value in the height dimension.
void Permute(const armnn::TensorShape &dstShape, const armnn::PermutationVector &mappings, const void *src, void *dst, size_t dataTypeSize)
LayerTestResult< T, 4 > DepthwiseConvolution2dAsymmetricTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout layout)
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
LayerTestResult< T, 4 > DepthwiseConvolution2d3x3Dilation3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dDepthMul1Uint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
uint32_t m_DilationX
Dilation factor value for width dimension.
uint32_t m_PadTop
Padding top value in the height dimension.
#define ARMNN_ASSERT_MSG(COND, MSG)
std::shared_ptr< IMemoryManager > IMemoryManagerSharedPtr
int32_t GetQuantizationOffset() const
LayerTestResult< T, 4 > DepthwiseConvolution2d3x3DilationTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const std::vector< float > &inputNoQuantizedValues, armnn::TensorInfo &inputTensorInfo, const std::vector< float > &kernelNoQuantizedValues, armnn::TensorInfo &kernelTensorInfo, const std::vector< float > &outputExpectedNoQuantizedValues, armnn::TensorInfo &outputTensorInfo, uint32_t dilationX, uint32_t dilationY, armnn::DataLayout layout=armnn::DataLayout::NCHW, bool biasEnabled=false)
float GetQuantizationScale() const
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...
LayerTestResult< T, 4 > DepthwiseConvolution2d2x3x3Dilation3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< T, 4 > SimpleConvolution2dTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const std::vector< T > &originalInput, const std::vector< T > &originalKernel, const std::vector< B > &bias, const std::vector< T > &originalOutputExpected, const armnn::TensorShape &originalInputShape, const armnn::TensorShape &originalKernelShape, const armnn::TensorShape &originalOutputExpectedShape, float qScale, int32_t qOffset, const armnn::DataLayout layout=armnn::DataLayout::NCHW, uint32_t padLeft=0, uint32_t padTop=0, uint32_t padRight=0, uint32_t padBottom=0, uint32_t strideX=1, uint32_t strideY=1, uint32_t dilationX=1, uint32_t dilationY=1)
const ConstTensorHandle * m_Bias
LayerTestResult< float, 4 > SimpleConvolution2d3x5Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
void SetQuantizationScale(float scale)
#define ARMNN_ASSERT(COND)
void AllocateAndCopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
armnn::DataLayout GetDataLayout() const
void CopyDataFromITensorHandle(void *memory, const armnn::ITensorHandle *tensorHandle)
LayerTestResult< T, 4 > CompareDepthwiseConvolution2dTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory, const armnnUtils::DataLayoutIndexed &layout)
const ConstTensorHandle * m_Weight
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthMul1Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
DataType GetBiasDataType(DataType inputDataType)
LayerTestResult< uint8_t, 4 > SimpleConvolution2d3x3Uint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< float, 4 > Convolution2dAsymmetricPaddingTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, armnn::DataLayout layout)
LayerTestResult< float, 4 > SimpleConvolution2d3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< T, 4 > Convolution2d3x3Dilation3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
uint32_t m_DilationX
Dilation along x axis.
LayerTestResult< float, 4 > Convolution1dTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
LayerTestResult< T, 4 > SimpleConvolution2d3x5TestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout layout)
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dPerAxisQuantTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
LayerTestResult< T, 4 > DepthwiseConvolution2dNhwcTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, float qScale, int32_t qOffset, bool biasEnabled)
LayerTestResult< T, 4 > Convolution1dTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, float qScale, int32_t qOffset, bool biasEnabled)
LayerTestResult< int16_t, 4 > DepthwiseConvolution2dDepthMul1Int16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
armnn::TensorInfo GetTensorInfo(unsigned int numberOfBatches, unsigned int numberOfChannels, unsigned int height, unsigned int width, const armnn::DataLayout dataLayout, const armnn::DataType dataType)
LayerTestResult< float, 4 > DepthwiseConvolution2dAsymmetricTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthNhwcTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
Contains information about TensorInfos of a layer.
LayerTestResult< float, 4 > CompareDepthwiseConvolution2dFloatTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory, const armnn::DataLayout layout)
float SelectiveDequantize(T value, float scale, int32_t offset)
LayerTestResult< float, 4 > SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory)
void SetQuantizationOffset(int32_t offset)
LayerTestResult< uint8_t, 4 > Convolution2dPerAxisQuantTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
LayerTestResult< float, 4 > CompareConvolution2dTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory)
LayerTestResult< T, 4 > SimpleConvolution2d3x3TestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, float qScale, int32_t qOffset, bool biasEnabled, const armnn::DataLayout layout)
virtual std::unique_ptr< IWorkload > CreateDepthwiseConvolution2d(const DepthwiseConvolution2dQueueDescriptor &descriptor, const WorkloadInfo &info) const
LayerTestResult< T, 4 > SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, float qScale, int32_t qOffset, bool biasEnabled)
LayerTestResult< int16_t, 4 > DepthwiseConvolution2dInt16Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
std::vector< T > GetBias4(bool biasEnabled, float qScale)
unsigned int GetChannelsIndex() const
LayerTestResult< uint8_t, 4 > CompareDepthwiseConvolution2dUint8Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory, const armnn::DataLayout layout)
armnn::TensorShape Permuted(const armnn::TensorShape &srcShape, const armnn::PermutationVector &mappings)
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo) const =0
LayerTestResult< float, 4 > DepthwiseConvolution2dTest(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
A DepthwiseConvolution2dDescriptor for the DepthwiseConvolution2dLayer.
Depthwise Convolution 2D layer workload data.
uint32_t m_PadLeft
Padding left value in the width dimension.
unsigned int GetNumElements() const
LayerTestResult< float, 4 > SimpleConvolution2d3x3Stride2x2Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
virtual std::unique_ptr< IWorkload > CreateConvolution2d(const Convolution2dQueueDescriptor &descriptor, const WorkloadInfo &info) const
constexpr unsigned int GetDataTypeSize(DataType dataType)
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
LayerTestResult< T, 4 > Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
uint32_t m_PadRight
Padding right value in the width dimension.
std::vector< T > GetBias2(bool biasEnabled, float qScale)
void PermuteTensorNhwcToNchw(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)