CMSIS-DSP  Version 1.9.0
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Complex Matrix Multiplication

Functions

arm_status arm_mat_cmplx_mult_f16 (const arm_matrix_instance_f16 *pSrcA, const arm_matrix_instance_f16 *pSrcB, arm_matrix_instance_f16 *pDst)
 Floating-point Complex matrix multiplication. More...
 
arm_status arm_mat_cmplx_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
 Floating-point Complex matrix multiplication. More...
 
arm_status arm_mat_cmplx_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pScratch)
 Q15 Complex matrix multiplication. More...
 
arm_status arm_mat_cmplx_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
 Q31 Complex matrix multiplication. More...
 

Description

Complex Matrix multiplication is only defined if the number of columns of the first matrix equals the number of rows of the second matrix. Multiplying an M x N matrix with an N x P matrix results in an M x P matrix.

When matrix size checking is enabled, the functions check:
  • that the inner dimensions of pSrcA and pSrcB are equal;
  • that the size of the output matrix equals the outer dimensions of pSrcA and pSrcB.

Function Documentation

arm_status arm_mat_cmplx_mult_f16 ( const arm_matrix_instance_f16 pSrcA,
const arm_matrix_instance_f16 pSrcB,
arm_matrix_instance_f16 pDst 
)

Floating-point, complex, matrix multiplication.

Parameters
[in]pSrcApoints to first input complex matrix structure
[in]pSrcBpoints to second input complex matrix structure
[out]pDstpoints to output complex matrix structure
Returns
execution status
arm_status arm_mat_cmplx_mult_f32 ( const arm_matrix_instance_f32 pSrcA,
const arm_matrix_instance_f32 pSrcB,
arm_matrix_instance_f32 pDst 
)

Floating-point, complex, matrix multiplication.

Parameters
[in]pSrcApoints to first input complex matrix structure
[in]pSrcBpoints to second input complex matrix structure
[out]pDstpoints to output complex matrix structure
Returns
execution status
arm_status arm_mat_cmplx_mult_q15 ( const arm_matrix_instance_q15 pSrcA,
const arm_matrix_instance_q15 pSrcB,
arm_matrix_instance_q15 pDst,
q15_t pScratch 
)

Q15, complex, matrix multiplication.

Parameters
[in]pSrcApoints to first input complex matrix structure
[in]pSrcBpoints to second input complex matrix structure
[out]pDstpoints to output complex matrix structure
[in]pScratchpoints to an array for storing intermediate results
Returns
execution status
Conditions for optimum performance
Input, output and state buffers should be aligned by 32-bit
Scaling and Overflow Behavior
The function is implemented using an internal 64-bit accumulator. The inputs to the multiplications are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
arm_status arm_mat_cmplx_mult_q31 ( const arm_matrix_instance_q31 pSrcA,
const arm_matrix_instance_q31 pSrcB,
arm_matrix_instance_q31 pDst 
)

Q31, complex, matrix multiplication.

Parameters
[in]pSrcApoints to first input complex matrix structure
[in]pSrcBpoints to second input complex matrix structure
[out]pDstpoints to output complex matrix structure
Returns
execution status
Scaling and Overflow Behavior
The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. The input is thus scaled down by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are performed internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.