CMSIS-Core (Cortex-A)
Version 1.2.1
CMSIS-Core support for Cortex-A processor-based devices
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Bit position and mask macros. More...
Macros | |
#define | ISR_A_Pos 13U |
ISR: A Position. More... | |
#define | ISR_A_Msk (1UL << ISR_A_Pos) |
ISR: A Mask. More... | |
#define | ISR_I_Pos 12U |
ISR: I Position. More... | |
#define | ISR_I_Msk (1UL << ISR_I_Pos) |
ISR: I Mask. More... | |
#define | ISR_F_Pos 11U |
ISR: F Position. More... | |
#define | ISR_F_Msk (1UL << ISR_F_Pos) |
ISR: F Mask. More... | |
#define ISR_A_Msk (1UL << ISR_A_Pos) |
#define ISR_A_Pos 13U |
#define ISR_F_Msk (1UL << ISR_F_Pos) |
#define ISR_F_Pos 11U |
#define ISR_I_Msk (1UL << ISR_I_Pos) |
#define ISR_I_Pos 12U |