CMSIS-Driver  Version 2.8.0
Peripheral Interface for Middleware and Application Code
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NAND Sequence Execution Codes

Specify execution codes. More...

Macros

#define ARM_NAND_CODE_SEND_CMD1   (1UL << 17)
 Send Command 1. More...
 
#define ARM_NAND_CODE_SEND_ADDR_COL1   (1UL << 18)
 Send Column Address 1. More...
 
#define ARM_NAND_CODE_SEND_ADDR_COL2   (1UL << 19)
 Send Column Address 2. More...
 
#define ARM_NAND_CODE_SEND_ADDR_ROW1   (1UL << 20)
 Send Row Address 1. More...
 
#define ARM_NAND_CODE_SEND_ADDR_ROW2   (1UL << 21)
 Send Row Address 2. More...
 
#define ARM_NAND_CODE_SEND_ADDR_ROW3   (1UL << 22)
 Send Row Address 3. More...
 
#define ARM_NAND_CODE_INC_ADDR_ROW   (1UL << 23)
 Auto-increment Row Address. More...
 
#define ARM_NAND_CODE_WRITE_DATA   (1UL << 24)
 Write Data. More...
 
#define ARM_NAND_CODE_SEND_CMD2   (1UL << 25)
 Send Command 2. More...
 
#define ARM_NAND_CODE_WAIT_BUSY   (1UL << 26)
 Wait while R/Bn busy. More...
 
#define ARM_NAND_CODE_READ_DATA   (1UL << 27)
 Read Data. More...
 
#define ARM_NAND_CODE_SEND_CMD3   (1UL << 28)
 Send Command 3. More...
 
#define ARM_NAND_CODE_READ_STATUS   (1UL << 29)
 Read Status byte and check FAIL bit (bit 0) More...
 

Description

Specify execution codes.

The defines can be used in the function ARM_NAND_ExecuteSequence for the parameter code.

Macro Definition Documentation

#define ARM_NAND_CODE_SEND_CMD1   (1UL << 17)

Send Command 1.

#define ARM_NAND_CODE_SEND_ADDR_COL1   (1UL << 18)

Send Column Address 1.

#define ARM_NAND_CODE_SEND_ADDR_COL2   (1UL << 19)

Send Column Address 2.

#define ARM_NAND_CODE_SEND_ADDR_ROW1   (1UL << 20)

Send Row Address 1.

#define ARM_NAND_CODE_SEND_ADDR_ROW2   (1UL << 21)

Send Row Address 2.

#define ARM_NAND_CODE_SEND_ADDR_ROW3   (1UL << 22)

Send Row Address 3.

#define ARM_NAND_CODE_INC_ADDR_ROW   (1UL << 23)

Auto-increment Row Address.

#define ARM_NAND_CODE_WRITE_DATA   (1UL << 24)

Write Data.

#define ARM_NAND_CODE_SEND_CMD2   (1UL << 25)

Send Command 2.

#define ARM_NAND_CODE_WAIT_BUSY   (1UL << 26)

Wait while R/Bn busy.

#define ARM_NAND_CODE_READ_DATA   (1UL << 27)

Read Data.

#define ARM_NAND_CODE_SEND_CMD3   (1UL << 28)

Send Command 3.

#define ARM_NAND_CODE_READ_STATUS   (1UL << 29)

Read Status byte and check FAIL bit (bit 0)