CMSIS-Core (Cortex-M)  Version 5.7.0
CMSIS-Core support for Cortex-M processor-based devices
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Revision History of CMSIS-Core (Cortex-M)
Version Description
V5.7.0
  • Added: Added new compiler macros __ALIAS and __NO_INIT
V5.6.0
  • Added: Arm Cortex-M85 cpu support
  • Added: Arm China Star-MC1 cpu support
  • Updated: system_ARMCM55.c
V5.5.0
  • Updated GCC LinkerDescription, GCC Assembler startup
  • Added ARMv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  • Changed C-Startup to default Startup. Updated Armv8-M Assembler startup to use GAS syntax
    Note: Updating existing projects may need manual user interaction!
V5.4.0
  • Added: Cortex-M55 cpu support
  • Enhanced: MVE support for Armv8.1-MML
  • Fixed: Device config define checks
  • Added: L1 Cache functions for Armv7-M and later
V5.3.0
  • Added: Provisions for compiler-independent C startup code.
V5.2.1
  • Fixed: Compilation issue in cmsis_armclang_ltm.h introduced in 5.2.0
V5.2.0
  • Added: Cortex-M35P support.
  • Added: Cortex-M1 support.
  • Added: Armv8.1 architecture support.
  • Added: __RESTRICT and __STATIC_FORCEINLINE compiler control macros.
V5.1.2
  • Removed using get/set built-ins FPSCR in GCC >= 7.2 due to shortcomings.
  • Added __NO_RETURN to __NVIC_SystemReset() to silence compiler warnings.
  • Added support for Cortex-M1 (beta).
  • Removed usage of register keyword.
  • Added defines for EXC_RETURN, FNC_RETURN and integrity signature values.
  • Enhanced MPUv7 API with defines for memory access attributes.
V5.1.1
  • Aligned MSPLIM and PSPLIM access functions along supported compilers.
V5.1.0
  • Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  • Moved __SSAT and __USAT intrinsics to CMSIS-Core.
  • Aligned __REV, __REV16 and __REVSH intrinsics along supported compilers.
V5.0.2
V5.0.1
V5.00
  • Added: Cortex-M23, Cortex-M33 support.
  • Added: macro __SAU_PRESENT with __SAU_REGION_PRESENT.
  • Replaced: macro __SAU_PRESENT with __SAU_REGION_PRESENT.
  • Reworked: SAU register and functions.
  • Added: macro __ALIGNED.
  • Updated: function SCB_EnableICache.
  • Added: cmsis_compiler.h with compiler specific CMSIS macros, functions, instructions.
  • Added: macro __PACKED.
  • Updated: compiler specific include files.
  • Updated: core dependant include files.
  • Removed: deprecated files core_cmfunc.h, core_cminstr.h, core_cmsimd.h.
V5.00
Beta 6
V5.00
Beta 5
  • Moved: DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  • Added: DSP libraries build projects to CMSIS pack.
V5.00
Beta 4
  • Updated: ARMv8M device files.
  • Corrected: ARMv8MBL interrupts.
  • Reworked: NVIC functions.
V5.00
Beta 2
V5.00
Beta 1
  • Renamed: cmsis_armcc_V6.h to cmsis_armclang.h.
  • Renamed: core_*.h to lower case.
  • Added: function SCB_GetFPUType to all CMSIS cores.
  • Added: ARMv8-M support.
V4.30
  • Corrected: DoxyGen function parameter comments.
  • Corrected: IAR toolchain: removed for NVIC_SystemReset the attribute(noreturn).
  • Corrected: GCC toolchain: suppressed irrelevant compiler warnings.
  • Added: Support files for Arm Compiler v6 (cmsis_armcc_v6.h).
V4.20
  • Corrected: MISRA-C:2004 violations.
  • Corrected: predefined macro for TI CCS Compiler.
  • Corrected: function __SHADD16 in arm_math.h.
  • Updated: cache functions for Cortex-M7.
  • Added: macros _VAL2FLD, _FLD2VAL to core_*.h.
  • Updated: functions __QASX, __QSAX, __SHASX, __SHSAX.
  • Corrected: potential bug in function __SHADD16.
V4.10
V4.00
V3.40
  • Corrected: C++ include guard settings.
V3.30
  • Added: COSMIC tool chain support.
  • Corrected: GCC __SMLALDX instruction intrinsic for Cortex-M4.
  • Corrected: GCC __SMLALD instruction intrinsic for Cortex-M4.
  • Corrected: GCC/CLang warnings.
V3.20
  • Added: __BKPT instruction intrinsic.
  • Added: __SMMLA instruction intrinsic for Cortex-M4.
  • Corrected: ITM_SendChar.
  • Corrected: __enable_irq, __disable_irq and inline assembly for GCC Compiler.
  • Corrected: NVIC_GetPriority and VTOR_TBLOFF for Cortex-M0/M0+, SC000.
  • Corrected: rework of in-line assembly functions to remove potential compiler warnings.
V3.01
  • Added support for Cortex-M0+ processor.
V3.00
V2.10
  • Updated documentation.
  • Updated CMSIS core include files.
  • Changed CMSIS/Device folder structure.
  • Added support for Cortex-M0, Cortex-M4 w/o FPU to CMSIS DSP library.
  • Reworked CMSIS DSP library examples.
V2.00
  • Added support for Cortex-M4 processor.
V1.30
  • Reworked Startup Concept.
  • Added additional Debug Functionality.
  • Changed folder structure.
  • Added doxygen comments.
  • Added definitions for bit.
V1.01
  • Added support for Cortex-M0 processor.
V1.01
V1.00
  • Initial Release for Cortex-M3 processor.