CMSIS-Core (Cortex-A)
Version 1.2.1
CMSIS-Core support for Cortex-A processor-based devices
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CMSIS compiler ARMCC (Arm Compiler 5) header file. More...
Macros | |
#define | __ARM_ARCH_7A__ 1 |
Set to 1 when generating code for Armv7-A (Cortex-A7) More... | |
#define | __ASM __asm |
Pass information from the compiler to the assembler. More... | |
#define | __INLINE __inline |
Recommend that function should be inlined by the compiler. More... | |
#define | __FORCEINLINE __forceinline |
#define | __STATIC_INLINE static __inline |
Define a static function should be inlined by the compiler. More... | |
#define | __STATIC_FORCEINLINE static __forceinline |
#define | __NO_RETURN __declspec(noreturn) |
Inform the compiler that a function does not return. More... | |
#define | CMSIS_DEPRECATED __attribute__((deprecated)) |
#define | __USED __attribute__((used)) |
Inform that a variable shall be retained in executable image. More... | |
#define | __WEAK __attribute__((weak)) |
Export a function or variable weakly to allow overwrites. More... | |
#define | __PACKED __attribute__((packed)) |
Request smallest possible alignment. More... | |
#define | __PACKED_STRUCT __packed struct |
#define | __PACKED_UNION __packed union |
#define | __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x))) |
#define | __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val)) |
#define | __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr))) |
#define | __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val)) |
#define | __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr))) |
#define | __ALIGNED(x) __attribute__((aligned(x))) |
Minimum alignment for a variable. More... | |
#define | __RESTRICT __restrict |
#define | __COMPILER_BARRIER() __memory_changed() |
#define | __NOP __nop |
No Operation. More... | |
#define | __WFI __wfi |
Wait For Interrupt. More... | |
#define | __WFE __wfe |
Wait For Event. More... | |
#define | __SEV __sev |
Send Event. More... | |
#define | __ISB() __isb(0xF) |
Instruction Synchronization Barrier. More... | |
#define | __DSB() __dsb(0xF) |
Data Synchronization Barrier. More... | |
#define | __DMB() __dmb(0xF) |
Data Memory Barrier. More... | |
#define | __REV __rev |
Reverse byte order (32 bit) More... | |
#define | __ROR __ror |
Reverse byte order (16 bit) More... | |
#define | __BKPT(value) __breakpoint(value) |
Breakpoint. More... | |
#define | __RBIT __rbit |
Reverse bit order of value. More... | |
#define | __CLZ __clz |
Count leading zeros. More... | |
#define | __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") |
LDR Exclusive (8 bit) More... | |
#define | __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") |
LDR Exclusive (16 bit) More... | |
#define | __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") |
LDR Exclusive (32 bit) More... | |
#define | __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
STR Exclusive (8 bit) More... | |
#define | __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
STR Exclusive (16 bit) More... | |
#define | __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
STR Exclusive (32 bit) More... | |
#define | __CLREX __clrex |
Remove the exclusive lock. More... | |
#define | __SSAT __ssat |
Signed Saturate. More... | |
#define | __USAT __usat |
Unsigned Saturate. More... | |
#define | __enable_fault_irq __enable_fiq |
Enable IRQ Interrupts. More... | |
#define | __disable_fault_irq __disable_fiq |
Disable FIQ. More... | |
#define | __get_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); (Rt) = tmp; } while(0) |
#define | __set_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); tmp = (Rt); } while(0) |
#define | __get_CP64(cp, op1, Rt, CRm) |
#define | __set_CP64(cp, op1, Rt, CRm) |
Functions | |
__STATIC_INLINE uint32_t | __get_FPSCR (void) |
Get FPSCR (Floating Point Status/Control) More... | |
__STATIC_INLINE void | __set_FPSCR (uint32_t fpscr) |
Set FPSCR (Floating Point Status/Control) More... | |
__STATIC_INLINE uint32_t | __get_CPSR (void) |
Get CPSR (Current Program Status Register) More... | |
__STATIC_INLINE void | __set_CPSR (uint32_t cpsr) |
Set CPSR (Current Program Status Register) More... | |
__STATIC_INLINE uint32_t | __get_mode (void) |
Get Mode. More... | |
__STATIC_INLINE __ASM void | __set_mode (uint32_t mode) |
Set Mode. More... | |
__STATIC_INLINE __ASM uint32_t | __get_SP (void) |
Get Stack Pointer. More... | |
__STATIC_INLINE __ASM void | __set_SP (uint32_t stack) |
Set Stack Pointer. More... | |
__STATIC_INLINE __ASM uint32_t | __get_SP_usr (void) |
Get USR/SYS Stack Pointer. More... | |
__STATIC_INLINE __ASM void | __set_SP_usr (uint32_t topOfProcStack) |
Set USR/SYS Stack Pointer. More... | |
__STATIC_INLINE uint32_t | __get_FPEXC (void) |
Get FPEXC (Floating Point Exception Control Register) More... | |
__STATIC_INLINE void | __set_FPEXC (uint32_t fpexc) |
Set FPEXC (Floating Point Exception Control Register) More... | |
__STATIC_INLINE __ASM void | __FPU_Enable (void) |
Enable Floating Point Unit. More... | |
#define __CLREX __clrex |
Removes the exclusive lock which is created by LDREX.
#define __CLZ __clz |
Counts the number of leading zeros of a data value.
[in] | value | Value to count the leading zeros |
#define __COMPILER_BARRIER | ( | ) | __memory_changed() |
#define __disable_fault_irq __disable_fiq |
Disables FIQ interrupts by setting the F-bit in the CPSR. Can only be executed in Privileged modes.
#define __enable_fault_irq __enable_fiq |
Enables IRQ interrupts by clearing special-purpose register PRIMASK. Can only be executed in Privileged modes. Disable IRQ Interrupts
Disables IRQ interrupts by setting special-purpose register PRIMASK. Can only be executed in Privileged modes. Enable FIQ
Enables FIQ interrupts by clearing the F-bit in the CPSR. Can only be executed in Privileged modes.
#define __FORCEINLINE __forceinline |
#define __get_CP | ( | cp, | |
op1, | |||
Rt, | |||
CRn, | |||
CRm, | |||
op2 | |||
) | do { register volatile uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); (Rt) = tmp; } while(0) |
#define __get_CP64 | ( | cp, | |
op1, | |||
Rt, | |||
CRm | |||
) |
#define __LDREXB | ( | ptr | ) | _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") |
Executes a exclusive LDR instruction for 8 bit value.
[in] | ptr | Pointer to data |
#define __LDREXH | ( | ptr | ) | _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") |
Executes a exclusive LDR instruction for 16 bit values.
[in] | ptr | Pointer to data |
#define __LDREXW | ( | ptr | ) | _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") |
Executes a exclusive LDR instruction for 32 bit values.
[in] | ptr | Pointer to data |
#define __PACKED_STRUCT __packed struct |
#define __PACKED_UNION __packed union |
#define __RBIT __rbit |
Reverses the bit order of the given value.
[in] | value | Value to reverse |
#define __RESTRICT __restrict |
#define __REV __rev |
Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
[in] | value | Value to reverse |
#define __ROR __ror |
Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
[in] | value | Value to reverse |
Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
[in] | value | Value to reverse |
Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
[in] | op1 | Value to rotate |
[in] | op2 | Number of Bits to rotate |
#define __set_CP | ( | cp, | |
op1, | |||
Rt, | |||
CRn, | |||
CRm, | |||
op2 | |||
) | do { register volatile uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); tmp = (Rt); } while(0) |
#define __set_CP64 | ( | cp, | |
op1, | |||
Rt, | |||
CRm | |||
) |
#define __SSAT __ssat |
Saturates a signed value.
[in] | value | Value to be saturated |
[in] | sat | Bit position to saturate to (1..32) |
#define __STATIC_FORCEINLINE static __forceinline |
#define __STREXB | ( | value, | |
ptr | |||
) | _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
Executes a exclusive STR instruction for 8 bit values.
[in] | value | Value to store |
[in] | ptr | Pointer to location |
#define __STREXH | ( | value, | |
ptr | |||
) | _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
Executes a exclusive STR instruction for 16 bit values.
[in] | value | Value to store |
[in] | ptr | Pointer to location |
#define __STREXW | ( | value, | |
ptr | |||
) | _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
Executes a exclusive STR instruction for 32 bit values.
[in] | value | Value to store |
[in] | ptr | Pointer to location |
#define __UNALIGNED_UINT16_READ | ( | addr | ) | (*((const __packed uint16_t *)(addr))) |
#define __UNALIGNED_UINT16_WRITE | ( | addr, | |
val | |||
) | ((*((__packed uint16_t *)(addr))) = (val)) |
#define __UNALIGNED_UINT32 | ( | x | ) | (*((__packed uint32_t *)(x))) |
#define __UNALIGNED_UINT32_READ | ( | addr | ) | (*((const __packed uint32_t *)(addr))) |
#define __UNALIGNED_UINT32_WRITE | ( | addr, | |
val | |||
) | ((*((__packed uint32_t *)(addr))) = (val)) |
#define __USAT __usat |
Saturates an unsigned value.
[in] | value | Value to be saturated |
[in] | sat | Bit position to saturate to (0..31) |
#define CMSIS_DEPRECATED __attribute__((deprecated)) |
__STATIC_INLINE uint32_t __get_mode | ( | void | ) |
__STATIC_INLINE __ASM uint32_t __get_SP | ( | void | ) |
__STATIC_INLINE __ASM uint32_t __get_SP_usr | ( | void | ) |
__STATIC_INLINE __ASM void __set_mode | ( | uint32_t | mode | ) |
[in] | mode | Mode value to set |