CMSIS-Driver
Version 2.8.0
Peripheral Interface for Middleware and Application Code
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Configure and control the MCI interface. More...
Macros | |
#define | ARM_MCI_BUS_SPEED (0x01UL) |
Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s. More... | |
#define | ARM_MCI_BUS_SPEED_MODE (0x02UL) |
Set Bus Speed Mode as specified with arg. More... | |
#define | ARM_MCI_BUS_CMD_MODE (0x03UL) |
Set CMD Line Mode as specified with arg. More... | |
#define | ARM_MCI_BUS_DATA_WIDTH (0x04UL) |
Set Bus Data Width as specified with arg. More... | |
#define | ARM_MCI_DRIVER_STRENGTH (0x05UL) |
Set SD UHS-I Driver Strength as specified with arg. More... | |
#define | ARM_MCI_CONTROL_RESET (0x06UL) |
Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active. More... | |
#define | ARM_MCI_CONTROL_CLOCK_IDLE (0x07UL) |
Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled. More... | |
#define | ARM_MCI_UHS_TUNING_OPERATION (0x08UL) |
Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute. More... | |
#define | ARM_MCI_UHS_TUNING_RESULT (0x09UL) |
Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error. More... | |
#define | ARM_MCI_DATA_TIMEOUT (0x0AUL) |
Set Data timeout; arg = timeout in bus cycles. More... | |
#define | ARM_MCI_CSS_TIMEOUT (0x0BUL) |
Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles. More... | |
#define | ARM_MCI_MONITOR_SDIO_INTERRUPT (0x0CUL) |
Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled. More... | |
#define | ARM_MCI_CONTROL_READ_WAIT (0x0DUL) |
Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled. More... | |
#define | ARM_MCI_SUSPEND_TRANSFER (0x0EUL) |
Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer. More... | |
#define | ARM_MCI_RESUME_TRANSFER (0x0FUL) |
Resume Data transfer (SD I/O) More... | |
Configure and control the MCI interface.
The following codes are used as values for the parameter control of the function ARM_MCI_Control to setup the MCI interface.
#define ARM_MCI_BUS_SPEED (0x01UL) |
Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s.
#define ARM_MCI_BUS_SPEED_MODE (0x02UL) |
Set Bus Speed Mode as specified with arg.
#define ARM_MCI_BUS_CMD_MODE (0x03UL) |
Set CMD Line Mode as specified with arg.
#define ARM_MCI_BUS_DATA_WIDTH (0x04UL) |
Set Bus Data Width as specified with arg.
#define ARM_MCI_DRIVER_STRENGTH (0x05UL) |
Set SD UHS-I Driver Strength as specified with arg.
#define ARM_MCI_CONTROL_RESET (0x06UL) |
Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active.
#define ARM_MCI_CONTROL_CLOCK_IDLE (0x07UL) |
Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled.
#define ARM_MCI_UHS_TUNING_OPERATION (0x08UL) |
Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute.
#define ARM_MCI_UHS_TUNING_RESULT (0x09UL) |
Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error.
#define ARM_MCI_DATA_TIMEOUT (0x0AUL) |
Set Data timeout; arg = timeout in bus cycles.
#define ARM_MCI_CSS_TIMEOUT (0x0BUL) |
Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles.
#define ARM_MCI_MONITOR_SDIO_INTERRUPT (0x0CUL) |
Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled.
#define ARM_MCI_CONTROL_READ_WAIT (0x0DUL) |
Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled.
#define ARM_MCI_SUSPEND_TRANSFER (0x0EUL) |
Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer.
#define ARM_MCI_RESUME_TRANSFER (0x0FUL) |
Resume Data transfer (SD I/O)