Structure type to access the External Wakeup Interrupt Controller Registers (EWIC). More...
Data Fields | |
__IOM uint32_t | EWIC_ASCR |
Offset: 0x004 (R/W) EWIC Automatic Sequence Control Register. | |
__OM uint32_t | EWIC_CLRMASK |
Offset: 0x008 ( /W) EWIC Clear Mask Register. | |
__IOM uint32_t | EWIC_CR |
Offset: 0x000 (R/W) EWIC Control Register. | |
__IOM uint32_t | EWIC_MASKA |
Offset: 0x200 (R/W) EWIC MaskA Register. | |
__IOM uint32_t | EWIC_MASKn [15] |
Offset: 0x204 (R/W) EWIC Maskn Registers. | |
__IM uint32_t | EWIC_NUMID |
Offset: 0x00C (R/ ) EWIC Event Number ID Register. | |
__IM uint32_t | EWIC_PENDA |
Offset: 0x400 (R/ ) EWIC PendA Event Register. | |
__IOM uint32_t | EWIC_PENDn [15] |
Offset: 0x404 (R/W) EWIC Pendn Event Registers. | |
__IM uint32_t | EWIC_PSR |
Offset: 0x600 (R/ ) EWIC Pend Summary Register. | |
Structure type to access the External Wakeup Interrupt Controller Registers (EWIC).
__IOM uint32_t EWIC_Type::EWIC_ASCR |
Offset: 0x004 (R/W) EWIC Automatic Sequence Control Register.
__OM uint32_t EWIC_Type::EWIC_CLRMASK |
Offset: 0x008 ( /W) EWIC Clear Mask Register.
__IOM uint32_t EWIC_Type::EWIC_CR |
Offset: 0x000 (R/W) EWIC Control Register.
__IOM uint32_t EWIC_Type::EWIC_MASKA |
Offset: 0x200 (R/W) EWIC MaskA Register.
__IOM uint32_t EWIC_Type::EWIC_MASKn[15] |
Offset: 0x204 (R/W) EWIC Maskn Registers.
__IM uint32_t EWIC_Type::EWIC_NUMID |
Offset: 0x00C (R/ ) EWIC Event Number ID Register.
__IM uint32_t EWIC_Type::EWIC_PENDA |
Offset: 0x400 (R/ ) EWIC PendA Event Register.
__IOM uint32_t EWIC_Type::EWIC_PENDn[15] |
Offset: 0x404 (R/W) EWIC Pendn Event Registers.
__IM uint32_t EWIC_Type::EWIC_PSR |
Offset: 0x600 (R/ ) EWIC Pend Summary Register.