CPSR Bits

Bit position and mask macros. More...

Macros
#define	CPSR_N_Pos   31U
	CPSR: N Position.
#define	CPSR_N_Msk   (1UL << CPSR_N_Pos)
	CPSR: N Mask.
#define	CPSR_Z_Pos   30U
	CPSR: Z Position.
#define	CPSR_Z_Msk   (1UL << CPSR_Z_Pos)
	CPSR: Z Mask.
#define	CPSR_C_Pos   29U
	CPSR: C Position.
#define	CPSR_C_Msk   (1UL << CPSR_C_Pos)
	CPSR: C Mask.
#define	CPSR_V_Pos   28U
	CPSR: V Position.
#define	CPSR_V_Msk   (1UL << CPSR_V_Pos)
	CPSR: V Mask.
#define	CPSR_Q_Pos   27U
	CPSR: Q Position.
#define	CPSR_Q_Msk   (1UL << CPSR_Q_Pos)
	CPSR: Q Mask.
#define	CPSR_IT0_Pos   25U
	CPSR: IT0 Position.
#define	CPSR_IT0_Msk   (3UL << CPSR_IT0_Pos)
	CPSR: IT0 Mask.
#define	CPSR_J_Pos   24U
	CPSR: J Position.
#define	CPSR_J_Msk   (1UL << CPSR_J_Pos)
	CPSR: J Mask.
#define	CPSR_GE_Pos   16U
	CPSR: GE Position.
#define	CPSR_GE_Msk   (0xFUL << CPSR_GE_Pos)
	CPSR: GE Mask.
#define	CPSR_IT1_Pos   10U
	CPSR: IT1 Position.
#define	CPSR_IT1_Msk   (0x3FUL << CPSR_IT1_Pos)
	CPSR: IT1 Mask.
#define	CPSR_E_Pos   9U
	CPSR: E Position.
#define	CPSR_E_Msk   (1UL << CPSR_E_Pos)
	CPSR: E Mask.
#define	CPSR_A_Pos   8U
	CPSR: A Position.
#define	CPSR_A_Msk   (1UL << CPSR_A_Pos)
	CPSR: A Mask.
#define	CPSR_I_Pos   7U
	CPSR: I Position.
#define	CPSR_I_Msk   (1UL << CPSR_I_Pos)
	CPSR: I Mask.
#define	CPSR_F_Pos   6U
	CPSR: F Position.
#define	CPSR_F_Msk   (1UL << CPSR_F_Pos)
	CPSR: F Mask.
#define	CPSR_T_Pos   5U
	CPSR: T Position.
#define	CPSR_T_Msk   (1UL << CPSR_T_Pos)
	CPSR: T Mask.
#define	CPSR_M_Pos   0U
	CPSR: M Position.
#define	CPSR_M_Msk   (0x1FUL << CPSR_M_Pos)
	CPSR: M Mask.

Description

Bit position and mask macros.

Macro Definition Documentation

CPSR_A_Msk

#define CPSR_A_Msk   (1UL << CPSR_A_Pos)

CPSR: A Mask.

CPSR_A_Pos

#define CPSR_A_Pos   8U

CPSR: A Position.

CPSR_C_Msk

#define CPSR_C_Msk   (1UL << CPSR_C_Pos)

CPSR: C Mask.

CPSR_C_Pos

#define CPSR_C_Pos   29U

CPSR: C Position.

CPSR_E_Msk

#define CPSR_E_Msk   (1UL << CPSR_E_Pos)

CPSR: E Mask.

CPSR_E_Pos

#define CPSR_E_Pos   9U

CPSR: E Position.

CPSR_F_Msk

#define CPSR_F_Msk   (1UL << CPSR_F_Pos)

CPSR: F Mask.

CPSR_F_Pos

#define CPSR_F_Pos   6U

CPSR: F Position.

CPSR_GE_Msk

#define CPSR_GE_Msk   (0xFUL << CPSR_GE_Pos)

CPSR: GE Mask.

CPSR_GE_Pos

#define CPSR_GE_Pos   16U

CPSR: GE Position.

CPSR_I_Msk

#define CPSR_I_Msk   (1UL << CPSR_I_Pos)

CPSR: I Mask.

CPSR_I_Pos

#define CPSR_I_Pos   7U

CPSR: I Position.

CPSR_IT0_Msk

#define CPSR_IT0_Msk   (3UL << CPSR_IT0_Pos)

CPSR: IT0 Mask.

CPSR_IT0_Pos

#define CPSR_IT0_Pos   25U

CPSR: IT0 Position.

CPSR_IT1_Msk

#define CPSR_IT1_Msk   (0x3FUL << CPSR_IT1_Pos)

CPSR: IT1 Mask.

CPSR_IT1_Pos

#define CPSR_IT1_Pos   10U

CPSR: IT1 Position.

CPSR_J_Msk

#define CPSR_J_Msk   (1UL << CPSR_J_Pos)

CPSR: J Mask.

CPSR_J_Pos

#define CPSR_J_Pos   24U

CPSR: J Position.

CPSR_M_Msk

#define CPSR_M_Msk   (0x1FUL << CPSR_M_Pos)

CPSR: M Mask.

CPSR_M_Pos

#define CPSR_M_Pos   0U

CPSR: M Position.

CPSR_N_Msk

#define CPSR_N_Msk   (1UL << CPSR_N_Pos)

CPSR: N Mask.

CPSR_N_Pos

#define CPSR_N_Pos   31U

CPSR: N Position.

CPSR_Q_Msk

#define CPSR_Q_Msk   (1UL << CPSR_Q_Pos)

CPSR: Q Mask.

CPSR_Q_Pos

#define CPSR_Q_Pos   27U

CPSR: Q Position.

CPSR_T_Msk

#define CPSR_T_Msk   (1UL << CPSR_T_Pos)

CPSR: T Mask.

CPSR_T_Pos

#define CPSR_T_Pos   5U

CPSR: T Position.

CPSR_V_Msk

#define CPSR_V_Msk   (1UL << CPSR_V_Pos)

CPSR: V Mask.

CPSR_V_Pos

#define CPSR_V_Pos   28U

CPSR: V Position.

CPSR_Z_Msk

#define CPSR_Z_Msk   (1UL << CPSR_Z_Pos)

CPSR: Z Mask.

CPSR_Z_Pos

#define CPSR_Z_Pos   30U

CPSR: Z Position.