SCTLR_Type Struct Reference

Bit field declaration for SCTLR layout. More...

#include <core_ca.h>

Data Fields
struct {
uint32_t   M:1
	bit: 0 MMU enable More...
uint32_t   A:1
	bit: 1 Alignment check enable More...
uint32_t   C:1
	bit: 2 Cache enable More...
uint32_t   CP15BEN:1
	bit: 5 CP15 barrier enable More...
uint32_t   B:1
	bit: 7 Endianness model More...
uint32_t   SW:1
	bit: 10 SWP and SWPB enable More...
uint32_t   Z:1
	bit: 11 Branch prediction enable More...
uint32_t   I:1
	bit: 12 Instruction cache enable More...
uint32_t   V:1
	bit: 13 Vectors bit More...
uint32_t   RR:1
	bit: 14 Round Robin select More...
uint32_t   HA:1
	bit: 17 Hardware Access flag enable More...
uint32_t   WXN:1
	bit: 19 Write permission implies XN More...
uint32_t   UWXN:1
	bit: 20 Unprivileged write permission implies PL1 XN More...
uint32_t   FI:1
	bit: 21 Fast interrupts configuration enable More...
uint32_t   U:1
	bit: 22 Alignment model More...
uint32_t   VE:1
	bit: 24 Interrupt Vectors Enable More...
uint32_t   EE:1
	bit: 25 Exception Endianness More...
uint32_t   NMFI:1
	bit: 27 Non-maskable FIQ (NMFI) support More...
uint32_t   TRE:1
	bit: 28 TEX remap enable. More...
uint32_t   AFE:1
	bit: 29 Access flag enable More...
uint32_t   TE:1
	bit: 30 Thumb Exception enable More...
}	b
	Structure used for bit access.
uint32_t	w
	Type used for word access.

Description

Bit field declaration for SCTLR layout.

Field Documentation

A

uint32_t SCTLR_Type::A

bit: 1 Alignment check enable

AFE

uint32_t SCTLR_Type::AFE

bit: 29 Access flag enable

B

uint32_t SCTLR_Type::B

bit: 7 Endianness model

struct { ... } SCTLR_Type::b

Structure used for bit access.

C

uint32_t SCTLR_Type::C

bit: 2 Cache enable

CP15BEN

uint32_t SCTLR_Type::CP15BEN

bit: 5 CP15 barrier enable

EE

uint32_t SCTLR_Type::EE

bit: 25 Exception Endianness

FI

uint32_t SCTLR_Type::FI

bit: 21 Fast interrupts configuration enable

HA

uint32_t SCTLR_Type::HA

bit: 17 Hardware Access flag enable

I

uint32_t SCTLR_Type::I

bit: 12 Instruction cache enable

M

uint32_t SCTLR_Type::M

bit: 0 MMU enable

NMFI

uint32_t SCTLR_Type::NMFI

bit: 27 Non-maskable FIQ (NMFI) support

RR

uint32_t SCTLR_Type::RR

bit: 14 Round Robin select

SW

uint32_t SCTLR_Type::SW

bit: 10 SWP and SWPB enable

TE

uint32_t SCTLR_Type::TE

bit: 30 Thumb Exception enable

TRE

uint32_t SCTLR_Type::TRE

bit: 28 TEX remap enable.

U

uint32_t SCTLR_Type::U

bit: 22 Alignment model

UWXN

uint32_t SCTLR_Type::UWXN

bit: 20 Unprivileged write permission implies PL1 XN

V

uint32_t SCTLR_Type::V

bit: 13 Vectors bit

VE

uint32_t SCTLR_Type::VE

bit: 24 Interrupt Vectors Enable

w

uint32_t SCTLR_Type::w

Type used for word access.

WXN

uint32_t SCTLR_Type::WXN

bit: 19 Write permission implies XN

Z

uint32_t SCTLR_Type::Z

bit: 11 Branch prediction enable