Device capabilitiy defines

Defines to configure and check device capabilities. More...

Macros
#define	__CM0_REV
	Cortex-M0 Core revision r0p1.
#define	__CM0PLUS_REV
	Cortex-M0+ Core revision r0p1.
#define	__CM1_REV
	Cortex-M1 Core revision r0p1.
#define	__CM3_REV
	Cortex-M3 Core revision r0p1.
#define	__CM4_REV
	Cortex-M4 Core revision r0p1.
#define	__CM7_REV
	Cortex-M7 Core revision r0p1.
#define	__SC000_REV
	SC000 Core revision r0p1.
#define	__SC300_REV
	SC300 Core revision r0p1.
#define	__CM23_REV
	Cortex-M23 Core revision r0p1.
#define	__CM33_REV
	Cortex-M33 Core revision r0p1.
#define	__CM35P_REV
	Cortex-M35P Core revision r0p1.
#define	__CM55_REV
	Cortex-M55 Core revision r0p1.
#define	__CM85_REV
	Cortex-M85 Core revision r0p1.
#define	__ARMv8MBL_REV
	Armv8-M Baseline device Core revision r0p1.
#define	__ARMv8MML_REV
	Armv8-M Mainline device Core revision r0p1.
#define	__ARMv81MML_REV
	Armv8.1-M Baseline device Core revision r0p1.
#define	__NVIC_PRIO_BITS
	Number of Bits used for Priority Levels.
#define	__Vendor_SysTickConfig
	Set to 1 if a venor specfic SysTick configuration is used.
#define	__VTOR_PRESENT
	VTOR present or not.
#define	__MPU_PRESENT
	MPU present or not.
#define	__FPU_PRESENT
	FPU present or not.
#define	__FPU_DP
	Double precision FPU present.
#define	__DSP_PRESENT
	DSP extension present or not.
#define	__SAUREGION_PRESENT
	SAU regions present or not.
#define	__PMU_PRESENT
	PMU present or not.
#define	__PMU_NUM_EVENTCNT
	PMU Event Counters.
#define	__ICACHE_PRESENT
	Instruction Cache present or not.
#define	__DCACHE_PRESENT
	Data Cache present or not.
#define	__DTCM_PRESENT
	Data Tightly Coupled Memory is present or not.

Description

Defines to configure and check device capabilities.

These defines are used by the Device Header File <Device.h> in order to enable or disable functionality provided by CMSIS-Core(M) dependent on the device capabilities.

Macro Definition Documentation

__ARMv81MML_REV

#define __ARMv81MML_REV

Armv8.1-M Baseline device Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__ARMv8MBL_REV

#define __ARMv8MBL_REV

Armv8-M Baseline device Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__ARMv8MML_REV

#define __ARMv8MML_REV

Armv8-M Mainline device Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__CM0_REV

#define __CM0_REV

Cortex-M0 Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__CM0PLUS_REV

#define __CM0PLUS_REV

Cortex-M0+ Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__CM1_REV

#define __CM1_REV

Cortex-M1 Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__CM23_REV

#define __CM23_REV

Cortex-M23 Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__CM33_REV

#define __CM33_REV

Cortex-M33 Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__CM35P_REV

#define __CM35P_REV

Cortex-M35P Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__CM3_REV

#define __CM3_REV

Cortex-M3 Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__CM4_REV

#define __CM4_REV

Cortex-M4 Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__CM55_REV

#define __CM55_REV

Cortex-M55 Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__CM7_REV

#define __CM7_REV

Cortex-M7 Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__CM85_REV

#define __CM85_REV

Cortex-M85 Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__DCACHE_PRESENT

#define __DCACHE_PRESENT

Data Cache present or not.

__DSP_PRESENT

#define __DSP_PRESENT

DSP extension present or not.

__DTCM_PRESENT

#define __DTCM_PRESENT

Data Tightly Coupled Memory is present or not.

__FPU_DP

#define __FPU_DP

Double precision FPU present.

The combination of the defines __FPU_PRESENT and __FPU_DP determine the whether the FPU is with single or double precision as shown in the table below.

__FPU_PRESENT	__FPU_DP	Description
0	ignored	Processor has no FPU. The value set for __FPU_DP.
1	0	Processor with FPU with single precision.
1	1	Processor with FPU with double precision.

__FPU_PRESENT

#define __FPU_PRESENT

FPU present or not.

The combination of the defines __FPU_PRESENT and __FPU_DP determine the whether the FPU is with single or double precision as shown in the table below.

__FPU_PRESENT	__FPU_DP	Description
0	ignored	Processor has no FPU. The value set for __FPU_DP.
1	0	Processor with FPU with single precision.
1	1	Processor with FPU with double precision.

FPU present

The

__ICACHE_PRESENT

#define __ICACHE_PRESENT

Instruction Cache present or not.

__MPU_PRESENT

#define __MPU_PRESENT

MPU present or not.

__NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS

Number of Bits used for Priority Levels.

__PMU_NUM_EVENTCNT

#define __PMU_NUM_EVENTCNT

PMU Event Counters.

The number of Event counters if PMU is present (see __PMU_PRESENT)

__PMU_PRESENT

#define __PMU_PRESENT

PMU present or not.

__SAUREGION_PRESENT

#define __SAUREGION_PRESENT

SAU regions present or not.

__SC000_REV

#define __SC000_REV

SC000 Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__SC300_REV

#define __SC300_REV

SC300 Core revision r0p1.

([15:8] revision number, [7:0] patch number)

__Vendor_SysTickConfig

#define __Vendor_SysTickConfig

Set to 1 if a venor specfic SysTick configuration is used.

If this define is set to 1, then the default SysTick_Config function is excluded. In this case, the file device.h must contain a vendor specific implementation of this function.

__VTOR_PRESENT

#define __VTOR_PRESENT

VTOR present or not.

See SCB_Type::VTOR