CMSIS-Core (Cortex-A)  
CMSIS-Core support for Cortex-A processor-based devices
 
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Interrupt Status Register (ISR)

The ISR shows whether an IRQ, FIQ, or external abort is pending. More...

Content

 ISR Bits
 Bit position and mask macros.
 

Data Structures

struct  ISR_Type
 Bit field declaration for ISR layout. More...
 

Functions

__STATIC_FORCEINLINE uint32_t __get_ISR (void)
 Get ISR.
 

Description

The ISR shows whether an IRQ, FIQ, or external abort is pending.

Bits Name Function
[31:9] - Reserved.
[8] A External abort pending bit.
[7] I IRQ pending bit.
[6] F FIQ pending bit.
[5:0] - Reserved.

Consider __get_IFSR to access this register.

Function Documentation

◆ __get_ISR()

__STATIC_INLINE uint32_t __get_ISR ( void  )

Get ISR.

Returns
Interrupt Status Register value

This function returns the current value of the Interrupt Status Register (ISR).