24.02
ClLogicalNotWorkload.hpp
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//
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// Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
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// SPDX-License-Identifier: MIT
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//
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#pragma once
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#include "
ClBaseWorkload.hpp
"
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#include <arm_compute/core/Error.h>
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#include <arm_compute/runtime/CL/functions/CLLogicalNot.h>
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namespace
armnn
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{
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arm_compute::Status
ClLogicalNotWorkloadValidate
(
const
TensorInfo& input,
const
TensorInfo& output);
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class
ClLogicalNotWorkload
:
public
ClBaseWorkload
<ElementwiseUnaryQueueDescriptor>
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{
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public
:
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ClLogicalNotWorkload
(
const
ElementwiseUnaryQueueDescriptor
& descriptor,
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const
WorkloadInfo
&
info
,
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const
arm_compute::CLCompileContext& clCompileContext);
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virtual
void
Execute
()
const override
;
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private
:
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mutable
arm_compute::CLLogicalNot m_LogicalNotLayer;
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};
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}
//namespace armnn
armnn::ClBaseWorkload
Definition:
ClBaseWorkload.hpp:13
armnn::ClLogicalNotWorkload::Execute
virtual void Execute() const override
Definition:
ClLogicalNotWorkload.cpp:53
armnn::ElementwiseUnaryQueueDescriptor
Definition:
WorkloadData.hpp:676
armnn::WorkloadInfo
Contains information about TensorInfos of a layer.
Definition:
WorkloadInfo.hpp:16
armnn::ClLogicalNotWorkload
Definition:
ClLogicalNotWorkload.hpp:18
armnn::BoostLogSeverityMapping::info
@ info
armnn::Status
Status
Definition:
Types.hpp:42
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition:
01_00_quick_start.dox:6
ClBaseWorkload.hpp
armnn::ClLogicalNotWorkload::ClLogicalNotWorkload
ClLogicalNotWorkload(const ElementwiseUnaryQueueDescriptor &descriptor, const WorkloadInfo &info, const arm_compute::CLCompileContext &clCompileContext)
Definition:
ClLogicalNotWorkload.cpp:31
armnn::ClLogicalNotWorkloadValidate
arm_compute::Status ClLogicalNotWorkloadValidate(const TensorInfo &input, const TensorInfo &output)
Definition:
ClLogicalNotWorkload.cpp:20
src
backends
cl
workloads
ClLogicalNotWorkload.hpp
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