CMSIS-Pack
Version 1.7.2
Delivery Mechanism for Software Packs
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Define properties that are in common to all devices of a family. These properties are inherited by subgroups or elements. This is a mechanism of granulation to reduce redundancy. Multiple <family> groups can be defined.
Example
Parents | Element Chain | ||
---|---|---|---|
devices | /package/devices | ||
Attributes | Description | Type | Use |
Dfamily | Name of the device family. | xs:string | required |
Dvendor | Device vendor name. Use predefined values as listed in the table Device Vendor. | DeviceVendorEnum | required |
Child Elements | Description | Type | Occurrence |
processor | List all processors that are in common to devices of the family. | ProcessorType | 0..* |
debugconfig | Specify default settings for the debug connection relevant to all devices of the family. | DebugConfigType | 0..1 |
compile | Specify compile or translate options that are relevant to all devices of the family. | CompileType | 0..* |
debugvars | Define global debug access variables for settings relevant to all devices of the family unless replaced by debugvars on subFamily, device or variant level | DebugVarsType | 0..1 |
sequences | Describe debug access sequences relevant to all devices of the family. | SequencesType | 0..1 |
debugport | Describe a debug port relevant to all devices of the family. | DebugPortType | 0..* |
accessportV1 | Describe an access port (APv1) relevant to all devices of the family. | AccessPortV1Type | 0..* |
accessportV2 | Describe an access port (APv2) relevant to all devices of the family. | AccessPortV2Type | 0..* |
debug | Specify debug options that are relevant to all devices of the family. | DebugType | 0..* |
trace | Specify trace options that are relevant to all devices of the family. | TraceType | 0..* |
memory | Specify memory areas that are available for all devices of the family. | MemoryType | 0..* |
algorithm | Specify Flash programming algorithms that are suitable for all devices. | AlgorithmType | 0..* |
flashinfo | Specify additional information required to download application code into Flash that is available for all devices of the family. | FlashInfoType | 0..* |
book | Specify documents that are relevant for all devices of a family. | BookType | 0..* |
description | Describe the device family. | DescriptionType | 0..* |
environment | Specify tool specific settings. | EnvironmentType | 0..* |
feature | Specify features that are available in all members of the device family. | FeatureType | 0..* |
subFamily | A optional sub-family that is used to group devices. | group | 0..* |
device | Individual devices that belong to the device family. | DeviceType | 0..* |
Define properties that are in common to all devices of a subFamily. This is another mechanism of granulation to reduce redundancy. These properties are inherited by subgroups or elements. Multiple <subFamily> groups can be defined.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
Attributes | Description | Type | Use |
DsubFamily | Name of the device sub family. | xs:string | required |
Child Elements | Description | Type | Occurrence |
processor | Specify processors that are available in all devices of the sub-family. | ProcessorType | 0..* |
compile | Specify compile or translate options that are relevant to all devices of the sub-family. | CompileType | 0..* |
debugconfig | Specify default settings for the debug connection relevant to all devices of the sub-family. | DebugConfigType | 0..1 |
debugvars | Define global debug access variables for user-defined settings relevant to all devices of the sub-family. | DebugVarsType | 0..1 |
sequences | Describe debug access sequences relevant to all devices of the sub-family. | SequencesType | 0..1 |
debugport | Describe a debug port relevant to all devices of the sub-family. | DebugPortType | 0..* |
accessportV1 | Describe an access port (APv1) relevant to all devices of the sub-family. | AccessPortV1Type | 0..* |
accessportV2 | Describe an access port (APv2) relevant to all devices of the sub-family. | AccessPortV2Type | 0..* |
debug | Specify debug options that are relevant to all devices of the sub-family. | DebugType | 0..* |
trace | Specify trace options that are relevant to all devices of the sub-family. | TraceType | 0..* |
memory | Specify memory areas that are available in all device of the sub-family. | MemoryType | 0..* |
algorithm | Specify Flash programming algorithms that can be used by all device of the sub-family. | AlgorithmType | 0..* |
flashinfo | Specify additional information required to download application code into Flash that is available for all devices of the sub-family. | FlashInfoType | 0..* |
book | Specify documents relevant for all device of the sub-family. | BookType | 0..* |
description | Description of the device family. | DescriptionType | 0..* |
feature | Specify features available in devices of the sub-family. | FeatureType | 0..* |
device | List individual devices that belong to the device sub-family. | DeviceType | 0..* |
Define properties that are specific to a device. Properties defined on upper levels get inherited, unless they can be overwritten. Multiple <device> elements can be defined.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
Attributes | Description | Type | Use |
Dname | Specifies the name of the device. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | required |
Child Elements | Description | Type | Occurrence |
processor | Specify processors that are specific to this device. | ProcessorType | 0..* |
debugconfig | Specify default settings for the debug connection specific to this device. | DebugConfigType | 0..1 |
compile | Specify compile or translate options specific to this device. | CompileType | 0..* |
memory | Specify memory areas that specific to this device. | MemoryType | 0..* |
algorithm | Specify Flash programming algorithms that can be used by this device. | AlgorithmType | 0..* |
flashinfo | Specify additional information required to download application code into Flash that is specific to this device. | FlashInfoType | 0..* |
book | Specify documents specific to this device. | BookType | 0..* |
description | Description specific to this device. | DescriptionType | 0..* |
feature | Specify the features of this device. | FeatureType | 0..* |
environment | Specify tool options. | EnvironmentType | 0..* |
debugport | Describe a debug port specific to this device. | DebugPortType | 0..* |
accessportV1 | Describe an access port (APv1) specific to this device. | AccessPortV1Type | 0..* |
accessportV2 | Describe an access port (APv2) specific to this device. | AccessPortV2Type | 0..* |
debug | Specify debug options specific to this device. | DebugType | 0..* |
trace | Specify trace options specific to this device. | TraceType | 0..* |
debugvars | Define debug access variables for user-defined settings specific to this device. | DebugVarsType | 0..1 |
sequences | Describe debug access sequences specific to this device. | SequencesType | 0..1 |
variant | Complex element specifying a variant of a device. | xs:ComplexType | 0..* |
Specify Flash programming algorithms with the address range and its size. An algorithm with <default> set to true gets configured automatically to the download options of the project. Algorithms can be defined on various levels. Multiple <algorithm> elements are possible. If the memory range and style are identical, the one on the lower level takes precedence.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
Pname | Processor identifier. This attribute is mandatory for devices that embed multiple processors that require different algorithms. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
name | Flash Programming Algorithm file including the path, which is relative to the root folder of the Software Pack. | xs:string | required |
start | Base address for the Flash programming algorithm. | NonNegativeInteger | required |
size | Size covered by the Flash programming algorithm. End address = start + size - 1 | NonNegativeInteger | required |
RAMstart | Base address for the RAM where the Flash programming algorithm will be executed from. If specified, the memory element does not require a default attribute. | NonNegativeInteger | optional |
RAMsize | Maximum size of RAM available for the execution of the Flash programming algorithm. End address = start + size - 1 is used for the Stack. If specified, the memory element does not require a default attribute. | NonNegativeInteger | optional |
default | If true, then this is the default Flash programming algorithm that gets configured in a project. If not specified or set to false, then the Flash programming algorithm can be configured on a lower level. However, the Flash programming algorithm of a project can be changed manually at any time during development. | xs:boolean | optional |
style | [Version 1.4.0] Today, different toolchains support different styles of incompatible flash programming algorithms. The attribute specifies the style of the specified flash programming algorithm. For backward compatibility the default value is Keil. The aim is to converge to the CMSIS style. | AlgorithmStyleEnum | optional |
Specify Flash information that the debugger can use to erase and program Flash memories without the use of target RAM based Flash download algorithms.
The child elements <block> and <gap> describe the memory and programming layout of a flash device:
Flash information can be defined on various levels. Multiple <flashinfo> elements are possible. If the memory range is identical, the one on the lower level takes precedence. Overlap of Flash information ranges is not allowed.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
name | Name of the specified flash device. | xs:string | required |
start | Base address of the specified flash device as mapped into target memory system. | NonNegativeInteger | required |
pagesize | Programming page size. | NonNegativeInteger | required |
blankval | Expected memory value for unprogrammed address ranges (64-bit value). The access size used to read back programmed memory defines the number of least significant bytes of this value that are compared. Defaults to 0xFFFFFFFFFFFFFFFF if not specified. | NonNegativeInteger | optional |
filler | Value that a debugger uses to fill the remainder of a programming page (64-bit value). The access size used in FlashBufferWrite defines the number of least significant bytes of this value to write. Defaults to 0xFFFFFFFFFFFFFFFF if not specified. | NonNegativeInteger | optional |
ptime | Timeout in milliseconds for programming a page. Defaults to 100 if not specified. | xs:unsignedInt | optional |
etime | Timeout in milliseconds for erasing a sector. Defaults to 300 if not specified. | xs:unsignedInt | optional |
Pname | Processor identifier. This attribute is mandatory for devices that embed multiple processors that require different algorithms. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
Child Elements | Description | Type | Occurrence |
block | /package/devices/family/.../flashinfo/block | FlashInfoBlockType | 0..* |
gap | /package/devices/family/.../flashinfo/gap | FlashInfoGapType | 0..* |
Specify properties of one or multiple subsequent blocks of flash device that have the attributes. Its base address calculates from the parent <flashinfo> start address incremented by the size of all previous <block> and <gap> elements of this flash device.
Parents | Element Chain | ||
---|---|---|---|
flashinfo | /package/devices/family/.../flashinfo | ||
Attributes | Description | Type | Use |
count | Number of subsequent blocks of this flash device with identical properties. | NonNegativeInteger | required |
size | Block size in bytes. The overall memory size that is covered by this <block> element is count times size. | NonNegativeInteger | required |
arg | An optional argument to pass to flash operation sequence. A debugger writes this value to the pre-defined debug access variable __FlashArg at start of a flash operation. It is a non-negative number specific to this device. Defaults to 0 if not specified. | NonNegativeInteger | optional |
Specify a gap between <block> elements of the parent. Its base address calculates from the parent <flashinfo> start address incremented by the size of all previous <block> and <gap> elements of this flash device.
Parents | Element Chain | ||
---|---|---|---|
flashinfo | /package/devices/family/.../flashinfo | ||
Attributes | Description | Type | Use |
size | Gap size in bytes. | NonNegativeInteger | required |
Specifies documents related to a device. Books can be entered on various levels. The book element contains the location, filename, and extension of the file. The title is used for display purposes.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
Pname | Processor identifier. This attribute is mandatory for devices that embed multiple processors and where the book refers to a single processor only. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
name | File name of the document including the extension. The document path is relative to the package base folder. Directory/file names are case-sensitive. | xs:string | required |
title | Book title. Can be used for being displayed in various environments. | xs:string | required |
public | Set publishing permissions for the documentation. If <public> is true, then the vendor gives permission to extract the documentation from the pack and publish it on a web-page. Links to web pages are assumed to be public. The default value is false. | xs:boolean | optional |
Specify the CMSIS-Core compliant device header file and a device specific preprocessor define automatically included and set by the build tools. In case of devices embedding multiple processor cores, an additional core specific define can be specified. In this case the Pname attribute becomes mandatory. This element can occur on various levels. Multiple elements are allowed. The last occurrence in the hierarchy determines the effective include path and define. It is required that each device has an effective header and define.
STM32F407IG
. Previous defines are overridden.header
and define
) in the attributes list of the compile
element together. This clarifies the relationship between header file and define.Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
Pname | Processor identifier. This attribute is mandatory for devices that embed multiple processors if the header and define is different for each processor. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
header | CMSIS-Core compliant device header file with path relative to the pack's base folder. | xs:string | required |
define | Device specific preprocessor define (macro). This macro is set in the pre-processor command line (-D<macro>) and allows to select device specific code during preprocessing of the application code, e.g. enabling/disabling device specific definitions in the device header file. | xs:string | required |
Pdefine | This attribute can only be used for devices with multiple processor cores. It specifies a core specific preprocessor define (macro). This macro is set in the pre-processor command line (-D<macro>) and allows to select processor specific code during preprocessing of the application code, e.g. enabling/disabling core specific definitions in the device header file. | xs:string | optional |
Brief description of the element. Can occur on various levels and gets inherited from upper level if not defined in the element. Should only contain the unique features of the element. Number of bullet points should not exceed ten. To create a detailed feature list use the /package/devices/family/.../feature instead.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
Pname | Processor Identifier. This attribute is mandatory for devices that embed multiple processors and where the description is specific to a single processor. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
Tool-specific elements for a device.
Can occur on various levels.
Contains information that is specific for a development tool identified by the name attribute. The structure of the element is not specified in the schema file which gives the development tool full control of the element usage.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
name | Name of the development tool (for example, "uv" for uVision) | xs:string | required |
Pname | Identifies the processor the setting belongs to. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
Child Elements | Description | Type | Occurrence |
any | Any element that is available for the specified development tool. For uVision, the following elements are available: <CMisc>, <AMisc>, <LMisc>, <preBuild1>, <preBuild2>, <preRun1>, <preRun2>, <postBuild1>, <postBuild2>, <postRun1>, <postRun>. | xs:anyAttribute | 0..* |
This element specifies peripherals that devices can have. This can be used on web sites for the display of device features.
Many device feature types are already predefined, such as timers, converters, Ethernet, USB, etc (for a complete list refer to table Device Feature Types). Features can be defined on various levels. Inner elements supersede outer elements.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
Pname | Processor Identifier. This attribute is mandatory for devices that embed multiple processors. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
type | A feature (peripheral), such as CAN, DMA, I/O, LCD, etc. Predefined values must be used as listed in the table Device Feature Types. | DeviceFeatureTypeEnum | required |
n | Depends on the element type. Check table Device Feature Types. | xs:decimal | optional |
m | Depends on the elemen type. Check table Device Feature Types. | xs:decimal | optional |
name | Descriptive name of the feature. For example, "16-bit down counting timer". If omitted, the Default Name is used as described in the table Device Feature Types. | xs:string | optional |
The table lists predefined device features (peripherals).
type= | n= | m= | Default Name | Example | Example shown as |
---|---|---|---|---|---|
NVIC | Number of NVIC Interrupts | N/A | NVIC | <feature type="NVIC" n="120" name="NVIC"/> | NVIC with 120 interrupt sources |
DMA | Number of DMA Channels | N/A | DMA | <feature type="DMA" n="16" name="High-Speed DMA"/> | 16-channel High-Speed DMA |
Crypto | Bitwidth, given as decimal Number (see example) | N/A | Cryptographic Engine | <feature type="Crypto" n="128.256" name="HW accelerated AES Encryption Engine"/> | 128/256-bit HW accelerated AES Encryption Engine |
RNG | Number of RNGs | N/A | Random Number Generator | <feature type="RNG" name="True Random Number Generator"/> | True Random Number Generator |
CoreOther | Number of Features | N/A | Other Core Feature | <feature type="CoreOther" n=1 name="96-bit Unique Identifier"/> | 1 x 96-bit Unique Identifier |
Memory | Number of Bytes | N/A | Memory | <feature type="Memory" n="128" name="EEPROM"/> | 128 byte EEPROM |
MemoryOther | Number of Memories | N/A | Other Memory Type | <feature type="MemoryOther" n="1" name="1 kB MRAM"/> | 1 x 1 kB MRAM |
ExtBus | Bitwidth of Bus Interface | N/A | External Bus Interface | <feature type="ExtBus" n="16" name="External Bus Interface for SRAM Communication"/> | 16-bit External Bus Interface for SRAM Communication |
XTAL | Minimum Frequency in Hz | Maximum Frequency in Hz | External Crystal Oscillator | <feature type="XTAL" n="4000000" m="25000000" name="External Crystal Oscillator"/> | 4 MHz .. 25 MHz External Crystal Oscillator |
IntRC | Minimum Frequency in Hz | Maximum Frequency in Hz | Internal RC Oscillator | <feature type="IntRC" n="16000000" name="Internal RC Oscillator with +/- 1% accuracy"/> | 16 MHz Internal RC Oscillator with +/- 1% accuracy |
PLL | Number of PLLs | N/A | PLL | <feature type="PLL" n="3" name="Internal PLL"/> | 3 Internal PLL |
RTC | RTC Frequency | N/A | RTC | <feature type="RTC" n="32000" name="Internal RTC"/> | 32 kHz Internal RTC |
ClockOther | Number of Peripherals | N/A | Other Clock Peripheral | <feature type="ClockOther" name="My special clock feature"/> | My special clock feature |
PowerMode | Number of Power Modes | N/A | Power Modes | <feature type="Mode" n="3" name="Run, Sleep, Deep-Sleep"/> | 3 Power Modes: Run, Sleep, Deep-Sleep |
VCC | Minimum Supply Voltage | Maximum Supply Voltage | Operating Voltage | <feature type="VCC" n="1.8" m="3.6"/> | 1.8 V .. 3.6 V |
Consumption | Minimum Power Consumption | Typical Power Consumption | Power Consumption | <feature type="Consumption" n="0.00004" m="0.002" name="Ultra-Low Power Consumption"/> | 40 uW/MHz .. 2 mW/MHz Ultra-Low Power Consumption |
PowerOther | Number of Features | N/A | Other Power Feature | <feature type="PowerOther" n="1" name="POR"/> | 1 x POR |
BGA | Number of Balls | N/A | BGA | <feature type="BGA" n="256" name="Plastic Ball Grid Array"/> | 256-ball Plastic Ball Grid Array |
CSP | Number of Leads | N/A | CSP | <feature type="CSP" n="28" name="Wafer-Level Chip-Scale Package"/> | 28-ball Wafer-Level Chip-Scale Package |
PLCC | Number of Leads | N/A | PLCC | <feature type="PLCC" n="20" name="PLCC Package"/> | 20-lead PLCC Package |
QFN | Number of Leads | N/A | QFN | <feature type="QFN" n="33" name="QFN Package"/> | 33-pad QFN Package |
QFP | Number of Leads | N/A | QFP | <feature type="QFP" n="128" name="Low-Profile QFP Package"/> | 128-lead Low-Profile QFP Package |
SOP | Number of Leads | N/A | SOP | <feature type="SOP" n="16" name="SSOP Package"/> | 16-lead SSOP Package |
DIP | Number of Leads | N/A | SOP | <feature type="DIP" n="16" name="Dual In-Line Package"/> | 16-lead Dual In-Line Package |
PackageOther | Number of Pins | N/A | Other Package Type | <feature type="PackageOther" n="44" name="My other Package"/> | 44-contacts My other Package |
IOs | Number of I/Os | N/A | Inputs/Outputs | <feature type="IOs" n="112" name="General Purpose I/Os, 5V tolerant"/> | 112 General Purpose I/Os, 5V tolerant |
ExtInt | Number of External Interrupts | N/A | External Interrupts | <feature type="ExtInt" n="12"/> | 12 External Interrupts |
Temp | Minimum Operating Temperature | Maximum Operating Temperature | Operating Temperature Range | <feature type="Temp" n="-40" m="105" name="Extended Operating Temperature Range"/> | -40 °C .. +105 °C Extended Operating Temperature Range |
ADC | Number of Channels | Resolution in Bit | ADC | <feature type="ADC" n="5" m="12" name="High-Performance ADC"/> | 5-channel x 12-bit High-Performance ADC |
DAC | Number of Channels | Resolution in Bit | DAC | <feature type="DAC" n="2" m="10"/> | 2 x 12-bit DAC |
TempSens | Number of Sensors | N/A | Temperature Sensor | <feature type="TempSens" n="1"/> | 1 x Temperature Sensor |
AnalogOther | Number of Features | N/A | Other Analog Peripheral | <feature type="AnalogOther" n="1" name="My Analog"/> | 1 x My Analog |
Timer | Number of Channels | Resolution in Bit | Timer/Counter Module | <feature type="Timer" n="2" m="32" name="Timer Module with Quadrature Encoding"/> | 2 x 32-bit Timer Module with Quadrature Encoding |
PWM | Number of Channels | Resolution in Bit | PWM | <feature type="PWM" n="2" m="16" name="Pulse Width Modulation"/> | 2 x 16-bit Pulse Width Modulation |
WDT | Number of Watchdogs | N/A | Watchdog | <feature type="WDT" n="1"/> | 1 x Watchdog Timer |
TimerOther | Number of Features | N/A | Other Timer Peripheral | <feature type="TimerOther" n="1" name="Quadrature En-/Decoder"/> | 1 x Quadrature En-/Decoder |
MPSerial | Number of Serial Peripherals | N/A | Multi-Purpose Serial Peripheral | <feature type="MPSerial" n="4" name="Multi-Purpose Serial Interface Module: I2C, I2S, SPI, UART"/> | 4 x Multi-Purpose Serial Interface Module: I2C, I2S, SPI, UART |
CAN | Number of CAN Interfaces | N/A | CAN | <feature type="CAN" n="2" name="CAN 2.0b Controller"/> | 2 x CAN 2.0b Controller |
ETH | Number of Ethernet Interfaces | Data Rate in Bit/s | Ethernet | <feature type="ETH" n="1" m="10000000" name="Integrated Ethernet MAC with PHY"/> | 1 x 10 Mbit/s Integrated Ethernet MAC with PHY |
I2C | Number of I2C Interfaces | N/A | I2C | <feature type="I2C" n="2"name="Low-Power I2C"/> | 2 x Low-Power I2C |
I2S | Number of I2S Interfaces | N/A | I2S | <feature type="I2S" n="3"/> | 3 x I2S |
LIN | Number of LIN Interfaces | N/A | LIN | <feature type="LIN" n="4"/> | 4 x LIN |
SDIO | Number of SDIO Interfaces | Bitwidth of SDIO Interface | SDIO | <feature type="SDIO" n="1" m="4" name="SDIO Interface"/> | 1 x 4-bit SDIO Interface |
SPI | Number of SPI Interfaces | Data Rate in Bit/s | SPI | <feature type="SPI" n="2" m="20000000" name="SPI Interface"/> | 2 x 20 Mbit/s SPI Interface |
UART | Number of UART Interfaces | Data Rate in Bit/s | UART | <feature type="UART" n="4" m="3000000" name="High-Speed UART Interface"/> | 4 x 3 Mbit/s High-Speed UART Interface |
USART | Number of USART Interfaces | Data Rate in Bit/s | USART | <feature type="USART" n="2" m="1000000" name="High-Speed USART Interface"/> | 2 x 1 Mbit/s High-Speed USART Interface |
USBD | Number of USB Dvice Interfaces | N/A | USB Device | <feature type="USBD" n="2" name="Full-Speed USB Device"/> | 2 x Full-Speed USB Device |
USBH | Number of USB Host Interfaces | N/A | USB Host | <feature type="USBH" n="2" name="High-Speed USB Host"/> | 2 x High-Speed USB Host |
USBOTG | Number of USB OTG Interfaces | N/A | USB OTG | <feature type="USBOTG" n="1" name="High-Speed USB OTG with PHY"/> | 1 x High-Speed USB OTG with PHY |
ComOther | Number of other Communication Peripherals | N/A | Other Communication Peripheral | <feature type="ComOther" n="1" name="ZigBee"/> | 1 x ZigBee |
Camera | Number of Camera Interface | Resolution in Bit | Camera Interface | <feature type="Camera" n="1" m="8" name="Digital Camera Interface"/> | 1 x 8-bit Digital Camera Interface |
GLCD | Number of Graphic LCD Controller | Maximum Resolution as a decimal number (see example) | Graphic LCD Controller | <feature type="GLCD" n="1" m="320.240" name="TFT LCD Controller"/> | 1 x 320 x 480 pixel TFT LCD Controller |
LCD | Number of Segment LCD Controller | Com.Seg as a decimal number (see example) | Segment LCD Controller | <feature type="LCD" n="1" m="16.40" name="Segment LCD Controller"/> | 1 x 16 x 40 Segment LCD Controller |
Touch | Number of Touch Channels | N/A | Capacitive Touch Inputs | <feature type="Touch" n="10" name="Capacitive Touch Inputs"/> | 10 x Capacitive Touch Inputs |
Other | Number of Features | N/A | Other Feature | <feature type="Other" n="2" name="My other Interface"/> | 2 x My other Interface |
GPU | IP Name | Number of Shaders | GPU | <feature type="GPU" n="Mali G71" m="1024"/> | Mali G71 GPU with 1024 Shaders |
AI | N/A | N/A | AI | <feature type="AI"/> | AI accelerator |
FPGA | Number of Logic Elements | N/A | FPGA Array | <feature type="FPGA" n="100000"/> | FPGA with 100000 Logic Elements |
Application | Automotive, Industrial, Medical, MilAero | Standard Name | N/A | <feature type="Application" n="Automotive" m="ISO 26262"/> | Automotive ISO 26262 Applications |
IrDA | Standard Version | Data Rate in Bit/s | Infrared | <feature type="IrDA" n="" m="1000000"/> | IrDA 1 Mbit/s |
HDMI | Standard Version | N/A | HDMI | <feature type="HDMI" n="1.3"/> | HDMI 1.3 |
MIPI | Standard Version | Data Rate in Bit/s | MIPI | <feature type="MIPI" n="CSI" m="5000000000"/> | MIPI CSI 5 Gbit/s |
PCIe | Standard Version | Maximum Data Rate in Bit/s | PCIe | <feature type="PCIe" n="3.0" m="3000000000"/> | PCIe 3.0 3 GT/s |
Bluetooth | Standard Version | Maximum Data Rate in Bit/s | Bluetooth | <feature type="Bluetooth" n="4.2" name="Bluetooth Low Energy"/> | Bluetooth Low Energy 4.2 |
ZigBee | Application Profile | Data Rate in Bit/s | ZigBee | <feature type="Zigbee" n="Home Automation 2.1"/> | ZigBee Home Automation 1.2 |
802.15.4 | Standard Version | N/A | 802.15.4 | <feature type="802.15.4" n="802.15.4d"/> | 802.15.4d |
WiFi | Standard Version | Maximum Data Rate in Bit/s | WiFi | <feature type="WiFi" n="802.11ac"/> | 802.11ac WiFi |
LoRa | Standard Version | Maximum Data Rate in Bit/s | LoRa | <feature type="LoRa"/> | LoRa |
LTE Cat-M | Standard Version | Maximum Data Rate in Bit/s | LTE Cat-M | <feature type="LTE-M" n="M1" m="1000000"/> | LTE-M M1 1 Mbit/s |
NB-IoT | Standard Version | Maximum Data Rate in Bit/s | NB IoT | <feature type="NB-IoT" n="NB1" m="250000"/> | NB-IoT NB1 250 kbit/s |
NFC | Standard Version | Maximum Data Rate in Bit/s | NFC | <feature type="NFC" n="ISO 18092"/> | NFC ISO 18092 |
WirelessOther | Standard Version | Maximum Data Rate in Bit/s | Other Wireless Connectivity | <feature type="WirelessOther" n="MyStandard" m="1000000"/> | MyStandard 1 Mbit/s Wireless Connectivity |
This element specifies memory regions that devices can have. Memory types are predefined and can be selected. This element can be defined on various levels. Inner memory elements supersede outer elements.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
Pname | Processor identifier. This attribute is mandatory for devices that embed multiple processors. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
id (deprecated since version 1.4.0) | Identifier of the memory region consisting of a type indicator and an index (for example, IRAM1). Predefined values can be selected as defined in MemoryIDTypeEnum. | MemoryIDTypeEnum | optional |
name (new since version 1.4.0) |
Unique name of the memory to be used in conjunction with access. If a memory with the same name is already defined in a parent scope, the parent one is extended/overwritten. Backward compatibility: If no 'name' attribute is given but 'id' attribute is still present, the given 'id' attribute is used as the 'name'. | xs:string | optional |
access (new since version 1.4.0) | Access permission of the memory. See MemoryAccessTypeString for details. | MemoryAccessTypeString | optional |
start | Base address of the memory using a hexadecimal value. | NonNegativeInteger | required |
size | Size of the memory in bytes using a hexadecimal value. | NonNegativeInteger | required |
default |
Indicates a general purpose memory region, that does not require any special considerations (access speed, remapping, protection, etc.). If true, then an IRAM memory region will be used by the linker for locating any data and an IROM memory region will for locating any code. Every device needs at least one default IRAM region. If an algorithm element is specified (without Default value is false. | xs:boolean | optional |
startup | If true, the startup code of the application will be placed into this memory region. Default value is false. | xs:boolean | optional |
init (deprecated since version 1.6.3) |
If true, the memory region shall not be zero initialized. Default value is false. | xs:boolean | optional |
uninit (new since version 1.6.3) |
If true, the memory region shall be kept uninitialized (i.e. keep the memory state as is). Default value is false. | xs:boolean | optional |
alias (new since Version 1.4.0) | Reference to another memory (by it's 'name' attribute) which shares the same physical memory. Some physical memory is made accessible via different addresses, for example, cached vs. non-cached accesses. This avoids the impression that the device has twice as much memory available. | xs:string | optional |
The table lists identifiers for memory types.
id= | Description |
---|---|
RAMx | External RAM. x can have a value between 1..8 |
ROMx | External ROM. x can have a value between 1..8 |
IRAMx | Internal RAM. x can have a value between 1..8 |
IROMx | Internal ROM. x can have a value between 1..8 |
Table: Memory Access Attribute String
The table lists the letters and their meaning for use in the access attribute string. The values can be used in:
access= | Description |
---|---|
r | Readable |
w | Writable |
x | eXecutable |
p | Peripheral area. Details described in SVD. |
s | Secure attribute |
n | Non-secure attribute |
c | non-secure Callable attribute |
Specifies attributes of the device processor. The element can occur on various levels. The attributes add-up over the different levels (family -> subFamily -> device). Elements of multi-processor devices can be associated with a specific processor using the attribute <Pname>. If the information is relevant to all processors, no processor must be specified in <Pname>.
Example 1
Example 2
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
Pname | Processor identifier. This attribute is mandatory for devices that embed multiple processors. Each processor needs a unique identifier and must be used consistently in the Pname attribute of the elements within the scope of the current device family section. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | required for all multi-core devices |
Punits | Specifies the number of processor units in a symmetric multi-processor core (MPCore). Defaults to single-core CPU (1) when left empty. | InstancesType | required for all multi-core devices |
Dcore | Specifies the processor core. Use predefined values as listed in the table Device Cores. | DcoreEnum | required |
Dfpu | Specifies whether a hardware Floating Point Unit is present in the processor. Use predefined values as listed in the table Device FPU. | DfpuEnum | required |
Dmpu | Specifies whether a Memory Protection Unit is present in the processor. Use predefined values as listed in the table Device MPU. | DmpuEnum | required |
Dtz | Specifies whether an Armv8-M based device implements TrustZone. Use predefined values as listed in the table Device TZ. | DtzEnum | required for ARMv8-M based devices |
Ddsp | Specifies whether a device supports the DSP instructions set. Use predefined values as listed in the table Device DSP. | DdspEnum DdspEnum | required |
Dmve | Specifies whether a device supports the M-Profile Vector instruction set extension. Use predefined values as listed in the table Device MVE. | DmveEnum DmveEnum | required for ARMv8.1-M based devices |
Dcdecp | Specifies whether a device implements Custom Datapath Extension Coprocessors and which coprocessor interfaces can be used. See (CDE). Possible values are explained in Custom Datapath Extensions. | Hex8BitType | required for ARMv8.1-M based devices with CDE support |
Dendian | Specifies the endianess of the processor. Use predefined values as listed in the table Endinaness. | DendianEnum | required |
Dclock | Specifies the max clock frequency of the processor subsystem | xs:unsignedInt | required |
DcoreVersion | Hardware revision of the processor core | xs:string | required |
The table lists predefined values representing device vendors. The list is extended from time to time (on request by new vendors). Contact cmsis to ask for an extension. These values can be used in the elements: @arm .com
Dvendor | Description | Web Link |
---|---|---|
ABOV Semiconductor:126 | ABOV Semiconductor | http://www.abov.co.kr/en/ |
Active-Semi:140 | Active-Semi | http://www.active-semi.com |
Alif Semiconductor:165 | Alif Semiconductor | http://www.alifsemi.com |
Ambiq Micro:120 | Ambiq Micro | http://www.ambiqmicro.com |
Amiccom:147 | Amiccom | http://www.amiccom.com.tw |
Analog Devices:1 | Analog Devices | http://www.analog.com |
APEXMIC:153 | Apex Microeletronics Co., Ltd. | http://www.apexmic.com |
ARM:82 | ARM Ltd. | http://www.arm.com |
ArmChina:160 | Arm China | http://www.armchina.com |
ArteryTek:143 | ArteryTek | http://www.arterytek.com |
Atmel:3 | Atmel Corporation (now Microchip) | http://www.microchip.com |
Autochips:150 | Autochips Inc. | http://www.autochips.com/index_en.aspx |
BrainChip:168 | BrainChip Inc | https://brainchipinc.com |
Cmsemicon:161 | Cmsemicon | http://www.mcu.com.cn |
CSR:118 | CSR | http://www.csr.com |
Cypress:19 | Cypress Semiconductor | http://www.cypress.com |
Dialog Semiconductor:113 | Dialog Semiconductor | http://www.dialog-semiconductor.com |
ELAN:162 | ELAN | http://www.emc.com.tw |
Elmos Semiconductor AG:138 | Elmos Semiconductor AG | http://www.elmos.com |
e-peas:167 | e-peas semicondcutors | https://e-peas.com |
EtaCompute:157 | Eta Compute Inc. | https://www.etacompute.com |
Geehy:163 | Geehy | https://www.geehy.com/ |
Generic:5 | Generic: Not a vendor specific device | |
Generalplus:151 | Generalplus Technology Inc. | http://www.generalplus.com |
GigaDevice:123 | GigaDevice | http://www.gigadevice.com |
Goodix:155 | Goodix | https://www.goodix.com |
HDSC:145 | HUADA Semiconductor | http://www.hdsc.com.cn |
Hilscher:88 | Hilscher Gesellschaft für Systemautomation mbH | http://www.hilscher.com |
Holtek:106 | Holtek Microelectronics | http://www.holtek.com.tw |
Infineon:7 | Infineon Technologies | http://www.infineon.com |
LAPIS Technology:10 | LAPIS Technology | http://www.lapis-tech.com |
Linear Technolgy:136 | Linear Technolgy | http://www.linear.com/ |
Maxim:23 | Maxim Integrated | http://www.maximintegrated.com |
MediaTek:129 | MediaTek | http://www.mediatek.com |
MegaChips:128 | MegaChips | http://www.megachips.com |
Megawin:70 | Megawin | http://www.megawin.com.tw |
Microchip:3 | Microchip (previously Atmel) | http://www.microchip.com |
MicroSemi:112 | Microsemi | http://www.microsemi.com |
Milandr:99 | Milandr | http://www.milandr.ru |
MindMotion:132 | MindMotion | http://www.mindmotion.com.cn |
Nordic Semiconductor:54 | Nordic Semiconductor | http://www.nordicsemi.com |
Nuvoton:18 | Nuvoton Technolgy Corp. | http://www.nuvoton.com |
NXP:11 | NXP | http://www.nxp.com |
ONSemiconductor:141 | ON Semiconductor | https://www.onsemi.com |
Panasonic:131 | Panasonic | http://www.panasonic.com/industrial |
Realtek Semiconductor:124 | Realtek Semiconductor | http://www.realtek.com |
Redpine Signals:125 | Repine Signals | http://www.redpinesignals.com |
RelChip:146 | RelChip | http://www.relchip.com/ |
Renesas:117 | Renesas | http://www.renesas.com |
ROHM:103 | ROHM | http://www.rohm.com |
Samsung:47 | Samsung Semiconductor | http://www.samsung.com |
SILAN:164 | Hangzhou Silan Microelectronics Co., Ltd. | http://www.silan.com.cn/ |
Silergy Corp:139 | Silergy Corporation | http://silergy.com/ |
Silicon Labs:21 | Silicon Labs | http://www.silabs.com |
Sinowealth:149 | Sino Wealth Electronic Ltd. | http://www.sinowealth.com |
SmartChip:156 | SmartChip | |
Spansion:100 | Spansion (previously Fujitsu) | http://www.spansion.com |
STMicroelectronics:13 | STMicroelectronics | http://www.st.com |
Synwit:144 | Synwit Technology Co.,LTD. | http://www.synwit.cn |
Texas Instruments:16 | Texas Instruments | http://www.ti.com |
Toshiba:92 | Toshiba Semiconductor | http://toshiba.semicon-storage.com |
Triad Semiconductor:104 | Triad Semiconductor | http://www.triadsemi.com |
Unisoc:152 | Unisoc Communications, Inc. | http://www.unisoc.com |
Vorago:137 | Vorago Technologies | http://www.voragotech.com |
Weltrend:148 | Weltrend | http://www.weltrend.com.tw |
WIZnet:122 | WIZnet | http://www.wiznet.co.kr |
Xiamen PengPai Microelectronics Co. Ltd:166 | Pai IC | https://www.pai-ic.com |
Xinnova:135 | Xinnova Technology | (n/a) |
XMC:158 | Wuhan Xinxin Semiconductor Manufacturing Co., Ltd. | http://www.xmcwh.com/ |
Zilog:89 | Zilog | http://zilog.com/ |
The table lists the predefined Flash algorithm style. These values can be used in:
style= | Description |
---|---|
Keil | Flash Programming as defined by Arm/Keil |
IAR | Flash Programming Algorithm as defined by IAR |
CMSIS | To be agreed under CMSIS |
The table lists available device cores. The list is extended from time to time to reflect new processor cores. These values can be used in the elements:
Dcore= | Description |
---|---|
Cortex-M0 | Arm Cortex-M0 processor based device |
Cortex-M0+ | Arm Cortex-M0+ processor based device |
Cortex-M1 | Arm Cortex-M1 processor based device |
Cortex-M3 | Arm Cortex-M3 processor based device |
Cortex-M4 | Arm Cortex-M4 processor based device |
Cortex-M7 | Arm Cortex-M7 processor based device |
Cortex-M23 | Arm Cortex-M23 processor based device |
Cortex-M33 | Arm Cortex-M33 processor based device |
Cortex-M35P | Arm Cortex-M35P processor based device |
Cortex-M55 | Arm Cortex-M55 processor based device |
SC000 | SecurCore SC000 based on technology of Cortex-M0. |
SC300 | SecurCore SC300 based on technology of Cortex-M3. |
ARMV8MBL | Processor ArmV8MBL compliant with the Armv8-M Baseline Architecture. |
ARMV8MML | Processor ArmV8MML compliant with the Armv8-M Mainline Architecture. |
Cortex-R4 | Arm Cortex-R4 processor based device |
Cortex-R5 | Arm Cortex-R5 processor based device |
Cortex-R7 | Arm Cortex-R7 processor based device |
Cortex-R8 | Arm Cortex-R8 processor based device |
Cortex-A5 | Arm Cortex-A5 processor based device |
Cortex-A7 | Arm Cortex-A7 processor based device |
Cortex-A8 | Arm Cortex-A8 processor based device |
Cortex-A9 | Arm Cortex-A9 processor based device |
Cortex-A15 | Arm Cortex-A15 processor based device |
Cortex-A17 | Arm Cortex-A17 processor based device |
Cortex-A32 | Arm Cortex-A32 processor based device |
Cortex-A35 | Arm Cortex-A35 processor based device |
Cortex-A53 | Arm Cortex-A53 processor based device |
Cortex-A57 | Arm Cortex-A57 processor based device |
Cortex-A72 | Arm Cortex-A72 processor based device |
Cortex-A73 | Arm Cortex-A73 processor based device |
* | Device based on any processor |
The table lists values that indicate whether a CPU has an Floating Point Unit (FPU). The tokens can be used in the elements:
Dfpu= | Description |
---|---|
NO_FPU | Hardware Floating Point Unit not present |
FPU | Hardware Floating Point Unit present |
SP_FPU | Single Precision Hardware Floating Point Unit present |
DP_FPU | Double Precision Hardware Floating Point Unit present |
The table shows predefined values that identify whether a CPU has an Memory Protection Unit (MPU). The values can be used in the elements:
Dmpu= | Description |
---|---|
MPU | Memory Protection Unit is present |
NO_MPU | No Memory Protection Unit is present |
The table shows predefined values that identify whether a CPU implements TrustZone(TZ). The values can be used in the elements:
Dtz= | Description |
---|---|
TZ | TrustZone is present |
NO_TZ | No TrustZone is present |
Table: Software Model Selection
The table shows predefined values that identify whether an application will run in secure mode. The values can be used in the elements:
Dsecure= | Description |
---|---|
Secure | Application is built to run in secure mode. |
Non-secure | Application is built to run in non-secure mode. |
TZ-disabled | Application is built with TrustZone security disabled. |
Table: Device implements DSP Instructions
The table shows predefined values that identify whether a CPU implements DSP instructions (DSP). The values can be used in the elements:
Ddsp= | Description |
---|---|
DSP | DSP instructions supported |
NO_DSP | No DSP instructions supported |
Table: Device implements M-Profile Vector Extension Instructions
The table shows predefined values that identify whether a CPU implements MVE instructions (MVE). The values can be used in the elements:
Dmve= | Description |
---|---|
NO_MVE | No MVE instructions supported |
MVE | Integer MVE instructions supported |
FP_MVE | Floating point and Integer MVE instructions supported |
Table: Custom Datapath Extensions
The table lists values representing Custom Datapath Extensions in a device. The values can be used in the elements:
Dcdecp= | Description |
---|---|
BitN = 0 | CDE co-processor interface disabled at BitN. |
BitN = 1 | CDE co-processor interface enabled at BitN. |
Examples:
The table lists values representing the endianness of a device. The values can be used in the elements:
Dendian= | Description |
---|---|
Little-endian | The least significant byte of a multi-byte access is located at the specified address. |
Big-endian | The most significant byte of a multi-byte access is located at the specified address. |
Configurable | The byte ordering of multi-byte accesses is configurable. |
Default debugger configuration for a target connection.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
default | Specifies the default debug protocol to use for target connections. Predefined tokens must be used as defined in Table: Debug Protocol Type. Default value is swd. | DebugProtocolEnum | optional |
clock | Specifies the default debug clock setting in Hz for a target connection. Default value is 10000000. | xs:unsignedInt | optional |
swj | The device is accessed via a CoreSight SWJ-DP capable of switching between Serial Wire Debug (SWD) and JTAG protocols. Default value is true. | xs:bool | optional |
dormant | The device is accessed via a CoreSight DP that requires the dormant state to switch debug protocols. Default value is false. | xs:bool | optional |
sdf | This attribute specifies the filename and path of the system description file (SDF). The system description file contains information about CoreSight components, there versions and how they are interconnected and hooked to debug and access ports. If not specified an autodetection needs to be initiated by the debugger at connection time. | xs:string | optional |
The table lists the values for debug protocol types. The values can be used in
type= | Description |
---|---|
jtag | JTAG debug protocol. |
swd | Arm Serial Wire Debug (SWD) protocol. |
cjtag | CJTAG concurrent jtag debug protocol. |
Specify global debug access variables. Use these in addition to the pre-defined variables in order to query settings from a debug access sequences.
Define debug access variables with statements of the following form.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
configfile | Configuration file with path relative to the package base folder (extension *.DBGCONF). This file contains assignments of a default value to global debug access variables. This file gets copied to the project folder and is editable by the end-user. This file is read by the debugger after processing the global debug access variables. By editing the values of the debug access variables, the end-user effectively controls the behavior of sequences. The file can only assign new values but must not specify any new debug access variables. Configuration Wizard Annotations shall be used within the file to provide a graphical user interface for editing configuration options. | xs:string | optional |
version | Version refers to the file version of the configfile attribute. If a configfile is specified the version attribute becomes mandatory. The version shall be incremented if any changes have been made to the global debug access variable names or default values. Based on the version information the tool environment will load a configfile with the version required by the debug description. The end-user may be required to update the settings after updating to a new version. | VersionType | optional |
Pname | Reference to a processor identifier as specified for a processor element. If Pname is set for this debugvars element, the debug access variables and configfile of this element are only valid for a debug connection to the referenced processor. Otherwise, they are valid for all processors. This attribute must be set if defining multiple debugvars sections for a device. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
Example: Configuration File
Describes a CoreSight debug port of the device and its capabilities. The element can occur on various levels. Use unique ID values for the attribute __dp to distinguish multiple debugport elements in later references.
debugport elements are required for targets with multiple debug ports. These elements can be omitted for devices with a single debug port. If no debugport element exists, then the only allowed __dp ID in later references is 0.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
__dp | Unique ID of this debugport. It must be used consistently in references within the scope of the parent section. | xs:unsignedInt | required |
Child Elements | Description | Type | Occurrence |
jtag | Describe JTAG Test Access Port (TAP) properties of this debug port. | JtagType | 0..1 |
swd | Describe CoreSight Serial Wire Debug Port (SW-DP) properties of this debug port. | SwdType | 0..1 |
cjtag | Describe CJTAG Test Access Port (TAP) properties of this debug port. | CjtagType | 0..1 |
Describes a CoreSight access port (APv1) of the device and its selection parameters. The element can occur on various levels. Use unique ID values for the attribute __apid to distinguish multiple accessportV1 and accessportV2 elements in later references.
accessportV1 elements are required for targets that mix ADIv5 and ADIv6 debug ports and hence also have APv2 access ports. Pairs of __dp and __ap values must not be used to reference an access port if a debug description describes access port elements.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
__apid | Unique ID of this element with respect to other access port elements. It must be used consistently in references within the scope of the parent section. | xs:unsignedInt | required |
__dp | Unique ID of the debugport used to access this access port. Optional if exactly one debugport exists. | xs:unsignedInt | optional |
index | The index to select this access port for a target access. | xs:unsignedInt | required |
Describes a CoreSight access port (APv2) of the device as introduced with the Arm Debug Interfaces (ADI) v6 and its selection parameters. The element can occur on various levels. Use unique ID values for the attribute __apid to distinguish multiple accessportV1 and accessportV2 elements in later references.
An accessportV2 must be later selected via __apid. It is not possible to use a pair of __dp and __ap values.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
__apid | Unique ID of this element with respect to other access port elements. It must be used consistently in references within the scope of the parent section. | xs:unsignedInt | required |
__dp | Unique ID of the debugport used to access this access port. Optional if exactly one debugport exists. | xs:unsignedInt | optional |
address | The address to select this access port in its parent's address space for a target access. | xs:unsignedInt | required |
parent | Reference to the __apid of the parent access port if the system contains nested APv2 access ports. parent must not be specified if the access port is directly connected to the debugport. | xs:unsignedInt | optional |
Indicates availability of a JTAG interface for the debugport parent element. Its attributes allow the manual override of a debugger's automatic JTAG Test Access Port (TAP) detection.
Example
Parents | Element Chain | ||
---|---|---|---|
debugport | /package/devices/family/.../debugport | ||
Attributes | Description | Type | Use |
tapindex | Specifies the TAP index relative to the JTAG scan chain of this device. A debugger needs to determine the absolute index if the device is part of an extended scan chain. Default value is 0. | NonNegativeInteger | optional |
idcode | Specifies the IDCODE of the JTAG TAP. This value overrides the IDCODE read from the target. | NonNegativeInteger | optional |
irlen | Specifies the instruction register length of the JTAG TAP. This value overrides the instruction register length detected by a debugger. | xs:unsignedInt | optional |
Indicates availability of an Arm Serial Wire Debug (SWD) interface for the debugport parent element. Its attributes allow the manual override of SWD port characteristics as read from the target and provide information for the port selection in a system with multi-drop SWD support.
Example
Parents | Element Chain | ||
---|---|---|---|
debugport | /package/devices/family/.../debugport | ||
Attributes | Description | Type | Use |
idcode | Specifies the IDCODE of the SWD port. It overrides the value read from the port's IDCODE register. | NonNegativeInteger | optional |
Indicates availability of a CJTAG interface for the debugport parent element. Its attributes allow the manual override of a debugger's automatic CJTAG Test Access Port (TAP) detection.
Example
Parents | Element Chain | ||
---|---|---|---|
debugport | /package/devices/family/.../debugport | ||
Attributes | Description | Type | Use |
tapindex | Specifies the TAP index relative to the JTAG scan chain of this device. A debugger needs to determine the absolute index if the device is part of an extended scan chain. Default value is 0. | NonNegativeInteger | optional |
idcode | Specifies the IDCODE of the JTAG TAP. This value overrides the IDCODE read from the target. | NonNegativeInteger | optional |
irlen | Specifies the instruction register length of the JTAG TAP. This value overrides the instruction register length detected by a debugger. | xs:unsignedInt | optional |
Container for debug access sequences for this device.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Child Elements | Description | Type | Occurrence |
sequence | Describe a debug access sequence. | SequenceType | 1..* |
Describes a Debug Access Sequence which contains control and block elements. block elements contains statements including calls to Debug Access Functions. A Debug Access Sequence overrides or extends the default functionality of a development tool. Refer to Usage of debug access sequences for details.
Example
Parents | Element Chain | ||
---|---|---|---|
sequences | /package/devices/family/.../sequences | ||
Attributes | Description | Type | Use |
name | Name of the Debug Access Sequence:
| xs:string | required |
Pname | Reference to a processor identifier as specified for a processor element. If Pname is set for this sequence element, a debugger executes the debug access sequence only for a debug connection to the referenced processor. Otherwise, it is executed for all processors. This attribute must be set if defining multiple implementations of the same debug access sequence. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
disable | Disables execution of the Predefined Debug Access Sequence. | xs:boolean | optional |
info | Descriptive text to display for example for error diagnostics. | xs:string | optional |
Child Elements | Description | Type | Occurrence |
control | Describe a debug access sequence flow control element. | SequenceControlType | 0..* |
block | Describe a block of debug accesses. | SequenceBlockType | 0..* |
Describes flow control like if and while blocks for debug access sequences.
Example
Parents | Element Chain | ||
---|---|---|---|
sequence | /package/devices/family/.../sequences/sequence | ||
control | /package/devices/family/.../sequences/sequence/control | ||
Attribute | Description | Type | Use |
if | Expression describing the condition under which to execute this sequence block. The block is skipped if the condition resolved to false. Defaults to true if not set. Refer to Expression Rules for the syntax. | ExpressionType | optional |
while | Expression describing a while-condition. The execution of the block contents is repeated while the condition resolves to true, or until an optional timeout is reached. Refer to Expression Rules for the syntax. | ExpressionType | optional |
timeout | Timeout in microseconds for a block with a while condition. A debugger must extend the timeout to the closest possible time granularity. If the timeout is reached, the current iteration including a last evaluation of the while condition must finish. A value of 0 disables the timeout. This attribute defaults to 0. | xs:unsignedInt | optional |
info | Descriptive text to display for example for error diagnostics. | xs:string | optional |
Child Elements | Description | Type | Occurrence |
control | Describe a debug access sequence flow control element. | SequenceControlType | 0..* |
block | Describe a block of debug accesses. | SequenceBlockType | 0..* |
Describes a block of debug accesses. See Debug Access Syntax Rules for details on the allowed syntax of the block contents.
Example
Parents | Element Chain | ||
---|---|---|---|
sequence | /package/devices/family/.../sequences/sequence | ||
control | /package/devices/family/.../sequences/sequence/control | ||
Attribute | Description | Type | Use |
atomic | Instruct the debugger to execute the block contents atomically; a debugger needs to download and buffer all debug accesses to the debug probe and finish the execution without further communication to the host PC. If a debugger cannot support an atomic block it must abort the execution of the debug access sequence. | xs:boolean | optional |
info | Descriptive text to display for example for error diagnostics. | xs:string | optional |
Atomic Blocks:
Debug accesses are described in block elements of a debug access sequence (sequence element). The following syntax is used for this purpose:
Expressions are used in various places to describe one of the following:
An expression may consist of the following:
Describes configuration settings, default values, and patches for data accesses for a debug connection. Multiple debug elements can be defined which are either specific to a processor identified by attribute Pname, or which apply to all connections.
Example 1
Example 2
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
__dp | Default debug port ID to use for target accesses in this debug connection. The allowed values are defined in debugport elements for this device. If no debugport element exists, the only allowed value is 0. The debug access variable __dp is initialized to this value when entering a pre-defined debug access sequence because of a debug event. This attribute defaults to 0 if not set. Must not be used if accessportV1 or accessportV2 elements are specified. Use __apid instead. | xs:unsignedInt | optional |
__ap | Default access port index to use for target accesses in this debug connection. The debug access variable __ap is initialized to this value when entering a pre-defined debug access sequence because of a debug event. This attribute defaults to 0 if not set. Must not be used if accessportV1 or accessportV2 elements are specified. Use __apid instead. | xs:unsignedInt | optional |
__apid | Default access port ID to use for target accesses in this debug connection. The debug access variable __apid is initialized to this value when entering a pre-defined debug access sequence because of a debug event. Requires accessportV1 and/or accessportV2 elements to be specified. | xs:unsignedInt | optional |
address | Base "address" of the CPU debug block referenced by "Pname" (and "Punit" in an MPCore system). Use in combination with attributes "__dp" and "__ap", or "__apid" respectively. Mandatory if multiple CPU debug blocks are accessible via a single AP. Optional if an AP hosts a single CPU debug block. Then a debugger can determine its base address by analyzing the ROM table behind the selected AP. | NonNegativeInteger | optional |
svd | The system viewer description (*.SVD) file to load for this debug connection. The file path is relative to the package base folder. | xs:string | optional |
Pname | Reference to a processor identifier as specified for a processor element. If Pname is set this debug element's settings and data patches only apply for target connections to the referenced processor. Otherwise, they apply for all processors. This attribute must be set if defining multiple debug elements within the same section. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
Punit | Use "Punit" in addition to "Pname" to select a specific processor unit of a symmetric MPCore that the <debug> configuration applies to. "Punit" is a '0'-based index and must be less than "Punits" of <processor>. If "Punit" is not specified, the <debug> configuration applies to all processor units of the MPCore. | xs:unsignedInt | optional |
defaultResetSequence | Specifies the debug sequence that shall be used by default for the reset operation. It can be set to one of the predefined reset sequences such as ResetSystem, ResetHardware and ResetProcessor or also to any user-defined debug sequence. If not specified then ResetSystem sequence will be set as default. | xs:string | optional |
Child Elements | Description | Type | Occurrence |
datapatch | Define a patch to apply for data reads in this debug connection. | DataPatchType | 0..* |
Describes a patch a debugger shall apply when reading data from the device.
Example
Parents | Element Chain | ||
---|---|---|---|
debug | /package/devices/family/.../debug | ||
Attributes | Description | Type | Use |
type | The type of data access to patch. Predefined tokens must be used as defined in Table: Data Patch Access Type. This attribute defaults to Mem if not set. | DataPatchAccessTypeEnum | optional |
address | The address for which to apply the patch. For an AP data patch for an APv2 as referenced by __apid, the address is the APv2 register offset added to the APv2's base address defined in the corresponding accessportV2 element. It must within the 4-KByte address range of the APv2 block. | NonNegativeInteger | required |
__dp | The debug port ID to apply the patch for. The allowed values are defined by the __dp attribute of debugport elements for this device. If no debugport element exists, the only allowed value is 0. If this attribute is not set, the debug port ID for the data patch is set to the default __dp of this debug section. If accessportV1 or accessportV2 elements are specified then this attribute is only allowed for DP and ACCESS_AP accesses. Use __apid for all others. | xs:unsignedInt | optional |
__ap | The CoreSight access port index to apply the patch for. If this attribute is not set, the access port index for the data patch is set to the default __ap of this debug section. Must not be used if accessportV1 or accessportV2 elements are specified. Use __apid instead. | xs:unsignedInt | optional |
__apid | The unique ID of a CoreSight access port to apply the patch for. Requires accessportV1 and/or accessportV2 elements to be specified. If this attribute is not set, the access port ID for the data patch is set to the default __apid of this debug section. | xs:unsignedInt | optional |
value | The value with which the debugger patches the data access. value is specified in little-endian format. | NonNegativeInteger | required |
mask | The bits of the data access to patch. The mask value is specified in little-endian format. | NonNegativeInteger | optional |
info | Descriptive text to display for example for error diagnostics. | xs:string | optional |
The table lists the allowed values for data patch access types.
type= | Description |
---|---|
DP | CoreSight Debug Port register access. Note: This type refers to accesses via the DPACC instruction for CoreSight JTAG-DPs. Please refer to the corresponding documentation for differences in the register interface between JTAG and Serial Wire debug ports. |
ACCESS_AP | Top-level Access Port access for a CoreSight ADIv6 DAP. |
AP | CoreSight Access Port register access. |
Mem | Memory access. |
Describes device capabilities and possible configuration settings for capturing trace. Multiple trace elements can be defined which are either specific to a processor identified by attribute Pname, or which apply to all connections.
Example
Parents | Element Chain | ||
---|---|---|---|
family | /package/devices/family | ||
subFamily | /package/devices/family/subFamily | ||
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
Pname | Reference to a processor identifier as specified for a processor element. If Pname is set this trace section only applies for target connections to the referenced processor. Otherwise, it applies for all processors. This attribute must be set if defining multiple trace elements within the same section. Only alphabetical characters, decimal digits, '-' and '_' are allowed. | RestrictedString | optional |
Child Elements | Description | Type | Occurrence |
serialwire | Describe the serial wire trace output capabilities of the processor. | SerialWireType | 0..* |
traceport | Describe the parallel trace port output capabilities of the processor. | TracePortType | 0..* |
tracebuffer | Describe the on-device trace buffer capabilities of the processor. | TraceBufferType | 0..* |
Indicates serial wire trace output capabilities of the specified processor.
Example
Parents | Element Chain | ||
---|---|---|---|
trace | /package/devices/family/.../trace |
Indicates parallel trace port output capabilities of the specified processor. This element describes possible configuration settings for capturing trace.
Example
Parents | Element Chain | ||
---|---|---|---|
trace | /package/devices/family/.../trace | ||
Attributes | Description | Type | Use |
width | Parallel trace port widths supported for the processor connection (see table below). | NonNegativeInteger | optional |
The attribute width specifies the available trace port width that is supported by the device. Each bit of this value represents an available trace port size. If bit n is set a trace port width of n+1 is supported. The value width=0x00008088 (as shown in the table) indicates that three port sizes (16-bit, 8-bit, and 4-bit) are supported by the device.
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
width | 32 | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 |
Value | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
Indicates on-device trace buffer capabilities of the specified processor. This element describes possible configuration settings for capturing trace and reading it from the buffer.
Example
Parents | Element Chain | ||
---|---|---|---|
trace | /package/devices/family/.../trace | ||
Attributes | Description | Type | Use |
start | Start address of the on-chip memory used as trace buffer for a supported configuration. | NonNegativeInteger | optional |
size | Size of the on-chip memory used as trace buffer in bytes for a supported configuration. | NonNegativeInteger | optional |
Defines a device variant. The element is optional. Can exist multiple times.
Example
Parents | Element Chain | ||
---|---|---|---|
device | /package/devices/family/../device | ||
Attributes | Description | Type | Use |
Dvariant | May get replaced by 'Dname' in the future. Name of the device on the variant level. This effectively overwrites the device name specified on the device level. Once a device section contains a variant section, only the variant elements describe a 'selectable' device which can be selected in the tools. The Dname of the device level effectively becomes a group name like the Dfamily and DsubFamily attributes. Only alphabetical characters, decimal digits, '-' and '_' are allowed | RestrictedStringDname | required |
Dname | future. Name of the device on the variant level. Only alphabetical characters, decimal digits, '-' and '_' are allowed | RestrictedStringDname | required |
Child Elements | Description | Type | Occurrence |
processor | Specify processors that are specific to this device. | ProcessorType | 0..* |
debugconfig | Specify default settings for the debug connection specific to this device. | DebugConfigType | 0..1 |
compile | Specify compile or translate options specific to this device. | CompileType | 0..* |
memory | Specify memory areas that specific to this device. | MemoryType | 0..* |
algorithm | Specify Flash programming algorithms that can be used by this device. | AlgorithmType | 0..* |
book | Specify documents specific to this device. | BookType | 0..* |
description | Description specific to this device. | DescriptionType | 0..* |
feature | Specify the features of this device. | FeatureType | 0..* |
environment | Specify tool options. | EnvironmentType | 0..* |
debugport | Describe a debug port specific to this device. | DebugPortType | 0..* |
accessportV1 | Describe an access port (APv1) specific to this device. | AccessPortV1Type | 0..* |
accessportV2 | Describe an access port (APv2) specific to this device. | AccessPortV2Type | 0..* |
debug | Specify debug options specific to this device. | DebugType | 0..* |
trace | Specify trace options specific to this device. | TraceType | 0..* |
debugvars | Define debug access variables for user-defined settings specific to this device. | DebugVarsType | 0..1 |
sequences | Describe debug access sequences specific to this device. | SequencesType | 0..1 |