CMSIS-DAP  Version 2.1.1
Interface Firmware for CoreSight Debug Access Port
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Firmware for CoreSight Debug Access Port

CMSIS-DAP is a protocol specification and a implementation of a firmware that supports access to the CoreSight Debug Access Port (DAP).The various Arm Cortex processors provide CoreSight Debug and Trace. CMSIS-DAP supports target devices that contain one or more Cortex processors. A device provides a Debug Access Port (DAP) typically either with a 5-pin JTAG or with a 2-pin Serial Wired Debug (SWD) interface that connects to a debug unit. CMSIS-DAP is the interface firmware for a debug unit that connects the debug port to USB. Debuggers that execute on a host computer connect via USB and the Debug Unit to the device which runs the application software.


Benefits of CMSIS-DAP

  • Provides a standardized interface for debuggers. Interfaces to many standard debuggers is available.
  • Access to CoreSight registers of all Cortex processor architectures (Cortex-A/R/M).
  • Connects via 5-pin JTAG or 2-pin Serial Wire Debug (SWD).
  • Supports multi-core debugging.
  • Supports Serial Wire Output (SWO) of Cortex-M devices.
  • Easy to deploy to debug units based on Cortex-M microcontrollers.
  • Debug unit may be integrated on an evaluation board.
  • Using USB bulk transfers avoids driver installation on host PC.
  • Supports time-critical JTAG or SWD command execution.
  • Supports Test Domain Timer for time measurement using the debug unit.
  • Supports UART communication port, which can be routed to USB COM Port (optional) or native CMSIS-DAP commands (new in CMSIS-DAP Version 2.1.0).

CMSIS-DAP firmware

The CMSIS-DAP firmware is provided as source code and is fully configurable to a new debug unit. A source code template and several reference implementations for popular debug units are provided. Refer to Firmware configuration for more information.

The CMSIS-DAP firmware stack is composed of the following components:

  • CMSIS-DAP firmware that interfaces to JTAG or SWD pins using standard I/O pins of the Cortex-M device.
  • CMSIS-Driver USART that connects:
    • the UART of the Cortex-M device to the SWO output from the target.
    • an additional UART of the Cortex-M device to the UART from the target.
  • USB stack that interfaces to the USB port of the host computer using:
    • a custom class (for USB bulk endpoints),
    • the CDC ACM class to export USB COM Port.
  • The USB Device middleware may require CMSIS-RTOS and a CMSIS-Driver USB.

In the examples provided, the MDK-Middleware USB stack has been used. However, it is possible to use alternative USB stacks.

  • CMSIS-DAP v1.x is deprecated and not recommended for new designs.
  • Use CMSIS-DAP v2.x instead that provides high-speed SWO trace streaming and does not require driver installation in modern operating systems (Mac OS, Linux, Windows). Refer to Installing CMSIS-DAP enabled debug adapters for more information.


CMSIS-DAP compliant debug units must be validated using the scripts provided in Validate the debug unit operation.

The CMSIS-DAP firmware is provided in the following directory structure.

Directory Description
.\CMSIS\DAP\Firmware\Config CMSIS-DAP firmware configuration
.\CMSIS\DAP\Firmware\Examples CMSIS-DAP firmware adapted to various debug units
.\CMSIS\DAP\Firmware\Include CMSIS-DAP firmware header file
.\CMSIS\DAP\Firmware\Source CMSIS-DAP firmware source code
.\CMSIS\DAP\Firmware\Template Interface templates for MDK-Middleware
.\CMSIS\DAP\Firmware\Validation Validation project