CMSIS-Driver
Version 2.8.0
Peripheral Interface for Middleware and Application Code
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Specify the data bus width. More...
Macros | |
#define | ARM_MCI_BUS_DATA_WIDTH_1 (0x00UL) |
Bus data width: 1 bit (default) More... | |
#define | ARM_MCI_BUS_DATA_WIDTH_4 (0x01UL) |
Bus data width: 4 bits. More... | |
#define | ARM_MCI_BUS_DATA_WIDTH_8 (0x02UL) |
Bus data width: 8 bits. More... | |
#define | ARM_MCI_BUS_DATA_WIDTH_4_DDR (0x03UL) |
Bus data width: 4 bits, DDR (Dual Data Rate) - MMC only. More... | |
#define | ARM_MCI_BUS_DATA_WIDTH_8_DDR (0x04UL) |
Bus data width: 8 bits, DDR (Dual Data Rate) - MMC only. More... | |
Specify the data bus width.
The function ARM_MCI_Control with control = ARM_MCI_BUS_DATA_WIDTH specifies with arg the number of data I/O pins on the SD/MMC interface.
For high-speed memory cards, a 4-bit bus data width should be used (or 8-bit for eMMC). The data fields data_width_4 and data_width_8 of the structure ARM_MCI_CAPABILITIES encode whether the driver supports a specific bus data with.
The following codes are defined:
#define ARM_MCI_BUS_DATA_WIDTH_1 (0x00UL) |
Bus data width: 1 bit (default)
#define ARM_MCI_BUS_DATA_WIDTH_4 (0x01UL) |
Bus data width: 4 bits.
#define ARM_MCI_BUS_DATA_WIDTH_8 (0x02UL) |
Bus data width: 8 bits.
#define ARM_MCI_BUS_DATA_WIDTH_4_DDR (0x03UL) |
Bus data width: 4 bits, DDR (Dual Data Rate) - MMC only.
#define ARM_MCI_BUS_DATA_WIDTH_8_DDR (0x04UL) |
Bus data width: 8 bits, DDR (Dual Data Rate) - MMC only.