CMSIS-Driver: Ethernet PHY Mode

CMSIS-Driver

Peripheral Interface for Middleware and Application Code

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Specify operation modes of the Ethernet PHY interface. More...

Macros
#define	ARM_ETH_PHY_SPEED_10M (ARM_ETH_SPEED_10M << ARM_ETH_PHY_SPEED_Pos)
	10 Mbps link speed

#define	ARM_ETH_PHY_SPEED_100M (ARM_ETH_SPEED_100M << ARM_ETH_PHY_SPEED_Pos)
	100 Mbps link speed

#define	ARM_ETH_PHY_SPEED_1G (ARM_ETH_SPEED_1G << ARM_ETH_PHY_SPEED_Pos)
	1 Gpbs link speed

#define	ARM_ETH_PHY_DUPLEX_HALF (ARM_ETH_DUPLEX_HALF << ARM_ETH_PHY_DUPLEX_Pos)
	Half duplex link.

#define	ARM_ETH_PHY_DUPLEX_FULL (ARM_ETH_DUPLEX_FULL << ARM_ETH_PHY_DUPLEX_Pos)
	Full duplex link.

#define	ARM_ETH_PHY_AUTO_NEGOTIATE (1UL << 3)
	Auto Negotiation mode.

#define	ARM_ETH_PHY_LOOPBACK (1UL << 4)
	Loop-back test mode.

#define	ARM_ETH_PHY_ISOLATE (1UL << 5)
	Isolate PHY from MII/RMII interface.

Description

Specify operation modes of the Ethernet PHY interface.

Macro Definition Documentation

◆ ARM_ETH_PHY_SPEED_10M

#define ARM_ETH_PHY_SPEED_10M (ARM_ETH_SPEED_10M << ARM_ETH_PHY_SPEED_Pos)

10 Mbps link speed

See also: ARM_ETH_PHY_SetMode

◆ ARM_ETH_PHY_SPEED_100M

#define ARM_ETH_PHY_SPEED_100M (ARM_ETH_SPEED_100M << ARM_ETH_PHY_SPEED_Pos)

100 Mbps link speed

See also: ARM_ETH_PHY_SetMode

◆ ARM_ETH_PHY_SPEED_1G

#define ARM_ETH_PHY_SPEED_1G (ARM_ETH_SPEED_1G << ARM_ETH_PHY_SPEED_Pos)

1 Gpbs link speed

See also: ARM_ETH_PHY_SetMode

◆ ARM_ETH_PHY_DUPLEX_HALF

#define ARM_ETH_PHY_DUPLEX_HALF (ARM_ETH_DUPLEX_HALF << ARM_ETH_PHY_DUPLEX_Pos)

Half duplex link.

See also: ARM_ETH_PHY_SetMode

◆ ARM_ETH_PHY_DUPLEX_FULL

#define ARM_ETH_PHY_DUPLEX_FULL (ARM_ETH_DUPLEX_FULL << ARM_ETH_PHY_DUPLEX_Pos)

Full duplex link.

See also: ARM_ETH_PHY_SetMode

◆ ARM_ETH_PHY_AUTO_NEGOTIATE

#define ARM_ETH_PHY_AUTO_NEGOTIATE (1UL << 3)

Auto Negotiation mode.

See also: ARM_ETH_PHY_SetMode

◆ ARM_ETH_PHY_LOOPBACK

#define ARM_ETH_PHY_LOOPBACK (1UL << 4)

Loop-back test mode.

See also: ARM_ETH_PHY_SetMode

◆ ARM_ETH_PHY_ISOLATE

#define ARM_ETH_PHY_ISOLATE (1UL << 5)

Isolate PHY from MII/RMII interface.

See also: ARM_ETH_PHY_SetMode