Define values for MPU region setup. More...

Macros
#define	ARM_MPU_REGION_SIZE_xxx
	Size values of a MPU region (in RASR field)

#define	ARM_MPU_AP_xxx
	Values for MPU region access permissions (in RASR field)

#define	ARM_MPU_ACCESS_xxx
	Values for MPU region access attributes (in RASR field)

#define	ARM_MPU_CACHEP_xxx
	Cache policy values for MPU region access attributes (in RASR field)

Description

Define values for MPU region setup.

The following define values are used with ARM_MPU_RASR to setup the RASR value field in the MPU region.

Macro Definition Documentation

#define ARM_MPU_ACCESS_xxx

Values for MPU region access attributes (in RASR field)

The following define values are used to compose the access attributes for an MPU region:

#define	TEX	Shareable	Cacheable	Bufferable	Description
ARM_MPU_ACCESS_ORDERED	000b	1	0	0	Strongly ordered memory
ARM_MPU_ACCESS_DEVICE(S)	0s0b	S	0	S	Memory mapped peripheral device, shared (S=1) or non-shared (S=0)
ARM_MPU_ACCESS_NORMAL(O,I,S)	1BBb	S	A	A	Normal memory, with outer/inner cache policy (O/I=ARM_MPU_CACHEP_xxx, shared (S=1) or non-share (S=0)

#define ARM_MPU_AP_xxx

Values for MPU region access permissions (in RASR field)

The following define values are used to compose the access permission for an MPU region:

#define	Value	Access permissions
ARM_MPU_AP_NONE	0x0U	None: any access generates a permission fault.
ARM_MPU_AP_PRIV	0x1U	Privileged Read/Write: privileged access only; any unprivileged access generates a permission fault.
ARM_MPU_AP_URO	0x2U	Privileged Read/Write; Unprivileged Read-only: any unprivileged write generates a permission fault.
ARM_MPU_AP_FULL	0x3U	Privileged Read/Write. Unprivileged Read/Write: full access, permission faults are never generated.
ARM_MPU_AP_PRO	0x5U	Privileged Read-only: any unprivileged access or privileged write generates a permission fault.
ARM_MPU_AP_RO	0x6U	Privileged and Unprivileged Read-only: any write generates a permission fault.

#define ARM_MPU_CACHEP_xxx

Cache policy values for MPU region access attributes (in RASR field)

The following define values are used to compose the cacheability flags within the access attributes for an MPU region:

#define	Value	Cacheability policy
ARM_MPU_CACHEP_NOCACHE	00b	Non-cacheable
ARM_MPU_CACHEP_WB_WRA	01b	Write-back, write and read allocate
ARM_MPU_CACHEP_WT_NWA	10b	Write-through, no write allocate
ARM_MPU_CACHEP_WB_NWA	11b	Write-back, no write allocate

#define ARM_MPU_REGION_SIZE_xxx

Size values of a MPU region (in RASR field)

The following define values are used to compose the size information for an MPU region: