MPU Functions for Armv6-M/v7-M

Functions that relate to the Memory Protection Unit. More...

Content
	Define values
	Define values for MPU region setup.

Data Structures
struct	MPU_Type
	Structure type to access the Memory Protection Unit (MPU). More...
struct	ARM_MPU_Region_t
	Setup information of a single MPU Region. More...

Macros
#define	ARM_MPU_RBAR(Region, BaseAddress)
	MPU Region Base Address Register Value.
#define	ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size)
	MPU Region Attribute and Size Register Value.
#define	ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size)
	MPU Region Attribute and Size Register Value.

Functions
__STATIC_INLINE void	ARM_MPU_Enable (uint32_t MPU_CTRL)
	Enable the memory protection unit (MPU) and.
__STATIC_INLINE void	ARM_MPU_Disable ()
__STATIC_INLINE void	ARM_MPU_ClrRegion (uint32_t rnr)
__STATIC_INLINE void	ARM_MPU_SetRegion (uint32_t rbar, uint32_t rasr)
__STATIC_INLINE void	ARM_MPU_SetRegionEx (uint32_t rnr, uint32_t rbar, uint32_t rasr)
__STATIC_INLINE void	ARM_MPU_OrderedMemcpy (volatile uint32_t *dst, const uint32_t *__RESTRICT src, uint32_t len)
__STATIC_INLINE void	ARM_MPU_Load (MPU_Region_t const *table, uint32_t cnt)

Description

Functions that relate to the Memory Protection Unit.

The following functions support the optional Memory Protection Unit (MPU) that is available on the Cortex-M0+, M3, M4 and M7 processor.

The MPU is used to prevent from illegal memory accesses that are typically caused by errors in an application software.

Example:

int main() 
{
  // Set Region 0
  ARM_MPU_SetRegionEx(0UL, 0x08000000UL, ARM_MPU_RASR(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB));
  
  ARM_MPU_Enable(0);
  
  // Execute application code that is access protected by the MPU
  
  ARM_MPU_Disable();
}

Macro Definition Documentation

ARM_MPU_RASR

#define ARM_MPU_RASR	(		DisableExec,
			AccessPermission,
			TypeExtField,
			IsShareable,
			IsCacheable,
			IsBufferable,
			SubRegionDisable,
			Size
	)

MPU Region Attribute and Size Register Value.

This macro is used to construct a valid RASR value. The ENABLE bit of the RASR value is implicitly set to 1.

Parameters

DisableExec	Instruction access disable bit. 1 = disable instruction fetches.
AccessPermission	Data access permission configures read/write access for User and Privileged mode. Possible values see ARM_MPU_AP_xxx.
TypeExtField	Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
IsShareable	1 = region is shareable between multiple bus masters.
IsCacheable	1 = region is cacheable (values may be kept in cache).
IsBufferable	1 = region is bufferable (when using write-back caching). Cacheable but non-bufferable regions use write-through policy.
SubRegionDisable	Sub-region disable field (8 bits).
Size	Region size with values defined under ARM_MPU_REGION_SIZE_xxx.

ARM_MPU_RASR_EX

#define ARM_MPU_RASR_EX	(		DisableExec,
			AccessPermission,
			AccessAttributes,
			SubRegionDisable,
			Size
	)

MPU Region Attribute and Size Register Value.

This macro is used to construct a valid RASR value. The ENABLE bit of the RASR value is implicitly set to 1.

Parameters

DisableExec	Instruction access disable bit, 1= disable instruction fetches.
AccessPermission	Data access permission configures read/write access for User and Privileged mode. Possible values see ARM_MPU_AP_xxx.
AccessAttributes	Memory access attribution, see ARM_MPU_ACCESS_xxx.
SubRegionDisable	Sub-region disable field (8 bits).
Size	Region size with values defined under ARM_MPU_REGION_SIZE_xxx.

ARM_MPU_RBAR

#define ARM_MPU_RBAR	(		Region,
			BaseAddress
	)

MPU Region Base Address Register Value.

This preprocessor function can be used to construct a valid RBAR value. The VALID bit is implicitly set to 1.

Parameters

Region	The region to be configured, number 0 to 15.
BaseAddress	The base address for the region.

Function Documentation

ARM_MPU_ClrRegion()

__STATIC_INLINE void ARM_MPU_ClrRegion

(

uint32_t

rnr

)

Clear and disable the given MPU region.

Parameters

rnr	Region number to be cleared.

ARM_MPU_Disable()

__STATIC_INLINE void ARM_MPU_Disable

(

)

Disable the MPU.

ARM_MPU_Enable()

__STATIC_INLINE void ARM_MPU_Enable

(

uint32_t

MPU_CTRL

)

Enable the memory protection unit (MPU) and.

Parameters

MPU_CTRL

Additional control settings that configure MPU behaviour

The function ARM_MPU_Enable writes to the register MPU->CTRL and sets bit ENABLE. The parameter MPU_CTRL provides additional bit values (see table below) that configure the MPU behaviour. For processors that implement an MPU Fault Handler the MemoryManagement_IRQn exception is enabled by setting the bit MEMFAULTACT in register SBC->SHCSR.

The following table contains possible values for the parameter MPU_CTRL that set specific bits in register MPU->CTRL.

Bit	MPU_CTRL value	When applied	When not applied
1	MPU_CTRL_HFNMIENA_Msk	Enable MPU during hard fault, NMI, and FAULTMASK handlers execution	Disable MPU during hard fault, NMI, and FAULTMASK handler execution
2	MPU_CTRL_PRIVDEFENA_Msk	Enable default memory map as a background region for privileged access	Use only MPU region settings

Example:

// enable MPU with all region definitions. Exceptions are not protected by MPU.
  MPU_Enable (0);
  
// enable MPU with all region definitions and background regions for privileged access. Exceptions are protected by MPU.
  MPU_Enable (MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk);

ARM_MPU_Load()

__STATIC_INLINE void ARM_MPU_Load	(	MPU_Region_t const *	table,
		uint32_t	cnt
	)

Load the given number of MPU regions from a table.

Parameters

table	Pointer to the MPU configuration table.
cnt	Number of regions to be configured.

Note

only up to 16 regions can be handled as the function ARM_MPU_Load uses the REGION field in MPU->RBAR.

Example:

const ARM_MPU_Region_t mpuTable[3][4] = {
  {
    { .RBAR = ARM_MPU_RBAR(0UL, 0x08000000UL), .RASR = ARM_MPU_RASR(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB)  },
    { .RBAR = ARM_MPU_RBAR(1UL, 0x20000000UL), .RASR = ARM_MPU_RASR(1UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_32KB) },
    { .RBAR = ARM_MPU_RBAR(2UL, 0x40020000UL), .RASR = ARM_MPU_RASR(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0x00UL, ARM_MPU_REGION_SIZE_8KB)  }, 
    { .RBAR = ARM_MPU_RBAR(3UL, 0x40022000UL), .RASR = ARM_MPU_RASR(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0xC0UL, ARM_MPU_REGION_SIZE_4KB)  }
  },
  {
    { .RBAR = ARM_MPU_RBAR(4UL, 0x08000000UL), .RASR = ARM_MPU_RASR(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB)  },
    { .RBAR = ARM_MPU_RBAR(5UL, 0x20000000UL), .RASR = ARM_MPU_RASR(1UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_32KB) },
    { .RBAR = ARM_MPU_RBAR(6UL, 0x40020000UL), .RASR = ARM_MPU_RASR(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0x00UL, ARM_MPU_REGION_SIZE_8KB)  }, 
    { .RBAR = ARM_MPU_RBAR(7UL, 0x40022000UL), .RASR = ARM_MPU_RASR(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0xC0UL, ARM_MPU_REGION_SIZE_4KB)  }
  },
  {
    { .RBAR = ARM_MPU_RBAR(4UL, 0x18000000UL), .RASR = ARM_MPU_RASR(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB)  },
    { .RBAR = ARM_MPU_RBAR(5UL, 0x30000000UL), .RASR = ARM_MPU_RASR(1UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_32KB) },
    { .RBAR = ARM_MPU_RBAR(6UL, 0x50020000UL), .RASR = ARM_MPU_RASR(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0x00UL, ARM_MPU_REGION_SIZE_8KB)  }, 
    { .RBAR = ARM_MPU_RBAR(7UL, 0x50022000UL), .RASR = ARM_MPU_RASR(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0xC0UL, ARM_MPU_REGION_SIZE_4KB)  }
  }
};
 
void UpdateMpu(uint32_t idx)
{
   ARM_MPU_Load(mpuTable[idx], 4);
}

ARM_MPU_OrderedMemcpy()

__STATIC_INLINE void ARM_MPU_OrderedMemcpy	(	volatile uint32_t *	dst,
		const uint32_t *__RESTRICT	src,
		uint32_t	len
	)

Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_Load.

Parameters

dst	Destination data is copied to.
src	Source data is copied from.
len	Amount of data words to be copied.

ARM_MPU_SetRegion()

__STATIC_INLINE void ARM_MPU_SetRegion	(	uint32_t	rbar,
		uint32_t	rasr
	)

Configure an MPU region.

The region number should be contained in the rbar value.

Parameters

rbar	Value for RBAR register.
rasr	Value for RASR register.

ARM_MPU_SetRegionEx()

__STATIC_INLINE void ARM_MPU_SetRegionEx	(	uint32_t	rnr,
		uint32_t	rbar,
		uint32_t	rasr
	)

Configure the given MPU region.

Parameters

rnr	Region number to be configured.
rbar	Value for RBAR register.
rasr	Value for RASR register.