ArmNN
 24.02
RefElementwiseBinaryWorkload.cpp
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1 //
2 // Copyright © 2023 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
7 
8 #include "Decoders.hpp"
10 #include "Encoders.hpp"
11 #include "RefWorkloadUtils.hpp"
12 #include "Maximum.hpp"
13 #include "Minimum.hpp"
14 #include "SquaredDifference.hpp"
15 #include "Power.hpp"
16 
17 #include <Profiling.hpp>
18 
19 #include <armnn/TypesUtils.hpp>
20 
21 #include <functional>
22 
23 namespace armnn
24 {
25 
26 template<typename DataType>
27 void ExecuteFunction(std::vector<ITensorHandle*> inputs,
28  std::vector<ITensorHandle*> outputs,
29  BinaryOperation operation)
30 {
31  const TensorInfo& inputInfo0 = GetTensorInfo(inputs[0]);
32  const TensorInfo& inputInfo1 = GetTensorInfo(inputs[1]);
33  const TensorInfo& outputInfo = GetTensorInfo(outputs[0]);
34 
35  const TensorShape& inShape0 = inputInfo0.GetShape();
36  const TensorShape& inShape1 = inputInfo1.GetShape();
37  const TensorShape& outShape = outputInfo.GetShape();
38 
39  std::unique_ptr<Decoder<DataType>> input0 = MakeDecoder<DataType>(inputInfo0, inputs[0]->Map());
40  std::unique_ptr<Decoder<DataType>> input1 = MakeDecoder<DataType>(inputInfo1, inputs[1]->Map());
41  std::unique_ptr<Encoder<DataType>> output = MakeEncoder<DataType>(outputInfo, outputs[0]->Map());
42 
51 
52  switch (operation)
53  {
55  {
56  AddFunction(inShape0, inShape1, outShape, *input0, *input1, *output);
57  break;
58  }
60  {
61  DivFunction(inShape0, inShape1, outShape, *input0, *input1, *output);
62  break;
63  }
65  {
66  MaximumFunction(inShape0, inShape1, outShape, *input0, *input1, *output);
67  break;
68  }
70  {
71  MinimumFunction(inShape0, inShape1, outShape, *input0, *input1, *output);
72  break;
73  }
75  {
76  MulFunction(inShape0, inShape1, outShape, *input0, *input1, *output);
77  break;
78  }
80  {
81  SubFunction(inShape0, inShape1, outShape, *input0, *input1, *output);
82  break;
83  }
85  {
86  SqDiffFunction(inShape0, inShape1, outShape, *input0, *input1, *output);
87  break;
88  }
90  {
91  PowerFunction(inShape0, inShape1, outShape, *input0, *input1, *output);
92  break;
93  }
94  default:
95  {
96  throw InvalidArgumentException(std::string("Unsupported binary operation ") +
98  }
99  }
100 }
101 
103  const WorkloadInfo& info)
105 {}
106 
108 {
110 }
111 
113 {
114 
115  WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data);
116  Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs);
117 }
118 
119 void RefElementwiseBinaryWorkload::Execute(std::vector<ITensorHandle*> inputs,
120  std::vector<ITensorHandle*> outputs) const
121 {
122  ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID("RefElementwiseBinaryWorkload_Execute");
123 
124  if (GetTensorInfo(inputs[0]).GetDataType() == DataType::Signed32)
125  {
126  ExecuteFunction<int32_t>(inputs, outputs, m_Data.m_Parameters.m_Operation);
127  }
128  else
129  {
130  ExecuteFunction<float>(inputs, outputs, m_Data.m_Parameters.m_Operation);
131  }
132 }
133 
134 } // namespace armnn
armnn::GetBinaryOperationAsCString
constexpr char const * GetBinaryOperationAsCString(BinaryOperation operation)
Definition: TypesUtils.hpp:76
armnn::BinaryOperation::Mul
@ Mul
armnn::BinaryOperation::Add
@ Add
Minimum.hpp
armnn::experimental::ExecutionData::m_Data
void * m_Data
Definition: ExecutionData.hpp:16
TypesUtils.hpp
armnn::TensorInfo
Definition: Tensor.hpp:152
armnn::BinaryOperation::Sub
@ Sub
armnn::RefElementwiseBinaryWorkload::RefElementwiseBinaryWorkload
RefElementwiseBinaryWorkload(const ElementwiseBinaryQueueDescriptor &descriptor, const WorkloadInfo &info)
Definition: RefElementwiseBinaryWorkload.cpp:102
armnn::RefElementwiseBinaryWorkload::Execute
void Execute() const override
Definition: RefElementwiseBinaryWorkload.cpp:107
CHECK_LOCATION
#define CHECK_LOCATION()
Definition: Exceptions.hpp:203
Profiling.hpp
ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID
#define ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID(label)
Creates a profiling event that uses GetGuid() and GetName() from the calling class.
Definition: RefWorkloadUtils.hpp:22
armnn::ElementwiseBinaryFunction
Definition: ElementwiseFunction.hpp:15
armnn::TensorShape
Definition: Tensor.hpp:20
armnn::BinaryOperation::Maximum
@ Maximum
armnn::ElementwiseBinaryQueueDescriptor
Definition: WorkloadData.hpp:671
armnn::BinaryOperation::SqDiff
@ SqDiff
armnn::QueueDescriptorWithParameters::m_Parameters
LayerDescriptor m_Parameters
Definition: WorkloadData.hpp:66
RefElementwiseBinaryWorkload.hpp
armnn::ExecuteFunction
void ExecuteFunction(std::vector< ITensorHandle * > inputs, std::vector< ITensorHandle * > outputs, BinaryOperation operation)
Definition: RefElementwiseBinaryWorkload.cpp:27
armnn::WorkloadInfo
Contains information about TensorInfos of a layer.
Definition: WorkloadInfo.hpp:16
armnn::InvalidArgumentException
Definition: Exceptions.hpp:80
armnn::GetTensorInfo
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers
Definition: RefWorkloadUtils.hpp:33
armnn::BoostLogSeverityMapping::info
@ info
armnn::BinaryOperation::Power
@ Power
armnn::QueueDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkloadData.hpp:27
armnn::RefElementwiseBinaryWorkload::ExecuteAsync
void ExecuteAsync(ExecutionData &executionData) override
Definition: RefElementwiseBinaryWorkload.cpp:112
armnn::DataType::Signed32
@ Signed32
SquaredDifference.hpp
RefWorkloadUtils.hpp
armnn::BinaryOperation
BinaryOperation
Definition: Types.hpp:138
armnn::BaseWorkload< ElementwiseBinaryQueueDescriptor >::m_Data
ElementwiseBinaryQueueDescriptor m_Data
Definition: Workload.hpp:89
armnn::TensorInfo::GetShape
const TensorShape & GetShape() const
Definition: Tensor.hpp:193
ElementwiseFunction.hpp
armnn::ElementwiseBinaryDescriptor::m_Operation
BinaryOperation m_Operation
Specifies the elementwiseBinary operation to execute.
Definition: Descriptors.hpp:125
Decoders.hpp
Maximum.hpp
armnn::BinaryOperation::Minimum
@ Minimum
armnn::LayerType::Map
@ Map
armnn::experimental::WorkingMemDescriptor::m_Inputs
std::vector< ITensorHandle * > m_Inputs
Definition: WorkingMemDescriptor.hpp:20
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
armnn::experimental::WorkingMemDescriptor
Definition: WorkingMemDescriptor.hpp:18
Power.hpp
armnn::BinaryOperation::Div
@ Div
Encoders.hpp
armnn::RefBaseWorkload
Definition: RefBaseWorkload.hpp:13
armnn::experimental::WorkingMemDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkingMemDescriptor.hpp:21
armnn::QueueDescriptor::m_Inputs
std::vector< ITensorHandle * > m_Inputs
Definition: WorkloadData.hpp:26
armnn::experimental::ExecutionData
Definition: ExecutionData.hpp:14