ArmNN
 25.11
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RefConvolution3dWorkload.cpp
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1//
2// Copyright © 2021-2024 Arm Ltd and Contributors. All rights reserved.
3// SPDX-License-Identifier: MIT
4//
5
7
8#include "Conv3dImpl.hpp"
10
11#include "Profiling.hpp"
12
13namespace armnn
14{
16 const Convolution3dQueueDescriptor& descriptor, const WorkloadInfo& info)
18{
19 WorkloadInfo detailsInfo;
20 detailsInfo.m_InputTensorInfos = info.m_InputTensorInfos;
21 detailsInfo.m_OutputTensorInfos = info.m_OutputTensorInfos;
22
23 // Report Profiling Details
24 ARMNN_REPORT_PROFILING_WORKLOAD_DESC("RefConvolution3dWorkload_Construct",
25 descriptor.m_Parameters,
26 detailsInfo,
27 this->GetGuid());
28}
29
31{
32 Execute(m_Data.m_Inputs, m_Data.m_Outputs);
33}
34
35void RefConvolution3dWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
36{
37 ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID("RefConvolution3dWorkload_Execute");
38
39 std::unique_ptr<Decoder<float>> inputDecoder = MakeDecoder<float>(GetTensorInfo(inputs[0]), inputs[0]->Map());
40 std::unique_ptr<Encoder<float>> outputEncoder = MakeEncoder<float>(GetTensorInfo(outputs[0]), outputs[0]->Map());
41
42 const TensorShape& inputShape = GetTensorInfo(inputs[0]).GetShape();
43 const TensorShape& outputShape = GetTensorInfo(outputs[0]).GetShape();
44
45 const auto& filterInfo = GetTensorInfo(inputs[1]);
46 std::unique_ptr<Decoder<float>> filterDecoder = MakeDecoder<float>(GetTensorInfo(inputs[1]), inputs[1]->Map());
47 std::unique_ptr<Decoder<float>> biasDecoder;
48
50 {
51 biasDecoder = MakeDecoder<float>(GetTensorInfo(inputs[2]), inputs[2]->Map());
52 }
53
54 Convolve3d(inputShape, *inputDecoder, outputShape, *outputEncoder, filterInfo.GetShape(),
55 *filterDecoder, m_Data.m_Parameters.m_BiasEnabled, biasDecoder.get(),
60}
61
62} //namespace armnn
#define ARMNN_REPORT_PROFILING_WORKLOAD_DESC(name, desc, infos, guid)
#define ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID(label)
Creates a profiling event that uses GetGuid() and GetName() from the calling class.
RefBaseWorkload(const Convolution3dQueueDescriptor &descriptor, const WorkloadInfo &info)
RefConvolution3dWorkload(const Convolution3dQueueDescriptor &descriptor, const WorkloadInfo &info)
const TensorShape & GetShape() const
Definition Tensor.hpp:193
Copyright (c) 2021 ARM Limited and Contributors.
std::unique_ptr< Decoder< T > > MakeDecoder(const TensorInfo &info, const void *data=nullptr)
void Convolve3d(const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rFilterShape, Decoder< float > &rFilterDecoder, bool biasEnabled, Decoder< float > *pBiasDecoder, DataLayout dataLayout, unsigned int paddingTop, unsigned int paddingLeft, unsigned int paddingFront, unsigned int xStride, unsigned int yStride, unsigned int zStride, unsigned int xDilation, unsigned int yDilation, unsigned int zDilation)
std::unique_ptr< Encoder< T > > MakeEncoder(const TensorInfo &info, void *data=nullptr)
armnn::TensorInfo GetTensorInfo(unsigned int numberOfBatches, unsigned int numberOfChannels, unsigned int height, unsigned int width, const armnn::DataLayout dataLayout, const armnn::DataType dataType)
uint32_t m_DilationZ
Dilation along z axis.
uint32_t m_DilationY
Dilation along y axis.
uint32_t m_StrideZ
Stride value when proceeding through input for the depth dimension.
uint32_t m_PadTop
Padding top value in the height dimension.
DataLayout m_DataLayout
The data layout to be used (NDHWC, NCDHW).
uint32_t m_PadFront
Padding front value in the depth dimension.
uint32_t m_DilationX
Dilation along x axis.
uint32_t m_PadLeft
Padding left value in the width dimension.
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
bool m_BiasEnabled
Enable/disable bias.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Contains information about TensorInfos of a layer.
std::vector< TensorInfo > m_OutputTensorInfos
std::vector< TensorInfo > m_InputTensorInfos