Version | Description |
V5.6.0 |
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Added: Arm Cortex-M85 cpu support
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Added: Arm China Star-MC1 cpu support
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Updated: system_ARMCM55.c
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V5.5.0 |
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Updated GCC LinkerDescription, GCC Assembler startup
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Added ARMv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
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Changed C-Startup to default Startup. Updated Armv8-M Assembler startup to use GAS syntax
Note: Updating existing projects may need manual user interaction!
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V5.4.0 |
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Added: Cortex-M55 cpu support
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Enhanced: MVE support for Armv8.1-MML
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Fixed: Device config define checks
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Added: L1 Cache functions for Armv7-M and later
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V5.3.0 |
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Added: Provisions for compiler-independent C startup code.
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V5.2.1 |
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Fixed: Compilation issue in cmsis_armclang_ltm.h introduced in 5.2.0
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V5.2.0 |
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Added: Cortex-M35P support.
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Added: Cortex-M1 support.
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Added: Armv8.1 architecture support.
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Added: __RESTRICT and __STATIC_FORCEINLINE compiler control macros.
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V5.1.2 |
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Removed using get/set built-ins FPSCR in GCC >= 7.2 due to shortcomings.
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Added __NO_RETURN to __NVIC_SystemReset() to silence compiler warnings.
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Added support for Cortex-M1 (beta).
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Removed usage of register keyword.
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Added defines for EXC_RETURN, FNC_RETURN and integrity signature values.
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Enhanced MPUv7 API with defines for memory access attributes.
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V5.1.1 |
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Aligned MSPLIM and PSPLIM access functions along supported compilers.
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V5.1.0 |
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Added MPU Functions for ARMv8-M for Cortex-M23/M33.
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Moved __SSAT and __USAT intrinsics to CMSIS-Core.
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Aligned __REV, __REV16 and __REVSH intrinsics along supported compilers.
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V5.0.2 |
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V5.0.1 |
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V5.00 |
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Added: Cortex-M23, Cortex-M33 support.
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Added: macro __SAU_PRESENT with __SAU_REGION_PRESENT.
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Replaced: macro __SAU_PRESENT with __SAU_REGION_PRESENT.
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Reworked: SAU register and functions.
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Added: macro __ALIGNED.
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Updated: function SCB_EnableICache.
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Added: cmsis_compiler.h with compiler specific CMSIS macros, functions, instructions.
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Added: macro __PACKED.
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Updated: compiler specific include files.
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Updated: core dependant include files.
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Removed: deprecated files core_cmfunc.h, core_cminstr.h, core_cmsimd.h.
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V5.00
Beta 6 |
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V5.00
Beta 5 |
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Moved: DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
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Added: DSP libraries build projects to CMSIS pack.
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V5.00
Beta 4 |
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Updated: ARMv8M device files.
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Corrected: ARMv8MBL interrupts.
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Reworked: NVIC functions.
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V5.00
Beta 2 |
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V5.00
Beta 1 |
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Renamed: cmsis_armcc_V6.h to cmsis_armclang.h.
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Renamed: core_*.h to lower case.
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Added: function SCB_GetFPUType to all CMSIS cores.
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Added: ARMv8-M support.
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V4.30 |
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Corrected: DoxyGen function parameter comments.
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Corrected: IAR toolchain: removed for NVIC_SystemReset the attribute(noreturn).
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Corrected: GCC toolchain: suppressed irrelevant compiler warnings.
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Added: Support files for Arm Compiler v6 (cmsis_armcc_v6.h).
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V4.20 |
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Corrected: MISRA-C:2004 violations.
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Corrected: predefined macro for TI CCS Compiler.
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Corrected: function __SHADD16 in arm_math.h.
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Updated: cache functions for Cortex-M7.
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Added: macros _VAL2FLD, _FLD2VAL to core_*.h.
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Updated: functions __QASX, __QSAX, __SHASX, __SHSAX.
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Corrected: potential bug in function __SHADD16.
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V4.10 |
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V4.00 |
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V3.40 |
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Corrected: C++ include guard settings.
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V3.30 |
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Added: COSMIC tool chain support.
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Corrected: GCC __SMLALDX instruction intrinsic for Cortex-M4.
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Corrected: GCC __SMLALD instruction intrinsic for Cortex-M4.
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Corrected: GCC/CLang warnings.
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V3.20 |
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Added: __BKPT instruction intrinsic.
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Added: __SMMLA instruction intrinsic for Cortex-M4.
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Corrected: ITM_SendChar.
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Corrected: __enable_irq, __disable_irq and inline assembly for GCC Compiler.
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Corrected: NVIC_GetPriority and VTOR_TBLOFF for Cortex-M0/M0+, SC000.
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Corrected: rework of in-line assembly functions to remove potential compiler warnings.
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V3.01 |
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Added support for Cortex-M0+ processor.
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V3.00 |
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V2.10 |
-
Updated documentation.
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Updated CMSIS core include files.
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Changed CMSIS/Device folder structure.
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Added support for Cortex-M0, Cortex-M4 w/o FPU to CMSIS DSP library.
-
Reworked CMSIS DSP library examples.
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V2.00 |
-
Added support for Cortex-M4 processor.
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V1.30 |
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Reworked Startup Concept.
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Added additional Debug Functionality.
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Changed folder structure.
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Added doxygen comments.
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Added definitions for bit.
|
V1.01 |
-
Added support for Cortex-M0 processor.
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V1.01 |
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V1.00 |
-
Initial Release for Cortex-M3 processor.
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