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CMSIS-Core (Cortex-M)
Version 5.6.0
CMSIS-Core support for Cortex-M processor-based devices
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| Defines to configure and check device capabilities | |
| Version #define symbols for CMSIS release specific C/C++ source code | |
| Compiler agnostic #define symbols for generic C/C++ source code | |
| Naming conventions and optional features for accessing peripherals | |
| Functions for system and clock setup available in system_device.c | |
| Functions to access the Nested Vector Interrupt Controller (NVIC) | |
| Functions to access the Cortex-M core registers | |
| Functions that generate specific Cortex-M CPU Instructions | |
| Access to dedicated SIMD instructions available on Armv7E-M (Cortex-M4/M7), Armv8-M Mainline (Cortex-M33/M35P), and Armv8.1-M (Cortex-M55/M85) | |
| Functions that relate to the Floating-Point Arithmetic Unit | |
| Functions that relate to the MVE (Cortex-M Vector Extensions) Unit | |
| Functions that relate to the Memory Protection Unit | |
| Define values for MPU region setup | |
| Functions that relate to the Memory Protection Unit | |
| Functions that relate to the Performance Monitoring Unit | |
| IDs for Armv8.1-M architecture defined events | |
| IDs for additional events defined for Cortex-M55 | |
| IDs for additional events defined for Cortex-M85 | |
| Initialize and start the SysTick timer | |
| Debug Access to the Instrumented Trace Macrocell (ITM) | |
| Functions that related to optional Armv8-M and Armv8.1-M security extension | |
| Core register Access functions related to TrustZone for Armv8-M | |
| Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for Armv8-M | |
| SysTick functions related to TrustZone for Armv8-M | |
| Secure Attribution Unit (SAU) functions related to TrustZone for Armv8-M | |
| Stack sealing macros and helper functions | |
| RTOS Thread Context Management for Armv8-M TrustZone | |
| Functions for level-1 instruction and data cache | |
| Functions for the level-1 instruction cache | |
| Functions for the level-1 data cache |