Functions that relate to the Memory Protection Unit.
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#define | ARM_MPU_ATTR_DEVICE ( 0U ) |
| Attribute for device memory (outer only) More...
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#define | ARM_MPU_ATTR_NON_CACHEABLE ( 4U ) |
| Attribute for non-cacheable, normal memory. More...
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#define | ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) |
| Attribute for normal memory (outer and inner) More...
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#define | ARM_MPU_ATTR_DEVICE_nGnRnE |
| Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement. More...
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#define | ARM_MPU_ATTR_DEVICE_nGnRE |
| Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement. More...
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#define | ARM_MPU_ATTR_DEVICE_nGRE |
| Device memory type non Gathering, Re-ordering, Early Write Acknowledgement. More...
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#define | ARM_MPU_ATTR_DEVICE_GRE |
| Device memory type Gathering, Re-ordering, Early Write Acknowledgement. More...
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#define | ARM_MPU_ATTR(O, I) |
| Memory Attribute. More...
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#define | ARM_MPU_SH_NON |
| Normal memory non-shareable. More...
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#define | ARM_MPU_SH_OUTER |
| Normal memory outer shareable. More...
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#define | ARM_MPU_SH_INNER |
| Normal memory inner shareable. More...
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#define | ARM_MPU_AP_(RO, NP) |
| Memory access permissions. More...
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#define | ARM_MPU_RBAR(BASE, SH, RO, NP, XN) |
| Region Base Address Register value. More...
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#define | ARM_MPU_RLAR(LIMIT, IDX) |
| Region Limit Address Register value. More...
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__STATIC_INLINE void | ARM_MPU_Enable (uint32_t MPU_Control) |
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__STATIC_INLINE void | ARM_MPU_Disable (void) |
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__STATIC_INLINE | ARM_MPU_Enable_NS (uint32_t MPU_Control) |
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__STATIC_INLINE void | ARM_MPU_Disable_NS (void) |
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__STATIC_INLINE void | ARM_MPU_SetMemAttrEx (MPU_Type *mpu, uint8_t idx, uint8_t attr) |
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__STATIC_INLINE void | ARM_MPU_SetMemAttr (uint8_t idx, uint8_t attr) |
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__STATIC_INLINE void | ARM_MPU_SetMemAttr_NS (uint8_t idx, uint8_t attr) |
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__STATIC_INLINE void | ARM_MPU_ClrRegionEx (MPU_Type *mpu, uint32_t rnr) |
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__STATIC_INLINE void | ARM_MPU_ClrRegion (uint32_t rnr) |
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__STATIC_INLINE void | ARM_MPU_ClrRegion_NS (uint32_t rnr) |
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__STATIC_INLINE void | ARM_MPU_SetRegionEx (MPU_Type *mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar) |
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__STATIC_INLINE void | ARM_MPU_SetRegion (uint32_t rnr, uint32_t rbar, uint32_t rlar) |
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__STATIC_INLINE void | ARM_MPU_SetRegion_NS (uint32_t rnr, uint32_t rbar, uint32_t rlar) |
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__STATIC_INLINE void | ARM_MPU_OrderedMemcpy (volatile uint32_t *dst, const uint32_t *__RESTRICT src, uint32_t len) |
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__STATIC_INLINE void | ARM_MPU_LoadEx (MPU_Type *mpu, uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt) |
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__STATIC_INLINE void | ARM_MPU_Load (uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt) |
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__STATIC_INLINE void | ARM_MPU_Load_NS (uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt) |
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Functions that relate to the Memory Protection Unit.
The following functions support the optional Memory Protection Unit (MPU) that is available on the Cortex-M23, M33, M35P processor.
The MPU is used to prevent from illegal memory accesses that are typically caused by errors in an application software.
Example:
#define ARM_MPU_AP_ |
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RO, |
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NP |
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Memory access permissions.
- Parameters
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RO | Read-Only: Set to 1 for read-only memory. |
NP | Non-Privileged: Set to 1 for non-privileged memory. |
#define ARM_MPU_ATTR |
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O, |
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I |
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Memory Attribute.
- Parameters
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O | Outer memory attributes |
I | O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes |
#define ARM_MPU_ATTR_DEVICE ( 0U ) |
Attribute for device memory (outer only)
#define ARM_MPU_ATTR_DEVICE_GRE |
Device memory type Gathering, Re-ordering, Early Write Acknowledgement.
#define ARM_MPU_ATTR_DEVICE_nGnRE |
Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement.
#define ARM_MPU_ATTR_DEVICE_nGnRnE |
Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement.
#define ARM_MPU_ATTR_DEVICE_nGRE |
Device memory type non Gathering, Re-ordering, Early Write Acknowledgement.
#define ARM_MPU_ATTR_MEMORY_ |
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NT, |
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WB, |
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RA, |
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WA |
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Attribute for normal memory (outer and inner)
- Parameters
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NT | Non-Transient: Set to 1 for non-transient data. |
WB | Write-Back: Set to 1 to use write-back update policy. |
RA | Read Allocation: Set to 1 to use cache allocation on read miss. |
WA | Write Allocation: Set to 1 to use cache allocation on write miss. |
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U ) |
Attribute for non-cacheable, normal memory.
#define ARM_MPU_RBAR |
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BASE, |
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SH, |
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RO, |
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NP, |
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XN |
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Region Base Address Register value.
- Parameters
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BASE | The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned. |
SH | Defines the Shareability domain for this memory region. |
RO | Read-Only: Set to 1 for a read-only memory region. |
NP | Non-Privileged: Set to 1 for a non-privileged memory region. |
XN | eXecute Never: Set to 1 for a non-executable memory region. |
#define ARM_MPU_RLAR |
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LIMIT, |
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IDX |
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Region Limit Address Register value.
- Parameters
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LIMIT | The limit address bits [31:5] for this memory region. The value is one extended. |
IDX | The attribute index to be associated with this memory region. |
Normal memory inner shareable.
Normal memory non-shareable.
Normal memory outer shareable.
Clear and disable the given MPU region.
- Parameters
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rnr | Region number to be cleared. |
Clear and disable the given Non-secure MPU region.
- Parameters
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rnr | Region number to be cleared. |
Clear and disable the given MPU region of the given MPU.
- Parameters
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mpu | Pointer to MPU to be used. |
rnr | Region number to be cleared. |
Disable the Non-secure MPU.
Enable the MPU.
- Parameters
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MPU_Control | Default access permissions for unconfigured regions. |
Enable the Non-secure MPU.
- Parameters
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MPU_Control | Default access permissions for unconfigured regions. |
Load the given number of MPU regions from a table.
- Parameters
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rnr | First region number to be configured. |
table | Pointer to the MPU configuration table. |
cnt | Amount of regions to be configured. |
Example:
{
}
};
void UpdateMpu(uint32_t idx)
{
}
Load the given number of MPU regions from a table to the Non-secure MPU.
- Parameters
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rnr | First region number to be configured. |
table | Pointer to the MPU configuration table. |
cnt | Amount of regions to be configured. |
Load the given number of MPU regions from a table to the given MPU.
- Parameters
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mpu | Pointer to the MPU registers to be used. |
rnr | First region number to be configured. |
table | Pointer to the MPU configuration table. |
cnt | Amount of regions to be configured. |
Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_LoadEx.
- Parameters
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dst | Destination data is copied to. |
src | Source data is copied from. |
len | Amount of data words to be copied. |
Set the memory attribute encoding.
- Parameters
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idx | The attribute index to be set [0-7] |
attr | The attribute value to be set. |
Set the memory attribute encoding to the Non-secure MPU.
- Parameters
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idx | The attribute index to be set [0-7] |
attr | The attribute value to be set. |
Set the memory attribute encoding to the given MPU.
- Parameters
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mpu | Pointer to the MPU to be configured. |
idx | The attribute index to be set [0-7] |
attr | The attribute value to be set. |
__STATIC_INLINE void ARM_MPU_SetRegion |
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uint32_t |
rnr, |
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uint32_t |
rbar, |
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uint32_t |
rlar |
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Configure the given MPU region.
- Parameters
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rnr | Region number to be configured. |
rbar | Value for RBAR register. |
rlar | Value for RLAR register. |
__STATIC_INLINE void ARM_MPU_SetRegion_NS |
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uint32_t |
rnr, |
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uint32_t |
rbar, |
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uint32_t |
rlar |
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Configure the given Non-secure MPU region.
- Parameters
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rnr | Region number to be configured. |
rbar | Value for RBAR register. |
rlar | Value for RLAR register. |
Configure the given MPU region of the given MPU.
- Parameters
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mpu | Pointer to MPU to be used. |
rnr | Region number to be configured. |
rbar | Value for RBAR register. |
rlar | Value for RLAR register. |