ArmNN
 25.11
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RefConvolution2dWorkload.cpp
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1//
2// Copyright © 2017,2019,2021-2024 Arm Ltd and Contributors. All rights reserved.
3// SPDX-License-Identifier: MIT
4//
5
7
8#include "ConvImpl.hpp"
10
11#include "Profiling.hpp"
12
13namespace armnn
14{
16 const WorkloadInfo& info)
18 , m_InputShape(info.m_InputTensorInfos[0].GetShape())
19 , m_FilterShape(info.m_InputTensorInfos[1].GetShape())
20 , m_OutputShape(info.m_OutputTensorInfos[0].GetShape())
21{
22 WorkloadInfo detailsInfo;
23 detailsInfo.m_InputTensorInfos = info.m_InputTensorInfos;
24 detailsInfo.m_OutputTensorInfos = info.m_OutputTensorInfos;
25
26 // Report Profiling Details
27 ARMNN_REPORT_PROFILING_WORKLOAD_DESC("RefConvolution2dWorkload_Construct",
28 descriptor.m_Parameters,
29 detailsInfo,
30 this->GetGuid());
31}
32
34{
35 Execute(m_Data.m_Inputs, m_Data.m_Outputs);
36}
37
38void RefConvolution2dWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
39{
40 ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID("RefConvolution2dWorkload_Execute");
41
42 std::unique_ptr<Decoder<float>> inputDecoder = MakeDecoder<float>(GetTensorInfo(inputs[0]), inputs[0]->Map());
43 std::unique_ptr<Encoder<float>> outputEncoder = MakeEncoder<float>(GetTensorInfo(outputs[0]), outputs[0]->Map());
44
45 std::unique_ptr<Decoder<float>> weightsDecoder = MakeDecoder<float>(GetTensorInfo(inputs[1]), inputs[1]->Map());
46 std::unique_ptr<Decoder<float>> biasDecoder;
47
49 {
50 biasDecoder = MakeDecoder<float>(GetTensorInfo(inputs[2]), inputs[2]->Map());
51 }
52
53 Convolve(m_InputShape, *inputDecoder, m_OutputShape, *outputEncoder, m_FilterShape,
54 *weightsDecoder, m_Data.m_Parameters.m_BiasEnabled, biasDecoder.get(),
58}
59
60} //namespace armnn
#define ARMNN_REPORT_PROFILING_WORKLOAD_DESC(name, desc, infos, guid)
#define ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID(label)
Creates a profiling event that uses GetGuid() and GetName() from the calling class.
RefBaseWorkload(const Convolution2dQueueDescriptor &descriptor, const WorkloadInfo &info)
RefConvolution2dWorkload(const Convolution2dQueueDescriptor &descriptor, const WorkloadInfo &info)
Copyright (c) 2021 ARM Limited and Contributors.
std::unique_ptr< Decoder< T > > MakeDecoder(const TensorInfo &info, const void *data=nullptr)
std::unique_ptr< Encoder< T > > MakeEncoder(const TensorInfo &info, void *data=nullptr)
void Convolve(const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rFilterShape, Decoder< float > &rFilterDecoder, bool biasEnabled, Decoder< float > *pBiasDecoder, DataLayout dataLayout, unsigned int paddingTop, unsigned int paddingLeft, unsigned int xStride, unsigned int yStride, unsigned int xDilation, unsigned int yDilation, bool depthwise)
Definition ConvImpl.cpp:68
armnn::TensorInfo GetTensorInfo(unsigned int numberOfBatches, unsigned int numberOfChannels, unsigned int height, unsigned int width, const armnn::DataLayout dataLayout, const armnn::DataType dataType)
uint32_t m_DilationY
Dilation along y axis.
uint32_t m_PadTop
Padding top value in the height dimension.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
uint32_t m_DilationX
Dilation along x axis.
uint32_t m_PadLeft
Padding left value in the width dimension.
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
bool m_BiasEnabled
Enable/disable bias.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Contains information about TensorInfos of a layer.
std::vector< TensorInfo > m_OutputTensorInfos
std::vector< TensorInfo > m_InputTensorInfos