The AVH Fixed Virtual Platforms (AVH FVPs) provide functionally accurate simulation models of Arm-based Cortex-M CPUs and Corstone-3xx Subsystems.

The AVH FVP models are standalone programs that can be executed in a target environment. See Available Models for a list of FVPs provided in the AVH context.

Section Using AVH FVPs gives an overview how to run an embedded program on a target AVH FVP model using command line interface. Infrastructure chapter provides details on how to obtain AVH FVPs and use them in various cloud-native or desktop environments workflows, such as GitHub and Keil MDK.

Available Models

The AVH FVP simulation models build a subset of Arm Fast Models Fixed Virtual Platforms with extensions for Virtual Interfaces Overview.

The table below lists the available models:

FVP Simulation Model Name	Processor Cores	Overview Description
FVP_Corstone_SSE-320	Cortex-M85, Ethos-U85, Mali-C55	FVP for Arm Corstone SSE-320 Reference Guide
FVP_Corstone_SSE-315	Cortex-M85, Ethos-U65, Mali-C55	FVP for Arm Corstone SSE-315 Reference Guide
FVP_Corstone_SSE-310_Ethos-U65	Cortex-M85, Ethos-U65	Arm Corstone SSE-310 FVP
FVP_Corstone_SSE-310	Cortex-M85 Ethos-U55	Arm Corstone SSE-310 FVP
FVP_Corstone_SSE-300_Ethos-U65	Cortex-M55, Ethos-U65	Arm Corstone SSE-300 FVP
FVP_Corstone_SSE-300_Ethos-U55	Cortex-M55, Ethos-U55	Arm Corstone SSE-300 FVP
FVP_Corstone_SSE-300	Cortex-M55	Arm Corstone SSE-300 FVP
FVP_MPS2_Cortex-M85	Cortex-M85 (2x)	FVP_MPS2_Cortex-M85 in FVP Reference Guide. It is recommended to use Corstone-320/315/310 FVP models for Cortex-M85.
FVP_MPS2_Cortex-M55	Cortex-M55 (2x)	FVP_MPS2_Cortex-M55 in FVP Reference Guide. It is recommended to use Corstone-300 FVP models for Cortex-M55.
FVP_MPS2_Cortex-M52	Cortex-M52 (2x)	FVP_MPS2_Cortex-M52 in FVP Reference Guide
FVP_MPS2_Cortex-M35P	Cortex-M35P (2x)	FVP_MPS2_Cortex-M35P in FVP Reference Guide
FVP_MPS2_Cortex-M33	Cortex-M33 (2x)	ARM Cortex-M33 IoT Subsystem for V2M-MPS2+ (AppNote AN505)
FVP_MPS2_Cortex-M23	Cortex-M23 (2x)	ARM Cortex-M23 IoT Subsystem for V2M-MPS2+ (AppNote AN519)
FVP_MPS2_Cortex-M7	Cortex-M7	ARM Cortex-M7 SMM on V2M-MPS2 (AppNote AN399)
FVP_MPS2_Cortex-M4	Cortex-M4	ARM Cortex-M4 SMM on V2M-MPS2 (AppNote AN386)
FVP_MPS2_Cortex-M3	Cortex-M3	ARM Cortex-M3 SMM on V2M-MPS2 (AppNote AN385)
FVP_MPS2_Cortex-M0plus	Cortex-M0+	ARM Cortex-M0+ SMM on V2M-MPS2 (AppNote AN383)
FVP_MPS2_Cortex-M0	Cortex-M0	ARM Cortex-M0 SMM on V2M-MPS2 (AppNote AN382)

Virtual Interfaces

The AVH FVPs implement various Virtual Interfaces that can be used to stimulate the application under test.

FVPs with Virtual Interfaces

The Virtual Input/Output (VIO) interface controls simple I/O such as LED and switches.
The Virtual Streaming Interface (VSI) provides up to 8 channels for data streaming.
The Virtual Socket Interface (VSocket) connects the user application to BSD sockets on the Host computer for IP network connectivity.

Both VIO and VSI connect to local python scripts and enable flexible scripting for test automation. Eight VSI interfaces are available and may be used in parallel to stream simultaneous multi-channel inputs and outputs. The interfaces are tailored for simulation, but can also map to physical target hardware, for example to a video camera as a VSI input.

In addition the Event Recorder Capturing provides an interface for the Event Recorder API. This software component enables event annotations in the application code or software component libraries. The Event Recorder provides visibility to the dynamic execution of an application, enables RTOS awareness, and Event Execution Statistics which helps to optimize the timing of complex algorithms.