CMSIS-Core (Cortex-A)
Version 1.2.1
CMSIS-Core support for Cortex-A processor-based devices
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In a multiprocessor system, the MPIDR provides an additional processor identification mechanism for scheduling purposes, and indicates whether the implementation includes the Multiprocessing Extensions. More...
Functions | |
__STATIC_FORCEINLINE uint32_t | __get_MPIDR (void) |
Get MPIDR. More... | |
Bits | Name | Function |
---|---|---|
[31] | MPEA | Multiprocessing Extensions Available |
[30] | U | Indicates a Uniprocessor system |
[29:25] | - | Reserved. |
[24] | MT | Indicates whether the lowest level of affinity consists of logical processors that are implemented using a multi-threading type approach. |
[23:16] | Aff2 | Affinity level 2. |
[15:8] | Aff1 | Affinity level 1. |
[7:0] | Aff0 | Affinity level 0. |
Consider __get_MPIDR to access this register.
__STATIC_INLINE uint32_t __get_MPIDR | ( | void | ) |
This function returns the value of the Multiprocessor Affinity Register.
This function returns the value of the Multiprocessor Affinity Register (MPIDR).